Zi in INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR End-Autumn Semester Examination 2022-23 Date of Examination: session: (FN/AN) Duration: 3hrs. Full Marks: [2e Subject No: EC 2\20 1 subject: Basce Electro cs Department/Center/School:_E A ECE awe Specific charts, graph paper, log book etc., required Nena aay Tt Special Instructions (if any): i, In Figure 1, what is the minimum allowable value of Vpg if M; must not enter the triode region? (assume 2=0, threshold voltage = 0.4V; wCox=200 wAIV") toe 5 Neem CNS oD) (51 ii, In the circuit in Figure 2, assume the transistor acts as a linear resistor. Determine (W/L) of the transistor such that the circuit attenuates the signal by only 5%. Assume Vo=1.8 V, R.=100 Q. threshold voltage = 0:4¥, Cox=200 wA/V?. 15) al Ving Vout Figure 2 ili. Sketch Ix as a function of Vx for the two circuits in Figure 3. Assume Vx goes from 0 to Vi V. Also show in the plot at what value of Vx the device changes its region of operation (assume Vn 0.4V) is) Wop 42 Qu fo Qu ae Qe] Vets ey Find out MOSFET current (Ip) and gate source voltage (Vas) forthe circuit in Figure 4. Assume A=0, threshold voltage = 1 V, Cox(WiL)= 1 mA V" {5} vortoy we 2s rata 00M ead y oS LC 0 an bry (srs) @ Cai ay asTT6M osmA fost ae” Y 10 (6 4) (osm —O ie > te. Ge) ce. (cal For the transistor in the circuit in Figure 5, B=200. Find Ip (emitter current) and Vo (voltage at collector) for (a) Vy=OV, (b) Ve=1V and (c) Va=2V. (Assume that if transistor is on Vy,=0.7\ and if transistor is in saturation Ver=0.2V) a vv 3 bye Figure $ ‘Consider a common emitter circuit using a npn BJT having Is=10°A at room temperature (assume thermal voltage 26 mY), a collector resistance Rc=6.8 kQ, and a power supply Veo=10V. Determine the value of the bias voltage Vag required to operate the transistor at Ver3.2V. 15) In the circuit in Figure 6, base collector is at 200 mY reverse bias, Vec=2.5V and Re=1 kQ. Find emitter current Ie (assume Vge = 0.7V). 13] WF gh Figure 6 2/43. For the circuit in Fi (10) is very high. i, Find out the operating point of the BJT. [10] Draw the gq ~ model of the BJT and find out the voltage gain, {10} ire 7, beta (B) = 100, Vbe =0.7 V, kT/q = 25 mV. Assume BJT output resistance Figure 7 4 i. Inthe circuit in Figure 8, the transistor possesses a beta () = 65, Early Voltage V,= 75 V with ‘Vx =26mV. Find the transistor parameters f, fo.« Sm (10) aval A, Figure 8 ij, In the circuit in Figure 9, given that beta (B) = 120, r.=2, Vau=0.7V and Vx=26mV. Draw the fq —21 model of the BIT and find out the voltage gain. [10 ~ Figure 9 3/4‘he parameters inthe circuit in Figure 10 ae ¥;= 0-7 V, ¥a1= 2.3 V, and Via = 5.6 V. Determine Yo Versus v, over the range of -10'< vy < +10 V. 10) a=oska oe Figure 10 ii, For the circuit in Figure 11, (a) plot vo versus v, for 0 < v; < 15 V. Assume V,= 0.7 V. Indicate all breakpoints. (b) Plot ip over the same range of input voltage. to] 10 tin | 240 T +i5V Figure U1 6 ain A voltage regulator is to have a nominal output voltage of 10 V. The specified Zener diode has a rating of 1 W, has a 10 V drop at lz = 25 mA, and has a Zener resistance of r, = 5 ®. The input power supply has a nominal value of Ves = 20 V and can vary by +25 percent. The output load current is to vary between I, = 0 and 20 mA. (19) (@) If the minimum Zener current is to be Iz = 5 mA, determine the required input resistance Ri (b) Determine the maximum variation in output voltage. (©) Determine the percent regulation. ii, Sketch v, versus time for the circuit in Figure 12 with the input shown. Assume Vy=0. [10] Figure 12 4a ta d