Thesis Corrected
Thesis Corrected
INTRODUCTION
1.0 INTRODUCTION
The advances in many fields of science have, either directly or indirectly been
dependent on the evolution of electronics devices. The electronic devices and
systems are definitely inseparable from our everyday life affecting our lifestyle
and life quality. As an example, today’s computers with incredible capabilities
have control on our life in many ways. In addition, the revolutions in
communication, media, transportation, etc. have been due to advances in
electronics. It is hard to believe that all of these advances have occurred only
in a few decades, revolutionizing the human life. These electronic
communication devices require fast clocks for fast, reliable and effective data
transmission and reception.
The amount of data that have to be transmitted over the global communication
networks has increased exponentially, mainly driven by the rapid growth of the
internet. The network devices are for instance used to synchronize the data flow
in data communication. These result in the need to design fast and reliable
devices capable of processing all these data at the required high speed. High-
performance digital systems use clocks to sequence operations and synchronize
between functional units and between ICs. Clock frequencies and data rates have
been increasing with each generation of processing technology and processor
architecture. Within these digital systems, clocks giving accurate timing are
generated with phase-locked loops (PLLs) and then distributed on-chip with clock
buffers. The rapid increase of the systems’ clock frequency poses challenges in
1
generating and distributing the clock with low uncertainty and low power
(Mozhgan, 2003). Voltage controlled oscillator (VCO) forms the heart of the PLL .
High frequency oscillators are needed for the construction of fast clocks. For data
recovery the oscillation (clocking) must be at different frequencies. This is
achieved normally using voltage controlled oscillator (VCO). The frequency of the
VCO determines the speed of the clock. If there is noise, in the VCO it makes the
output of the clock lower. The efficiency, reliability and speed of data
transmission in the communication systems are all related to the speed of the
processor of the two communicating hardware items. The processor speed is
based on its clock. This means that if the clock is fast, then the processor will be
able to process large amount of data within a short period. Very high frequency
oscillator free from noise is therefore vital to digital communication systems.
1.1 AIM
The aim of this work is to design and simulation high frequency voltage controlled
oscillator that can be used in the construction of fast clocks for processors.
2
II. Colpitts oscillator with a frequency of 900MHz was designed and simulated
using the above amplifier.
III. The colpitts oscillator was modified to LC tuned VCO with a frequency range
of 800MHz to 1.5GHz
The scope of this work is the design of LC tuned VCO using colpitt oscillator
configuration.
3
CHAPTER TWO
LITERATURE REVIEW
Direct current (DC) circuit analysis deals with constant currents and voltages,
while alternating current (AC) circuit analysis deals with time-varying voltage and
current signals whose time average values are zero. Circuits with time-average
values of non-zero are also important .
Conservation of energy– the algebraic sum of the voltage drops V i around a closed
circuit loop (imaginary loop) is equal to zero.
∑ V i=0 … … … 2.1
i
Conservation of charge– the algebraic sum of the currents I k flowing into a point is
equal to zero (total charge in, equals total charge out).
∑ I k =0 … … … 2.2
k
V =∑ V i … … …2.3
i
I R eq=I ∑ Ri … … … 2.4
i
Req =∑ Ri … … … 2.5
i
V V
I= =∑ I i=∑ … … …2.6
R eq i i Ri
1 1
=∑ … … …2.7
R eq i Ri
Figure 2.1: Divider circuit: (a) voltage divider and (b) current divider.
5
Consider the voltage divider shown in figure 2.1a, applying Kirchoff’s voltage law
we have
V ¿ =( R1 + R2 ) I … … … 2.8
V out =R 2 I … … … 2.9
R2
V out = V ¿ … … … 2.10
R1 + R2
Consider the current divider shown in figure 2.1b. The source current is divided
between the two resistors and is given by
V V
I ¿=I 1 + I 2= + … … … 2.11
R1 R 2
V =I out R2 … … … 2.12
R1
I out = I … … … 2.13
R1 + R2 1
3. RTh = RN = VTh/IN.
Alternating current circuits (AC circuits) are circuits in which voltages and currents
may vary with time.
The DC properties can be treated separately using the methods already described
above. The algebraic equations representing Kirchoff’s laws for DC circuits will
take the form of differential equations for AC circuits. In AC circuits we have the
additional circuit elements, capacitance C and inductance L, which store energy in
electric and magnetic fields respectively. C and L are referred to as reactive
7
elements while R is a resistive element. All three of these elements are
considered passive elements.
2.2.1 Capacitor
The fundamental property of a capacitor is that it can store charge and hence
electric field energy. The capacitance C between two appropriate surfaces is
defined by
Q
V= … … … 2.15
C
Where V is the potential difference between the surfaces and Q is the magnitude
of the charge distributed on either surface. In terms of current
dQ
I= ……… 2.16
dt
implies
dV 1 dQ I
= = … … … 2.17
dt C dt C
1. Since charge and electric field can be stored, a capacitor can be used as a (non-
ideal) source of current and voltage.
3. A capacitor and resistor in series will limit current and hence smooth sharp
edges in voltage signals.
8
4. Charging or discharging a capacitor with a constant current results in the
capacitor having a voltage signal with a constant slope.
1 1
=∑ … … … 2.18
Ceq i C i
Note that the voltage across each capacitor will be inversely proportional to the
capacitance, with the total voltage being shared out between the capacitors, the
smallest capacitance having the largest voltage across it and the largest
capacitance having the smallest voltage etc.
C eq=∑ Ci … … … 2.19
i
2.2.2 Inductors
Inductors are components that consist of coils of insulated copper wire wound
around a former that will have some type of core at its center. This core might be
a metal such as iron that can be easily magnetized. Inductors depend for their
9
action on the magnetic field that is present around any conductor when it is
carrying a current. If the wire coil is wound around a core made of a material that
is easily magnetized, such as iron, then the magnetic field around the coil is
concentrated within the core; this greatly increases the efficiency of the inductor
Faraday’s law applied to an inductor states that a changing current induces a back
electromotive force (EMF) that opposes the change. Or
dI
V =V A−V B=L … … … 2.20
dt
Where V is the voltage across the inductor and L is the inductance measured in
henry (H). The inductance will tend to smooth sudden changes in current just as
the capacitance smoothes sudden changes in voltage. If the current is constant
there will be no induced EMF. So unlike the capacitor which behaves like an open-
circuit in DC circuits, an inductor behaves like a short-circuit in DC circuits.
Applications using inductors are less common than those using capacitors, but
inductors are very common in high frequency circuits.
2.2.3 Reactance
10
X L =2 πfL=ωf … … …2.21
1 1
XC= = … … … 2.22
2 πfC ωC
Where 2πf = ω is the angular velocity and f is the frequency of the applied
alternating current (AC).
LCR series circuit is a circuit that contains inductor, capacitor and resistor
connected together in series and supplied with an alternating voltage as shown in
figure 2.3. In such an arrangement, the same circuit supply current (I S) flows
through all the components of the circuit, and V R, VL and VC indicate the voltages
across the resistor, the inductor and the capacitor respectively. Where V S is the
supplied voltage.
11
The phase relationship between the supply voltage V S and the circuit current IS
depends on the frequency of the supply voltage, and on the relative values of
inductance and capacitance, and whether the inductive reactance (X L) is greater
or less than the capacitive reactance (X C). Figure 2.4 shows the circuit conditions
when the inductive reactance (XL) is greater than the capacitive reactance (X C). In
this case, since both L and C carry the same current, and X L is greater than XC, it
follows that VL must be greater than VC.
V S =√ ¿ ¿
Z=√ ¿ ¿
12
Series Resonance occurs when the inductive reactance is equal to the capacitive
reactance. Figure 2.5 shows that at resonance:
Below resonance, the circuit is capacitive and above resonance the circuit is
inductive.
X L =X C … … … 2.25
1
2 π f r L= … … … 2.26
2 π f rC
1
f r= … … 2.27
2 π √ LC
13
Equation (2.27) is widely used at radio frequencies. It is often not accurate
enough at low frequencies where large inductors, having considerable internal
resistance are used. The formula below can be used for low frequency (large
internal resistance) calculations.
√
2
1 1 R
f r= − 2 … … … 2.28
2π LC L
The circuit in Figure 2.7 is an "Ideal" LC circuit consisting of only an inductor L and
a capacitor C connected in parallel. It allows consideration of the effects of L and
C, ignoring any circuit resistance that would be present in a practical circuit.
14
Figure 2.7 Tank circuit
Figure 2.8 shows phasor diagrams for the circuit in Figure 2.7 under three
different conditions, below, above and at resonance. Unlike the phasor diagrams
for series circuits, these diagrams have a voltage VS as the reference (horizontal)
phasor, and have several phasors depicting currents. This is because; in a parallel
circuit the voltage VS is common to both the L and C arms of the circuit but
each of the component arms (L and C) has individual currents. The phasors for
L and C seem to be reversed compared with the phasor diagrams for series
circuits. The parallel phasor diagram shows the current I C through the
capacitor leading the supply voltage VS by 90°, while the inductive current IL
15
lags the supply voltage by 90°.
The supply current IS will be the phasor sum of I C and IL but as, in the ideal
circuit, there is no resistance present, I C and IL are in antiphase, and I S will be
simply the difference between them. Figure 2.8a shows the circuit operating at
some frequency below resonance ƒ r where IL is greater than IC and the total
current through the circuit I S is given by IL− IC and will be in phase with I L, and it
will be lagging the supply voltage by 90°. Therefore at frequencies below ƒ r more
current flows through L than through C and so the parallel circuit acts as an
INDUCTOR. Figure 2.8b shows the conditions when the circuit is operating above
ƒr. Here, because XC will be lower than XL more current will flow through C. IC is
therefore greater than IL and as a result, the total circuit current I S can be given as
IL− IC but this time IS is in phase with IC. The circuit is now acting as a CAPACITOR.
At resonance (ƒr) shown in Figure 2.8c, the reactances of C and L will be equal, so
an equal amount of current flows in each arm of the circuit, (I C = IL). Considerable
16
current is flowing in each arm of the circuit, but the supply current is zero.
Current is in effect "stored" within the parallel circuit at resonance, without being
released. For this reason the circuit is sometimes also called a "tank circuit" or
“resonator”. Ignoring resistance, the resonant frequency of a LC parallel circuit is
given by the same formula as is used for LC series circuits.
2.5 Diode
17
negative carriers into the P-type material occurs. The N-type material acquires an
excess of positive charge near the junction and the P-type material acquires an
excess of negative charge. Eventually diffuse charges build up and an electric field
is created which drives the minority charges and eventually equilibrium is
reached. A region develops at the junction called the depletion region. This region
is essentially un-doped or just intrinsic silicon. To complete the diode conductor,
leads are placed at the ends of the PN junction.
The behavior of a diode depends on its polarity in the circuit (figure 2.10). If the
diode is reverse biased (positive potential on N-type material) the depletion
region increases. The only charge carriers able to support a net current across the
PN junction are the minority carriers and hence the reverse current is very small.
A forward-biased diode (positive potential on P-type material) has a decreased
depletion region; the majority carriers can diffuse across the junction. The voltage
may become high enough to eliminate the depletion region entirely.
18
The current-voltage curve for diode is shown in figure 2.11.
K = Boltzmann constant
T = crystal temperature
Diodes are the simplest of all the semiconductor devices, but have a very wide
range of uses, including:
oscillator tunable.
20
A varactor diode changes capacitance proportional to the reverse bias across the
PN junction. Two common types of varactor diodes are abrupt and hyperabrupt
junctions varactor diodes. The abrupt junction varactor diode is made with a
linearly doped PN junction and typically has a capacitance change of 4:1 or less
over the specified range of reverse bias. Abrupt junction diodes are available with
maximum reverse bias voltages between 5V and 60V. A hyperabrupt junction
varactor diode has a non-linear doped PN junction that increases the capacitance
change vs. reverse bias and may have a 10:1 capacitance change. Varactor diode
may be manufactured in Si or GaAs. The GaAs process offers a varactor diode with
lower capacitance for the same resistance due to the higher electron mobility
than Si. Therefore the Q of a GaAs varactor is slightly higher than that of silicon.
However, the flicker noise of a varactor made in GaAs is very high and would
deteriorate the phase noise significantly (Jason, 2001). For this reason, only silicon
hyperabrupt junction diodes were considered for this design. The depletion
capacitance of varactor diode is given by:
C j0
C j=
………. (2.30)
( )
m
V
1+
α
Where Cj0 is the zero bias capacitance, V is the applied voltage, α is the contact
potential (0.6 for Si), and m is the diode law (Malcolm, 2003).
21
times greater than the maximum capacitance of the varactor diode in series with
it and applying the DC from a high impedance source to the node between the
varactor diode’s cathode and the blocking capacitor as shown in figure 2.11.
Since no significant DC current flows in the varactor diode, the value of the
resistor connecting its cathode back to the DC control voltage can be somewhere
in the range of 22KΩ to 150KΩ and the blocking capacitor somewhere in the
range of 5-100nF. Sometimes, with very high-Q tuned circuits; an inductor is
placed in series with the resistor to increase the source impedance of the control
voltage so as not to load the tuned circuit and decrease its Q.
22
distortion should the AC component possess enough amplitude to bias the
varactor diode into forward conduction (Adrio Communications Ltd, 2013).
2.6 TRANSISTOR
These transistors each have one advantage or the other over one another. The
type to use depends on the purpose for which it intended for. For example, the
table below gives the comparison between BJTs and MOSFETs.
Sl
BJT MOSFET
No
3 Output is controlled by controlling base current Output is controlled by controlling gate voltage
23
5 So paralleling of BJT is difficult. So paralleling of this device is easy.
Dive circuit is complex. It should provide Dive circuit is simple. It should provide
6
constant current(Base current) constant voltage(gate voltage)
9 BJTs have high voltage and current ratings. They have less voltage and current ratings.
When the transistor is biased for normal operation as in figure 2.12a, the base
terminal is slightly positive with respect to the emitter (about 0.7 V for silicon),
and the collector is positive by several volts. When properly biased, the transistor
acts to make IC >> IB. The depletion region at the reverse-biased base-collector
24
junction grows and is able to support the increased electric potential change
indicated in the figure 2.12b. For a typical transistor, 95% to 99% of the charge
carriers from the emitter make it to the collector and constitute almost all the
collector current IC. IC is slightly less than IE and we may write
IC
α= … … … 2.30
IE
Figure 2.12 (a) NPN transistor biased for operation and (b) voltage levels
developed within the biased semiconductor.
IC
β= … … … 2.31
IB
I E =I C + I B … … …2.32
We have
α
β= … … …2.33
1−α
a b
26
There are three common configurations: common emitter (CE), common collector
(CC) and common base (CB), as shown in figure 2.14
Characteristic CE CC CB
27
2.7 AMPLIFIER
The design of amplifiers is aimed at producing a circuit that has a predicted gain
over a particular band of frequencies with minimum distortion. The amplifier
28
must also be stable and not prone to oscillation. Bipolar PNP or NPN transistors or
FETs may be used in a wide variety of designs depending on their intended
purpose.
Consider the simple bipolar NPN common emitter amplifier shown in Figure 2.15.
To function correctly the amplifier should produce at its output, an amplified
version of the signal at its input without distortion. In order to do this, its
quiescent or no signal (DC) conditions, must first be correct. Here we have used
voltage divider bias method. Other method of biasing such as base resistor
method and biasing with feedback resistor can be used as well. All involve
applying Kirchoff’s voltage law, Thevenin’s and Nortion’s theorem where
necessary.
The Thevenin’s equivalent circuit of figure 2.15 is as shown in figure 2.16 below
29
Figure 2.16 Thevenin’s equivalent circuit.
Applying Kirchhoff’s law to the output and input side of figure 2.16, we have
Where VCC, and VBB are the collector and base voltages respectively. R C, RB and RE
are the collector, base and emitter resistors respectively. I C, IB and IE are the
collector, base and emitter current respectively.
In any transistor circuit design DC bias current and voltage must be supplied to
operate in the linear region of the characteristic curve. The DC operating point is
defined by the values of base current I B, collector current IC, base-emitter voltage
VBE and collector emitter voltage V CE. While VCE, IB and IC are determined from the
out characteristics, VBE is determined from the input characteristic and is usually
between 0.6V to 0.7V for silicon transistors.
30
of 100C doubles the collector leakage current according the equation (Mehta and
Mehta 2004).
Where β is the DC current gain, I CEO is the collector-emitter leakage current and
ICBO is the collector-base leakage current.
This means that IC is increases by (β +1)I CBO for every increase in I CBO and the
increase in IC increases the temperature the more and this may lead to thermal
runaway. Stability factor at constant IB and β is given by
d IC
S= … … … 2.36
d I co
It can be shown that the stability factor for the circuit in figure 2.15 is given by
(R ¿ ¿ B+ RE )
S=(β +1) … … … 2.37 ¿
R B + R E + β RE
RB
1+
RE
¿ ( β +1 ) × … … … 2.38
RB
( β +1 ) +
RE
Where
R 2 R3
R B= … … … 2.39
R2 + R3
RB RB
If the ratio R is very small, then R can be neglected as compared to 1 and the
E E
1
S= ( β+1 ) × =1… … …2.40
( β+ 1 )
31
In actual practice S may be around 10. Thus For thermal stability of the amplifier
RB ≤ 0.3βRE …………..2.41
RE = 0.2RC ……..2.42
From the discussion so far it can be seen that if we substitute the operating point
(Q point: VCC, VCE, VBE, IC, IB, IE and β) values we have four equations (i.e. 2.34, 2.35,
2.41 and 2.42) in four unknown. These can be solved simultaneously.
1
C= … … … 2.43
2 π f min Z
R 2 R3 Zin( base)
Z = Zin (base)//R2//R3 = R R +R Z ….. 2.44
2 3 2 in(base) +R 3 Zin(base)
32
Zin(base) = βre’ ………. 2.45
25mV
re’ = I … … … 2.46
E
Where Zin(base) is the input impedance of the transistor base and re’ is the AC
emitter resistance.
V out
AV = … … … 2.48
V¿
I out
Ai= … … … 2.49
I¿
Pout
A P= … … …2.50
P¿
33
2.8 OSCILLATOR BASICS
34
The transfer function of the feedback oscillatory system shown in figure 2.17 is
given by (Razavi, 1997).
Y ( s) G(s)
= ………. (2.51)
X (s) 1−G ( s ) H (s)
G(s)H(s) ≥ 1 ………………...(2.52)
Equation 2.52 is known as the magnitude criterion for oscillation which states that
the gain represented by G(s)H(s) of the oscillator loop must be equal to one
during standard operation. In practice the loop gain has to be larger than one for
the oscillator to begin to oscillate and for the oscillation amplitude to grow. The
amplitude will eventually saturate due to device nonlinearities, reducing the loop
gain to one and providing a signal with stable amplitude. Equation 2.53 is known
as the phase criterion for oscillation. It states that the phase shift of the oscillator
loop must be zero or a multiple of 2π. This means that the signals with the same
phase are summed at some point in the oscillator. If the phase shift was an odd
multiple of π, then the signals would have opposite phases and would cancel each
other out. In that case there will be no oscillation.
35
and 10% and is commonly used in communication systems that require small
amounts of tuning such as channel selection in cellular phones. Wideband
oscillators are able to tune over an octave and some up to a decade of
frequencies. They are used in systems requiring broad frequency range tunability
such as radar systems, highly adaptive communication systems and measurement
equipment.
Ring oscillator is formed when three or more odd number of inverters are
cascaded together as shown in figure 2.18 (Razavi, 2008).
1
f osc=
2Ntp
……… (2.54)
36
v2
ⅆv
t p=C ∫ ………. (2.55)
v1
i
C V dd
t p= ……….. (2.56)
2 I av
Ring oscillator has wider tuning range than LC counterpart, it is power supply
dependent and hence has worst noise performance compared with LC oscillators,
it is also is easily integrated into IC because it does not need an external
components for its operation (Shu, Lee and Leung, 2004).
2.9.2 LC Oscillators
37
does not change very much for changes in D.C. supply voltage or in ambient
temperature. LC oscillators are extensively used for generating R.F. signals where
good wave shape and reasonable frequency stability is required but is NOT of
prime importance (Ham and Hajimiri 2001). The several types of LC feedback
oscillators are: (a) colpitts, (b) Armstrong , (c) clap, (d) Hartley and (e) crystal -
controlled oscillators.
Most wideband varactor tuned oscillators are a variation of the Colpitts or Hartley
oscillator (Anthony and Vendelin 1990).
1
f r= ……… (2.57)
2 π √ L CT
C1 C2
CT = ……….. (2.58)
C1 + C2
38
Fig 2.19 Colpitts oscillator
The circuit operation: when the circuit is tuned on, the capacitors C1 and C2 are
charged. The capacitors discharge through L, setting up oscillations determined by
(2.57). The output voltage of the amplifier is developed across C 2 and feedback
appears across C1. The transistor produces a phase shift of 180 0 and the voltage
divider formed by C1 - C2 produces a further phase shift of 180 0 thus the feedback
is properly phased to produce undamped oscillation continuously. The feedback
fraction is given by:
Vf X C1 C2
β= ¿ ¿ …………… (2.59)
Vout X C2 C1
39
C1
Av(min) ≥ ……. (6.60)
C2
Where AV(min) is the minimum open loop gain (Theraja B.K. and Theraja B.L.)
Applications such as clock recovery and clock synthesis require the oscillators to
be “tunable”. Tunability means that the output frequency must be a function of
some control input, usually voltage. This voltage could be for example the output
of the loop filter in an analog phase-locked loop, PLL. In an ideal voltage-
controlled oscillator, the output frequency is a linear function of its control
voltage. The voltage controlled oscillator (VCO) forms the heart of a PLL. Figure
2.20 shows the block diagram of VCO.
Commonly, both ring oscillators and LC oscillators are used in GHz range
applications. However, ring oscillators suffer from poor phase noise compared to
that of LC oscillators and are less suitable for high-end wireless communication
systems (Shu, Lee and Leung, 2004). LC oscillators are more attractive due to their
better phase noise performance and lower power consumption. However, they
40
occupy larger area compared to that of ring oscillators (Ham and Hajimiri 2001).
The quality factor Q of the LC tank is given by
energy stored RP
Q=2 π = …. (2.61)
energy dissipated per cycle f r L
Where RP is the effective resistance of the tank. Higher quality factor Q means
lower VCO phase noise. A good phase noise model is the most important
specification for low phase noise VCO design.
The VCO must exhibit a low Phase Noise in order to meet the Sensitivity
requirement. High Pushing (change of the oscillation frequency with supply
voltage) can cause Phase Noise degradation due to increased sensitivity to
the power supply noise.
A buffer at the output is necessarily to isolate the VCO from any output
load variations (Pulling) and to provide the required output power. BJTs
offer the advantage of generating high power levels directly from the VCO,
eliminating the need for buffer amplifiers (Axel, 2006) which consume
additional DC power, increase noise, increase module complexity, and
increase cost. The reduction in system complexity is particularly useful for
applications requiring very compact transceiver modules, such as mobile-
phones and PDAs (Chen, Wang, Chen, Luo and Liu, 2010).
41
The tuning slope is the slope of the frequency to voltage tuning
characteristic at any point and is the same as modulation sensitivity. The
slope could be positive or negative. For a positive slope, the output
frequency increases as the tuning voltage increases. Similarly for a negative
slope, the output frequency decreases as the tuning voltage increases.
Tuning sensitivity as a function of tuning voltage is a measure of tuning
linearity.
Tuning flatness – As the VCO frequency range is increased, the difficulty to
achieve a flat output power is increased. Adding an output filter to suppress
harmonics may in some cases degrade power output flatness (Anu, 2010).
A monotonic tuning characteristic means that the frequency is single valued
at any tuning voltage and that the slope has the same sign across the tuning
range.
In order to lower the VCO Phase Noise, a number of rules should be respected:
42
Paul and Gert, 2008). The VCO is the element that generates the clock reference
for the recovery and regeneration process, so its performance is critical for the
clock and data recovery. Therefore, careful attention needs to be paid to its
design. In the first place, its tuning range needs to be wide enough to overcome
the shift of its expected central frequency (f0) caused by process, voltage and
temperature (PVT) variations; to overcome this limitation, a tuning range of about
20% is sufficient Also, its frequency should remain as constant as possible in the
locked state because any variation in it will result in jitter at the regenerated data
stream (Sanchez-Azqueta and Celma, 2011). The use of Phase-locked loop (PLL)
attain this constant locked state is explained below.
Fig. 2.21 shows the topology of a simple phase-locked loop. Here, a phase
frequency detector (PFD) generates a phase error whose DC value is proportional
to the difference between the phases and frequencies of the reference and
feedback signals. The charge pump is used to either sink or source a current with
the help of the switches driven by the phase frequency detector (PFD). The low
pass filter (LPF) extracts the DC value and applies it to the voltage controlled
oscillator (VCO), which changes the output frequency f out. The frequency divider
(FD) divides down the VCO output frequency to the one comparable to the input
reference frequency. When the loop reaches steady state, the phase difference
between the reference input fref and feedback signal fdiv is constant over time and
the relation fout = Nfref holds true. By changing the value of N, the VCO output
frequency can be changed (Gardener 2005).
43
Fig 2.21 Structure of a phase-locked loop
CHAPTER THREE
METHODOLOGY
44
3.0 INTRODUCTION
From the foregoing discussion on the two major forms of the VCO in the previous
chapter, we decided to use LC tuned circuit for our VCO design because the
frequency is independent of power supply and hence free from power supply
noise and the frequency does not change for changes in ambient temperature. It
also has low power consumption. The VCO was designed using colpitts oscillator
configuration and simulated using Multism 12.0.1.
45
Figure 3.1a Schematic diagram of the amplifier
Applying Kirchhoff’s law to the output and input side of the D.C. equivalent circuit
of figure 3.1 we have
and
R2R3
Where R B=
R 2 + R3
………. (3.5)
From the Q point (Appendix A) we used: VCC = 9v, VCE = 4.5v, IB = 40µA, IC = 2.6mA
and VBE = 0.71V
IC
β= = 65 ……… (3.6)
IB
IE = IC + IB = 2.64Ma …… (3.7)
Substituting the Q point, VCC, IB, VBE, and IE, in (3.1) and (3.2) we have four
equations with four unknown. Solving simultaneously we have
−5 −3
VBB - 0.71 (1 .2 x 10 β+ 2.6 x 10 )RE
= −3 ; VBB = 1.694V ….. (3.8)
4.5 (0.013+2.64 x 10 )R E
47
From (3.2) we have
0.984
R E= −3
3.42 x 10
RE = 287.7Ω, RB = 5610.15Ω
R2R3
But R B=
R 2 + R3
= 5610.15Ω ……… (3.10)
R2 VCC
VB B= = 1.694 ………….. (3.11)
R2 + R 3
R2 = 6910.748Ω, R3 = 29809.5112Ω
From (3.4)
RC = RE x 5 = 1438.6
1
f min= ………. (3.12)
2 πC Z❑
48
Taking 1MHz as our low-frequency cut-off.
R 2 R3 Zin( base)
Z = Zin (base)//R2//R3 = R R +R Z ….. (3.13)
2 3 2 in(base) +R 3 Zin(base)
25mV
re’ = I = 625Ω …..(3.15) (Metha and Metha, 2006)
E
Z = 569.9482Ω
1
C 2=
2 π Z❑ f min
……. (3.16)
C2 = 279.12pf
For C3 we have
1
C 3=
2 π R4 f min
= 111.25pf ….. (3.17)
Bypassed Capacitor C1
A good rule of the thumb is that X C1 of the bypassed capacitor should be at least
10 times smaller than the R E at the minimum frequency of oscillation (Floyd,
2005)
10
C 1=
2 π R E f min
………. (3.19)
C1 = 5.5nF
49
This completes the design of our common emitter amplifier circuit.
For the oscillator, we need a resonator. The schematic diagram of the designed
VCO is as shown in figure 2.2. The resonating circuit is made up of two center
tapped capacitors and one inductor connected in series for colpitt oscillation. The
series combination of the varactor diode and C4 form one of the center tapped
capacitor. The resonant frequency is given by
1
f r= ……….. (3.20) (Metha and Metha, 2006)
2 πLC
C5
Av(min) = ≥ 1 …… (3.22)
C4
Where Av(min) is the minimum gain of the amplifier with feedback (Theraja, and
Theraja, 2006)
RC 1438.6
Av(min) = , Av( min)= =5
RE 287.72
C = 0.8333C4 …… (3.24)
C = 6.2488pf
C4 = 7.4988pf, C5 = 39.494pf
The varactor diode used is BB515 which is hyperabrupt junction silicon varactor
diode. The varactor diode is connected in series with C 4. From BB515 datasheet,
the capacitance of the varactor diode for a reverse bias voltage of 1V is 18.7pf.
51
Using this, the value of new C4 was calculated. The new C4 is in series with C var and
their equivalent capacitance is 7.5pf.
CHAPTER FOUR
4.0 INTRODUCTION
The result obtained from simulating the VCO design using Multism 12.0.1 is
presented in this chapter followed by discussion which highlight some of the
areas where the designed VCO finds application.
4.1 RESULTS
52
This circuit was simulated using Multism 12.0.1. Figure 4.1 is the result of the AC
analysis using the designed amplifier shown in figure 4.2. This shows that the
designed amplifier is a wide band amplifier.
The simulated tuning range which is the graph of the frequency against reverse
biased voltage (VR) of the VCO is shown in figure 4.4.
54
1700
1600
1500
1400
Frequency (MHz)
1300
1200
1100
1000
900
800
-35 -30 -25 -20 -15 -10 -5 0
The output signal has good tuning flatness for the frequency range of 800MHz to
1.5GHz when the reverse biased voltage changes from 0 to 25V as seen in figures
4.5 through 4.7.
55
Figure 4.5 Output waveform for VR = 1V, frequency = 818MHz
56
Figure 4.7 Output waveform for VR = 24V, frequency = 1.5GHz
The VCO has an average positive tuning slope of 31.07MHz/V throughout the
frequency range. The minimum and maximum values of the tuning sensitivity are
1V and 25V respectively.
4.2 DISCUSSION
We found the designed and simulated VCO to produce sinusoidal signal with a
frequency range of 800MHz to 1.5GHz over a voltage range of 0 to 25V with nice
tuning flatness, tuning slope of 31.MHz/V at a voltage of 2.5V. Furthermore, the
designed VCO has monotonic tuning characteristics and low pushing over the
tuning range of 0 to 25V.
In view of the above features of the designed and simulated high frequency
voltage controlled oscillator, the VCO can be used in the construction of high
speed processors used in data communication for reliable and fast data
transmission because of its frequency range of about 690MHz. This wide range
also makes it very fit for microwave application such as surveillance and very
versatile for many purposes especially when it is used in conjunction with either
frequency divider or multiplier circuits as the case may be. The smoothness of the
VCO waveforms throughout its tuning range indicated the absence of jitter noise
and thus makes it a very good item for accurate timing of electronic
communication activities.
57
58
CHAPTER FIVE
5.0 INTRODUCTION
5.1 SUMMARY
In this work we designed VCO using colpitt oscillator configuration which operates
in 800MHz to 1.5GHz range. In view of the result it shows that the circuit has a
bandwidth of 690MHz with a tuning flatness of about 95%. Its wide frequency
range, smoothed waveform and positive turning slope throughout its turning
range are excellent features of this design.
5.2 CONCLUSION
There is still work left to do in the area of fast clock generators design, for
example:
59
1. Designing LC tuned VCO with higher frequency of say 40GHz.
60
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