1.

Evolution of microprocessors
Transistor was invented in 1948 (23 December 1947 in Bell lab). IC was
invented in 1958 (Fair Child Semiconductors) By Texas Instruments J Kilby.
The first microprocessor was invented by INTEL(INTegrated ELectronics).
Size of the microprocessor – 4 bit

Clock Number of Inst. per

Name Year of Invention
speed transistors sec
INTEL 1971 by Ted Hoff and
740 kHz 2300 60,000
4004/4040 Stanley Mazor

Size of the microprocessor –8 bit

Clock Number of
Name Year of Invention Inst. per sec
speed transistors
8008 1972 500 kHz 3500 50,000
10 times faster than
8080 1974 2 MHz 6000
8008
1976 (16-bit
8085 3 MHz 6500 769230
address bus)
Size of the microprocessor –16 bit

Clock Number of Inst. per

Name Year of Invention
speed transistors sec
1978 (multiply and divide 4.77 MHz,
2.5
8086 instruction, 16-bit data bus and 20- 8 MHz, 10 29000
Million
bit address bus) MHz
1979 (cheaper version of 8086 and 8- 2.5
8088
bit external bus) Million
80186/81982 (80188 cheaper version of 6 MHz
0188 80186, and additional components
like interrupt controller, clock
generator, local bus controller,
 Clock Number of Inst. per
Name Year of Invention
speed transistors sec
counters)
1982 (data bus 16bit and address bus 4
80286 8 MHz 134000
24 bit) Million

Size of the microprocessor – 32 bit

Clock Number of
Name Year of Invention Inst. per sec
speed transistors
1986 (other versions
16 MHz
INTEL 80386DX, 80386SX,
– 33 275000
80386 80386SL , and data bus
MHz
32-bit address bus 32 bit)
1986 (other versions 16 MHz
INTEL 1.2 Million 8 KB of cache
80486DX, 80486SX, – 100
80486 transistors memory
80486DX2, 80486DX4) MHz
Cache memory 8
PENTIU
1993 66 MHz bit for instructions
M
8 bit for data

Size of the microprocessor –64 bit

Number of
Name Year of Invention Clock speed Inst. per sec
transistors
64 KB of L1
2006 (other versions
INTEL 291 Million cache per core
core2 duo, core2 1.2 GHz to 3 GHz
core 2 transistors 4 MB of L2
quad, core2 extreme)
cache
2.2GHz – 3.3GHz,
i3, i5, i72007, 2009, 2010 2.4GHz – 3.6GHz,
2.93GHz – 3.33GHz

2. Generations of microprocessors:
 1.First-generation –
From 1971 to 1972 the era of the first generation came which brought
microprocessors like INTEL 4004 Rockwell international PPS-4 INTEL
8008 etc.

2.Second generation –
The second generation marked the development of 8-bit microprocessors
from 1973 to 1978. Processors like INTEL 8085 Motorola 6800 and 6801
etc came into existence.

3.Third generation –
The third generation brought forward the 16-bit processors like INTEL
8086/80186/80286 Motorola 68000 68010 etc. From 1979 to 1980 this
generation used the HMOS technology.

4.Fourth generation –
The fourth-generation came into existence from 1981 to 1995. The 32-bit
processors using HMOS fabrication came into existence. INTEL 80386 and
Motorola 68020 are some of the popular processors of this generation.

5.Fifth-generation –
From 1995 till now we are in the fifth generation. 64-bit processors like
PENTIUM, Celeron, dual, quad, and octa-core processors came into
existence.

3. 8086 architecture
The internal architecture of Intel 8086 is divided into 2 units:The Bus Interface
Unit (BIU), and The Execution Unit (EU). These are explained as following
below.

1. The Bus Interface Unit (BIU):

It provides the interface of 8086 to external memory and I/O devices via the
System Bus. It performs various machine cycles such as memory read, I/O read,
etc. to transfer data between memory and I/O devices.
BIU performs the following functions are as follows:
It generates the 20-bit physical address for memory access.
It fetches instructions from the memory.
It transfers data to and from the memory and I/O.
Maintains the 6-byte pre-fetch instruction queue(supports pipelining).
BIU mainly contains the 4 Segment registers, the Instruction Pointer, a pre-
fetch queue, and an Address Generation Circuit.

Instruction Pointer (IP):

 It is a 16-bit register. It holds offset of the next instructions in the Code
Segment.
IP is incremented after every instruction byte is fetched.
Code Segment register: (16 Bit register): CS holds the base address for the
Code Segment. All programs are stored in the Code Segment and accessed via
the IP.
Data Segment register: (16 Bit register): DS holds the base address for the Data
Segment.
Stack Segment register: (16 Bit register): SS holds the base address for the
Stack Segment.
Extra Segment register: (16 Bit register): ES holds the base address for the
Extra Segment.

6 Byte Pre-fetch Queue:

It is a 6-byte queue (FIFO).
Fetching the next instruction (by BIU from CS) while executing the current
instruction is called pipelining.

2. The Execution Unit (EU):

The main components of the EU are General purpose registers, the ALU,
Special purpose registers, the Instruction Register and Instruction Decoder, and
the Flag/Status Register.
1.Fetches instructions from the Queue in BIU, decodes, and executes
arithmetic and logic operations using the ALU.
2.Sends control signals for internal data transfer operations within the
microprocessor.(Control Unit)
3.Sends request signals to the BIU to access the external module.
4.It operates with respect to T-states (clock cycles) and not machine cycles.
8086 has four 16-bit general purpose registers AX, BX, CX, and DX which
store intermediate values during execution. Each of these has two 8-bit parts
(higher and lower).
AX register: (Combination of AL and AH Registers)
It holds operands and results during multiplication and division operations.
Also an accumulator during String operations.

BX register: (Combination of BL and BH Registers)

It holds the memory address (offset address) in indirect addressing modes.

CX register: (Combination of CL and CH Registers)

It holds the count for instructions like a loop, rotates, shifts and string
operations.

DX register: (Combination of DL and DH Registers)

It is used with AX to hold 32-bit values during multiplication and division.

Arithmetic Logic Unit (16-bit):Performs 8 and 16-bit arithmetic and logic

operations.
Stack Pointer: Points to Stack top. Stack is in Stack Segment, used during
instructions like PUSH, POP, CALL, RET etc.
Base Pointer: BP can hold the offset addresses of any location in the stack
segment. It is used to access random locations of the stack.
Source Index: It holds offset address in Data Segment during string
operations.
Destination Index: It holds offset address in Extra Segment during string
operations.

Flag/Status register (16 bits): It has 9 flags that help change or recognize the
state of the microprocessor.
6 Status flags:
1.Carry flag(CF)
2.Parity flag(PF)
3.Auxiliary carry flag(AF)
4.Zero flag(Z)
5.Sign flag(S)
6.Overflow flag (O)
Status flags are updated after every arithmetic and logic operation.
3 Control flags:
1.Trap flag(TF)
2.Interrupt flag(IF)
3.Direction flag(DF)
What is Multi Core Architecture?

When a processor has more than one core to execute all the necessary functions
of a computer, it’s processor is known to be a multi core architecture. In other
words, a chip with more than one CPU(Central Processing Unit).

What is the difference between a single core processor and a multi core
processor?

SINGLE-CORE PROCESSORS

Single core processors have only one processor in die to process the
instructions. A single core is a single calculation unit or processing unit that
executes calculations. Dual core means a cpu with two calculation units or two
processing units. The difference in performance of dual core and single core
varies on the software and how much software you are running on your
computer

Problems of Single Core Processors

As we try to increase the clock speed of this processor, the amount of heat
produced by the chip also increases.
Multicore processors
Multicore refers to an architecture in which a single physical processor
incorporates the core logic of more than one processor. A single integrated
circuit is used to package or hold these processors. These single integrated
circuits are known as a die.
Multicore architecture places multiple processor cores and bundles them as a
single physical processor. The objective is to create a system that can complete
more tasks at the same time, thereby gaining better overall system performance.
A multicore processor is an integrated circuit that has two or more processor
cores attached for enhanced performance and reduced power consumption.
For instance, if you are performing many tasks at once, such as watching a
movie and using WhatsApp, one core will handle activities like watching a
movie while the other handles other responsibilities like WhatsApp.
Multicore processors are the latest processors which became available in the
market after 2005. These processors use two or more cores to process
instructions at the same time by using hyper threading. The multiple cores are
embedded in the same die. The multicore processor may look like a single
processor but it contains two (dual-core), three (tricore), four (quad-core), six
(hexa-core), eight (octa-core) or ten (deca-core) cores. Some processors even
have 22 or 32 cores
Advantages of Multi-Core Processor

Performance
A multi-core CPU, by nature, can do more work as compared to a single-core
processor. The spacing between the cores of an integrated circuit allows for
faster clock rates. As a result, the signals do not need to travel a large distance
to reach their target and are also persistent. When compared to using a separate
processor, the speeds are far quicker.
Reliability
In multi-core CPUs, the software is always assigned to different cores. When
one piece of software fails, the others remain unaffected. Whenever a defect
arises, it affects only one core. As a result, multi-core CPUs are better able to
resist faults.
Software Interactions
Even if the software is running on multiple cores, it will communicate with one
another. Spatial and temporal isolation is a process that a multi-core processor
goes through. Core threads are never delayed as a result of these processes.
Multitasking
An operating system can use a multi-core CPU to run two or more processes at
the same time, even if many programmes may be executed at the same time. A
photoshop application, for example, can be used to perform two jobs at once.

Power Consumption
Multitasking with a multi-core CPU, on the other hand, requires less power.
Only the part of the CPU that generates heat will be used. The power
consumption is eventually minimized, resulting in less battery utilization. .
Obsolescence Avoidance
Architects can avoid technology obsolescence and increase maintainability by
using multicore CPUs. Chipmakers are using the most recent technological
advancements in their multicore CPUs.
Isolation
Multicore processors may increase geographical and temporal isolation when
compared to single-core systems. Software on one core is less likely to impact
software on the other if both cores are executing on the same single-core. This
decoupling happens due to geographical and temporal isolation (threads on one
core are not delayed by threads on another core). With the help of limiting the
impact of errors to a single core, multicore processing can increase robustness.