Coa Unit-1
Coa Unit-1
Whereas, Organization defines the way the system is structured so that all those catalogued tools
can be used properly.
Our Computer Organization and Architecture Tutorial includes all topics of such as introduction,
ER model, keys, relational model, join operation, SQL, functional dependency, transaction,
concurrency control, etc.
Whereas, Organization of a computer system defines the way system is structured so that all
those catalogued tools can be used. The significant components of Computer organization are
ALU, CPU, memory and memory organization.
Prerequisite
Before learning the concepts of Computer Architecture and Organization, you should have a
basic knowledge prior to Computer Architecture, basic functional units of a computer system,
etc.
Audience
Our COA tutorial is designed to help beginners and professionals.
Problem
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you can post the questions in the contact form
Input Device
An input device is a computer hardware which handles input receiving from outside the system.
The main function of the input device is to enter data or give commands by the user into the
system.
For example, the input devices are keyboards, mouse, joysticks, scanners, touchpad and many
more.
Output devices
Output devices are computer hardware devices which handle output activities. The function of
the output device is to display the results of data processing, as soft copy, hard copy, voice, or
video.
For example, the output devices are monitors, printers, speakers, projectors and so on.
Given below in the figure are the output devices −
I/O Ports
I / O Ports are called connectors which are under the control of the processor helpful in handling
input and output activities. Or in other words, this port is used to connect any device that comes
from outside the computer, like a printer, scanner, mouse, or USB. In a computer system this
port is present on the back of the CPU while on the laptop the ports are located on the right and
left side.
CPU
The Central Processing unit is computer hardware called the brain of the computer system.
Because, the performance of a computer is determined by the technology and quality of the CPU
used.
Generally, there are three types of components in the CPU, which are given below −
Control unit
Register
ALU (Arithmetic Logic Unit)
The control unit controls and regulates the course of the program. The register is used to serve
as a temporary storage area for data that is being processed to continue to the next processing.
ALU performs all arithmetic and logic operations based on the instructions given.
Given below in the figure is the structure of CPU −
Memory
It is a device that functions as a storage medium in a computer system.
There are two types of memory which are characterized as follows −
Volatile called as temporary storage where data is lost when the computer is turned off,
and
Non-volatile storage is called permanent storage where data is stored even if the computer
is not turned on.
Based on the location, the memory is divided into two parts, namely internal and external
memory. This internal memory is the main memory in a computer system, such as RAM
(Random Access Memory) and ROM (Read Only Memory).
External memory is secondary memory like hard disk, USB drive, etc.
Given below in the figure are the access times and capacities of the memory −
Control Bus
Control bus is part of a computer system which is helpful to control the use of access to data
buses and bus addresses.
In principle, the data channel and address channel are used simultaneously by all components,
so that a control bus is needed to control their use. This control bus is equipped with command
signals that specify the operations to be performed.
Address Bus
The address bus relates to the source or destination address on the data bus. It is used to select a
memory location or port to perform write and read operations.
So that all devices connected to the computer system must have an address to be accessed. For
example, the CPU will read a word from memory, and then the CPU will put the data address on
the address channel.
Data Bus
It is part of a computer system which is the path for the movement of data contained in the
computer system module. The data is transferred from the input device to the CPU or from the
CPU to memory or from memory to the output device.
The bus width determines the amount of data that can be transferred at one time. Generally, the
data bus consists of 8, 16, 32, 64 or more parallel lines.
What is General Register Organization?
A set of flip-flops forms a register. A register is a unique high-speed storage area in the CPU.
They include combinational circuits that implement data processing. The information is always
defined in a register before processing. The registers speed up the implementation of programs.
Registers implement two important functions in the CPU operation are as follows −
It can support a temporary storage location for data. This supports the directly implementing
programs to have fast access to the data if required.
It can save the status of the CPU and data about the directly implementing program.
Example − Address of the next program instruction, signals get from the external devices and
error messages, and including different data is saved in the registers.
If a CPU includes some registers, therefore a common bus can link these registers. A general
organization of seven CPU registers is displayed in the figure.
The CPU bus system is managed by the control unit. The control unit explicit the data flow
through the ALU by choosing the function of the ALU and components of the system.
Consider R1 ← R2 + R3, the following are the functions implemented within the CPU −
MUX A Selector (SELA) − It can place R2 into bus A.
MUX B Selector (SELB) − It can place R3 into bus B.
ALU Operation Selector (OPR) − It can select the arithmetic addition (ADD).
Decoder Destination Selector (SELD) − It can transfers the result into R1.
The multiplexers of 3-state gates are performed with the buses. The state of 14 binary selection
inputs determines the control word. The 14-bit control word defines a micro-operation.
Register Memory
Register memory is the smallest and fastest memory in a computer. It is not a part of the main
memory and is located in the CPU in the form of registers, which are the smallest data holding
elements. A register temporarily holds frequently used data, instructions, and memory address
that are to be used by CPU. They hold instructions that are currently processed by the CPU. All
data is required to pass through registers before it can be processed. So, they are used by CPU to
process the data entered by the users.
Registers hold a small amount of data around 32 bits to 64 bits. The speed of a CPU depends on
the number and size (no. of bits) of registers that are built into the CPU. Registers can be of
different types based on their uses. Some of the widely used Registers include Accumulator or
AC, Data Register or DR, the Address Register or AR, Program Counter (PC), I/O Address
Register, and more.
Register Stack
The stack can be arranged as a set of memory words or registers. Consider a 64-word register
stack arranged as displayed in the figure. The stack pointer register includes a binary number,
which is the address of the element present at the top of the stack. The three-element A, B, and
C are located in the stack.
The element C is at the top of the stack and the stack pointer holds the address of C that is 3.
The top element is popped from the stack through reading memory word at address 3 and
decrementing the stack pointer by 1. Then, B is at the top of the stack and the SP holds the
address of B that is 2. It can insert a new word, the stack is pushed by incrementing the stack
pointer by 1 and inserting a word in that incremented location.
The stack pointer includes 6 bits, because 26 = 64, and the SP cannot exceed 63 (111111 in
binary). After all, if 63 is incremented by 1, therefore the result is 0(111111 + 1 = 1000000). SP
holds only the six least significant bits. If 000000 is decremented by 1 thus the result is 111111.
Therefore, when the stack is full, the one-bit register „FULL‟ is set to 1. If the stack is null, then
the one-bit register „EMTY‟ is set to 1. The data register DR holds the binary information which
is composed into or readout of the stack.
First, the SP is set to 0, EMTY is set to 1, and FULL is set to 0. Now, as the stack is not full
(FULL = 0), a new element is inserted using the push operation.
The push operation is executed as follows −
The set of instructions that manages the operation codes is called the format of instruction. The design of bits
in instruction is supported by the format of instruction. The length of instruction is generally preserved in
multiples of character, which is 8bits. The instruction format determines the behaviour and complexity of
instruction. Depending upon the number of addresses, the format of instruction is of variable length.
The instruction format in which there is no address field is called zero address instruction
The instruction format in which the instruction uses only one address field is called the one address instruction
format
In this type of instruction format, one operand is in the accumulator and the other is in the memory location
It has only one operand
It has two special instructions LOAD and STORE
The instruction format in which the instruction uses the three address fields is called the three address
instruction format
It has three operands
It requires shorter assembly language instructions
It requires more bits
The data is represented in the instruction format with the help of addressing mode
The addressing mode is the first part of the instruction format
The data can either be stored in the memory of a computer or it can be located in the register of the CPU
The operation code gives instructions to the processor to perform the specific Operation
The operation code is the second part of the instruction format
3. OPERAND
It is the part of the instruction format that specifies the data or the address of the data
Depending upon the processor of the computer the instruction format contains zero to three operands
Conclusion
A standard machine which can be directly decoded and executed by the CPU is called instruction format. It is a
sequence of bits in a machine instruction that defines the layout of the instruction. The format of instruction
provides specific information to the CPU regarding the information to be performed. The parts of the format of
instruction are addressing mode, operation code and operand. The characteristic of a good format of instruction
is that all the components of instruction should be present. The group of Instructions is called the instruction
set.
A program counter (PC) is a CPU register in the computer processor which has the address of the
next instruction to be executed from memory. It is a digital counter needed for faster execution
of tasks as well as for tracking the current execution point.
All instructions as well as data in memory have a specific address. As each instruction is
processed, the software application responsible updates the program counter with the upcoming
instructions' address which needs to be fetched. The program counter in turn passes this
information to the memory address register as part of the execution cycle/standard fetch. The
program counter increases the stored value by one as the next instruction is fetched. If the
computer is reset or restarts, the program counter usually reverts to the value of zero.
Similar to other process registers of the computer, the program counter is like a bank of binary
latches, with each representing one bit of value. The program counter works in combination with
other registers to identify the current instruction. It can be modified or accessed with the help of
access or jump instructions. The PC can be accessed/modified by jump and branch instructions.
Therefore, the destination address can be loaded to the program counter via branch instructions.
The program counter can also be loaded with the address using the data processing instructions.
Implied Mode − In this mode, the operands are specified implicitly in the definition of the
instruction. For example, the instruction "complement accumulator" is an implied-mode
instruction because the operand in the accumulator register is implied in the definition of the
instruction. All register reference instructions that use an accumulator are implied-mode
instructions.
Immediate Mode − In this mode, the operand is specified in the instruction itself. In other
words, an immediate-mode instruction has an operand field instead of an address field. The
operand field includes the actual operand to be used in conjunction with the operation
determined in the instruction. Immediate-mode instructions are beneficial for initializing
registers to a constant value.
Register Mode − In this mode, the operands are in registers that reside within the CPU. The
specific register is selected from a register field in the instruction. A k-bit field can determine
any one of the 2k registers.
Register Indirect Mode − In this mode, the instruction defines a register in the CPU whose
contents provide the address of the operand in memory. In other words, the selected register
includes the address of the operand rather than the operand itself.
A reference to the register is then equivalent to specifying a memory address. The advantage of a
register indirect mode instruction is that the address field of the instruction uses fewer bits to
select a register than would have been required to specify a memory address directly.
Direct Address Mode − In this mode, the effective address is equal to the address part of the
instruction. The operand resides in memory and its address is given directly by the address field
of the instruction. In a branch-type instruction, the address field specifies the actual branch
address.
Indirect Address Mode − In this mode, the address field of the instruction gives the address
where the effective address is stored in memory. Control fetches the instruction from memory
and uses its address part to access memory again to read the effective address.
Indexed Addressing Mode − In this mode, the content of an index register is added to the
address part of the instruction to obtain the effective address. The index register is a special CPU
register that contains an index value. The address field of the instruction defines the beginning
address of a data array in memory.
Type-2 :
Vertical micro-instruction :
Here, we will discuss the vertical micro-instruction format as follows.
The bits of the micro-instruction are decoded.
The decoded output decides the control signal to be produced.
N bits in the micro-instruction will totally generate 2N control signals.
But one control can be generated by one micro-instruction.
More micro-instructions are needed.
Also, the decoding makes the execution slower.
The circuit is complex.
Vertical micro-instruction format
Example –
Suppose processors have 32 instructions (8 for arithmetic operations 8 for data
transfer operations, 8 for logical operations 8 for shift operation). Suppose we require
32 control signals total in which 8 are responsible for performing data transfer
operation, 8 for logical,8 for a shift, and 8 for arithmetic.
If we implement it by horizontal micro-instruction, then the size of each micro-
instruction should be 32 bits. Most probably for data transfer operation we don‟t need
a control signal for the other 3 types of instruction so in the whole micro-instruction
the 27 bits for generating control signals for different 3 instruction types are 0
(garbage) which makes lots of memory space waste, also control memory size
increases.
If we use nano programming, then micro-control memory has instructions for
identifying the type of the instruction by decoding i.e using vertical micro-instruction.
After identifying the type of instruction the nano control memory is responsible for
generating control signals for that particular instruction type that is identified
previously. So the advantage of that is every nano instruction size reduces to 8 bits
and every micro-instruction size reduces to 2 bits(for identifying 4 different types of
instruction and for 2×4 decoder) i.e advantage of vertical micro-instruction also we
can produce multiple control signal for a particular instruction type simultaneously
which is an advantage of horizontal instruction.
Disadvantage of Nano programming
Increased memory access time:- The main disadvantage of the two level memory
approaches is the loss of speed due to theextra memory access required for Nano control
memory.
https://www.ques10.com/p/19359/explain-the-types-of-microinstruction-formats/
As display in the figure, the halt condition appears when the device receive turned off,
on the circumstance of unrecoverable errors, etc.
Fetch Cycle
The address instruction to be implemented is held at the program counter. The
processor fetches the instruction from the memory that is pointed by the PC.
Next, the PC is incremented to display the address of the next instruction. This
instruction is loaded onto the instruction register. The processor reads the instruction
and executes the important procedures.
Execute Cycle
The data transfer for implementation takes place in two methods are as follows −
Processor-memory − The data sent from the processor to memory or from memory to
processor.
Processor-Input/Output − The data can be transferred to or from a peripheral device by
the transfer between a processor and an I/O device.
In the execute cycle, the processor implements the important operations on the
information, and consistently the control calls for the modification in the sequence of
data implementation. These two methods associate and complete the execute cycle.
OR
The basic operation of a computer is called the ‘fetch-execute’ cycle. The CPU is designed to
understand a set of instructions - the instruction set. It fetches the instructions from the
main memory and executes them. This is done repeatedly from when the computer is booted up
to when it is shut down.
1. The CPU fetches the instructions one at a time from the main memory into the registers. One
register is the program counter (pc). The pc holds the memory address of the next instruction to
be fetched from main memory.
2. The CPU decodes the instruction.
3. The CPU executes the instruction.
4. Repeat until there are no more instructions.
A single piece of program code might require several instructions. Look at this Python (3.x)
code:
area = length * width
First, the computer needs to load in the value of the variable length into the immediate access
store (registers). Next it needs to load in the value of the variable width. Then it needs to
multiply the two numbers together, and finally it needs to store the result in the variable area.
If each device instruction has an independent micro routine, therefore it results in the
help of huger areas for storage.
The branching needed more time for implementation.
Computer Configuration
The block diagram of the computer is shown in the figure. It consists of two memory
units: the main memory for storing instructions and data, and a control memory for
storing the micro-program.
The processor unit includes four registers are Program Counter (PC), Address Register
(AR), Data Register (DR), and an Accumulator (AC). The control unit includes two
registers are Control Address Register (CAR) and a Subroutine Register (SBR).
Multiplexers are used to send data within the registers in the processor. AR can get
information from PC or DR. DR can get information from AC, PC, or memory. PC
receives information only from PC.
The information from AC and DR can have arithmetic and logic operations and be
located in the AC. The DR is the source of information for memory, where the
information that is read can go to DR and no other register.