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Irect Access Media (DMA)

DMA controller allows I/O devices to directly access memory with less CPU involvement. It communicates with the CPU and I/O devices through interfaces and buses. The DMA contains registers like the address register, word count register, and control register that are accessed by the CPU to initialize DMA transfers by specifying the memory address, number of words, and transfer mode. Once initialized, the DMA can directly communicate with memory while relinquishing the buses to the CPU.

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33 views2 pages

Irect Access Media (DMA)

DMA controller allows I/O devices to directly access memory with less CPU involvement. It communicates with the CPU and I/O devices through interfaces and buses. The DMA contains registers like the address register, word count register, and control register that are accessed by the CPU to initialize DMA transfers by specifying the memory address, number of words, and transfer mode. Once initialized, the DMA can directly communicate with memory while relinquishing the buses to the CPU.

Uploaded by

Ashi Rana
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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irect Access Media (DMA) :

DMA Controller is a hardware device that allows I/O devices to directly access
memory with less participation of the processor. DMA controller needs the
same old circuits of an interface to communicate with the CPU and Input/Output
devices.
Fig-1 below shows the block diagram of the DMA controller. The unit
communicates with the CPU through data bus and control lines. Through the
use of the address bus and allowing the DMA and RS register to select inputs,
the register within the DMA is chosen by the CPU. RD and WR are two-way
inputs. When BG (bus grant) input is 0, the CPU can communicate with DMA
registers. When BG (bus grant) input is 1, the CPU has relinquished the buses
and DMA can communicate directly with the memory.
 Address register –It contains the address to specify the desired location in
memory.
 Word count register –It contains the number of words to be transferred.
 Control register –It specifies the transfer mode.
Note –
All registers in the DMA appear to the CPU as I/O interface registers. Therefore,
the CPU can both read and write into the DMA registers under program control
via the data bus.

Fig 1- Block Diagram

Explanation :
The CPU initializes the DMA by sending the given information through the data
bus.
 The starting address of the memory block where the data is available (to
read) or where data are to be stored (to write).
 It also sends word count which is the number of words in the memory block
to be read or write.
 Control to define the mode of transfer such as read or write.
 A control to begin the DMA transfer.

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