FQPF50N06

May 2001

QFET TM

FQPF50N06
60V N-Channel MOSFET

General Description Features

These N-Channel enhancement mode power field effect • 31A, 60V, RDS(on) = 0.022Ω @VGS = 10 V
transistors are produced using Fairchild’s proprietary, • Low gate charge ( typical 31 nC)
planar stripe, DMOS technology. • Low Crss ( typical 65 pF)
This advanced technology has been especially tailored to • Fast switching
minimize on-state resistance, provide superior switching • 100% avalanche tested
performance, and withstand high energy pulse in the • Improved dv/dt capability
avalanche and commutation mode. These devices are well • 175°C maximum junction temperature rating
suited for low voltage applications such as automotive, DC/
DC converters, and high efficiency switching for power
management in portable and battery operated products.

D
!

"

! "
"
G! "

GD S TO-220F !
FQPF Series S

Absolute Maximum Ratings TC = 25°C unless otherwise noted

Symbol Parameter FQPF50N06 Units

VDSS Drain-Source Voltage 60 V
ID Drain Current - Continuous (TC = 25°C) 31 A
- Continuous (TC = 100°C) 21.9 A
IDM Drain Current - Pulsed (Note 1) 124 A
VGSS Gate-Source Voltage ± 25 V
EAS Single Pulsed Avalanche Energy (Note 2) 495 mJ
IAR Avalanche Current (Note 1) 31 A
EAR Repetitive Avalanche Energy (Note 1) 4.7 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns
PD Power Dissipation (TC = 25°C) 47 W
- Derate above 25°C 0.31 W/°C
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +175 °C
Maximum lead temperature for soldering purposes,
TL 300 °C
1/8" from case for 5 seconds

Thermal Characteristics
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 3.22 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

 FQPF50N06
Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 60 -- -- V
∆BVDSS Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C -- 0.06 -- V/°C
/ ∆TJ Coefficient
IDSS VDS = 60 V, VGS = 0 V -- -- 1 µA
Zero Gate Voltage Drain Current
VDS = 48 V, TC = 150°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 25 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -25 V, VDS = 0 V -- -- -100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 15.5 A -- 0.018 0.022 Ω
On-Resistance
gFS Forward Transconductance VDS = 25 V, ID = 15.5 A (Note 4) -- 19 -- S

Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 1180 1540 pF
Coss Output Capacitance f = 1.0 MHz -- 440 580 pF
Crss Reverse Transfer Capacitance -- 65 90 pF

Switching Characteristics
td(on) Turn-On Delay Time -- 15 40 ns
VDD = 30 V, ID = 25 A,
tr Turn-On Rise Time -- 105 220 ns
RG = 25 Ω
td(off) Turn-Off Delay Time -- 60 130 ns
tf Turn-Off Fall Time (Note 4, 5) -- 65 140 ns
Qg Total Gate Charge VDS = 48 V, ID = 50 A, -- 31 41 nC
Qgs Gate-Source Charge VGS = 10 V -- 8 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 13 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- 31 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 124 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 31 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, IS = 50 A, -- 52 -- ns
Qrr Reverse Recovery Charge dIF / dt = 100 A/µs (Note 4) -- 75 -- nC

Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 600µH, IAS = 31A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 50A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

 FQPF50N06
Typical Characteristics

VGS
Top : 15.0 V
2 10.0 V 2
10 10
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

ID, Drain Current [A]

ID, Drain Current [A]

1
10 1
10

175℃

25℃
※ Notes : ※ Notes :
1. 250μ s Pulse Test 1. VDS = 30V
2. TC = 25℃ -55℃ 2. 250μ s Pulse Test
0
10
0
10
10
-1
10
0
10
1 2 4 6 8 10

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

0.05

2
10
0.04
Drain-Source On-Resistance

VGS = 10V
IDR, Reverse Drain Current [A]
R DS(ON) [ Ω ],

0.03
VGS = 20V

1
0.02 10

0.01
※ Notes :
175℃ 25℃ 1. VGS = 0V
※ Note : TJ = 25℃
2. 250μ s Pulse Test
0.00
0 50 100 150 200 10
0

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

ID, Drain Current [A]
VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current
and Temperature

3000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
2500 10 VDS = 30V

VDS = 48V
V GS , Gate-Source Voltage [V]

Coss
2000 8
Ciss
Capacitance [pF]

※ Notes :
1. VGS = 0 V
2. f = 1 MHz 6
1500

4
1000
Crss
2
500
※ Note : ID = 50A

0
0 0 5 10 15 20 25 30 35
-1 0 1
10 10 10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

 FQPF50N06
Typical Characteristics (Continued)

1.2
2.5
Drain-Source Breakdown Voltage

2.0
1.1

Drain-Source On-Resistance
BV DSS , (Normalized)

RDS(ON) , (Normalized)
1.5

1.0

1.0

0.9 ※ Notes :
1. VGS = 0 V
2. ID = 250 μ A 0.5 ※ Notes :
1. VGS = 10 V
2. ID = 25 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature

40

30
ID , Drain Current [A]

20

10

0
25 50 75 100 125 150 175

TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
(t), T h e rm a l R e s p o n s e

D = 0 .5
0
10
0 .2
※ N otes :
0 .1 1 . Z θ J C ( t ) = 3 . 2 2 ℃ /W M a x .
2 . D u t y F a c t o r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C( t )
0 .0 5
-1
10
0 .0 2 PDM
0 .0 1
t1
JC

t2
θ

s in g le p u ls e
Z

-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

Figure 11. Transient Thermal Response Curve

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

 FQPF50N06
Gate Charge Test Circuit & Waveform

VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd

DUT
3mA

Charge

Resistive Switching Test Circuit & Waveforms

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
10V DUT
td(on) tr td(off)
tf
t on t off

Unclamped Inductive Switching Test Circuit & Waveforms

L 1 BVDSS
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)

10V DUT VDD VDS (t)

tp
tp Time

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

 FQPF50N06
Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

 FQPF50N06
Package Dimensions

3.30 ±0.10
TO-220F
10.16 ±0.20 ø3.18 ±0.10 2.54 ±0.20
(7.00) (0.70)

6.68 ±0.20

15.87 ±0.20
15.80 ±0.20

(1.00x45°)

MAX1.47
9.75 ±0.30

0.80 ±0.10
(3
0°
)

#1
0.35 ±0.10 +0.10
0.50 –0.05 2.76 ±0.20
2.54TYP 2.54TYP
[2.54 ±0.20] [2.54 ±0.20]
4.70 ±0.20

9.40 ±0.20

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001

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intended to be an exhaustive list of all such trademarks.

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PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In This datasheet contains the design specifications for
Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

©2001 Fairchild Semiconductor Corporation Rev. H2