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Lecture7 Chapter4 - Study Encoders, Function Implementation Using Encoders

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81 views

Lecture7 Chapter4 - Study Encoders, Function Implementation Using Encoders

Uploaded by

Ayesha Hussain
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© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Chapter4: Combinational Logic

Lecture7- Study Encoders, Function Implementation using Encoders

Engr. Arshad Nazir, Asst Prof


Dept of Electrical Engineering
Fall 2023 SEECS 1
Objectives
• Study design and applications of Encoders
• Problem solving for Encoders

Fall 2023 2
Encoders
• An encoder is a digital circuit that performs the inverse operation of a
decoder.
• An encoder has 2n (or fewer) input lines and n output lines.
• The output lines generate the binary code corresponding to the input
value

Fall 2023 3
Encoder Design Example
• An example of encoder is octal-to-binary encoder
• It has eight inputs (one for each octal digits) and three outputs that
generate the corresponding binary number
• It is assumed that only one input has a value of 1 at any given time
• The encoder can be implemented with OR gates whose inputs are
determined directly from the truth table
• Output z is equal to 1 when the input octal digit is 1,3,5 or 7. Output y
is 1 for octal digits 2,3,6 or 7 and output x is 1 for digits 4,5,6 or 7.
These conditions can be expressed as by the Boolean functions as
shown in the next slide.

Fall 2023 4
Truth Table: Octal to Binary Encoder

Outputs Inputs
X Y Z D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1

z=D1+D3+D5+D7 y=D2+D3+D6+D7 x=D4+D5+D6+D7

Fall 2023 5
Octal-to-Binary Encoder
Implementation

z=D1+D3+D5+D7 y=D2+D3+D6+D7 x=D4+D5+D6+D7

Fall 2023 6
Previous Encoder Limitations
• The encoder defined in the last slide has the limitation that only one
input can be active at any given time. If two inputs are active
simultaneously, the output produces an undefined combination.
• For example
➢ If input D3 and D6 are 1 simultaneously the output of the encoder
will be 111 (see truth table and Boolean function for outputs).
Since z=D1+D3+D5+D7 y=D2+D3+D6+D7 x=D4+D5+D6+D7
➢ This 111 doesn’t represent either binary 3 or binary 6
• To resolve this ambiguity, encoder circuit must establish an input
priority to ensure that only one input is encoded.
• Another ambiguity is that when all inputs are zero, output with all
zeros is generated. This is same as when D0 is equal to 1. This
discrepancy can be resolved by providing an output to indicate that
at least one input is equal to 1

Fall 2023 7
Priority Encoder
• A priority encoder is an encoder circuit that includes the priority
function.
• The operation of the priority encoder is such that if two or more
inputs are equal to 1 at the same time, the input having the highest
priority will take precedence
➢ D3 has the highest priority
➢ D0 has the lowest priority
• Valid bit indicator (V) is set to 1 when one or more inputs are equal
to 1. If all inputs are 0, there is no valid inputs and V is equal to 0.
The other two outputs are not inspected when V equals 0 and are
specified as don’t care conditions

Fall 2023 8
Priority Encoder: Truth Table

x: don't-care conditions in the output, used in the inputs


to condense truth table, replaced by both 0 and then 1
V: valid output indication, implemented by OR function

Fall 2023 9
Priority Encoder: Expanded Truth Table

Fall 2023 10
Fall 2023 11
Fall 2023 12
Decoders and Encoders

Fall 2023 13
Problem Solving
Session

Fall 2023 14
Problem: 4-29
Design a 4-input priority Encoder with the inputs as in Table 4.8, but
with the input D0 having the highest priority and the input D3 having the
lowest priority.

Fall 2023 15
Fall 2023 16
Fall 2023 17
The End

Fall 2023 18

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