Eee 111 Lab Manual 2-8 (Latest)
Eee 111 Lab Manual 2-8 (Latest)
Experiment No: 02
Name of the Experiment: I-V Characteristics of diode.
Objective:
Study the I-V characteristic of diode.
Theory:
A diode is a bi-polar device that behaves as the short circuit when it is in forward bias and as an open
circuit when it is in reverse bias condition.
1. When the diode is connected across a voltage source with positive polarity of source connected
to P side of diode and negative polarity to N side, then the diode is in forward bias condition.
2. When the diode is connected across a voltage source with positive polarity of source connected
to N side of diode and negative polarity to P side, then the diode is in reverse bias condition.
Figure 1.3: Forward Bias connection. Figure 1.4: Reverse Bias connection.
If the input voltage is varied and the current through the diode corresponding to each voltage
are taken, the plot of diode current (Id) VS diode voltage (VD) will be follows:
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
At the reverse bias condition the amount of current flows through the diode is very small (at microampere
range). But if the voltage continuously increases in reverse direction, at a certain value the diode will
break down and huge amount of current will flow in reverse direction. This is called breakdown of diode.
In laboratory the breakdown will not tested because it will damages the diode permanently.
From the characteristics curve it can be seen that, a particular forward bias voltage (VT) is required to
reach the region of upward swing. This voltage, VT is called the cut-in voltage or threshold voltage of
diode. For Si diode the typical value of threshold voltage is 0.7 volt and for Ge diode is 0.3 volt.
Experimental Setup:
Procedure:
1. Measure the resistance accurately using DMM.
2. Construct the circuit as shown in Figure 1.6.
3. Vary input voltage with values given in table.
4. Measure , and VR for each increment of and record data on data table.
5. Obtain maximum value of without exceeding 25V for
6. Calculate the values of using the formula, Id = VR / R.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment: 1
Performed by Group#
Report:
1. Taking readings from the data table, draw curve of diode in a graph paper with
proper scale [x-axis: 0.2 V per unit, y-axis: any suitable range].
2. What is dynamic and static resistance of a diode?
3. From the graph, find Vd for corresponding values of Id = 5 mA and Id = 10 mA and
calculate the static resistance.
4. Considering Vdc = 2 volt, find the load line (Showing all calculations)
5. Draw the load line in the curve of diode and find Q-point.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment No: 03
Name of the Experiment: Diode Rectifier circuits.
Objective:
Study of different diode rectifier circuits.
Theory:
A rectifier converts an AC signal into a DC signal. From the characteristic curve of a diode we observe
that if allows the current to flow when it is in the forward bias only. In the reverse bias it remains open.
So, when an alternating voltage (signal) is applied across a diode it allows only the half cycle (positive
half cycle depending on the orientation of diode in the circuit) during its forward bias condition, other
half cycle will be clipped off. In the output the load will get DC signal.
Half - Wave Rectifier: Half-wave rectifier can be built by using a single diode. The circuit diagram
and the wave shapes of the input and output voltage of half wave rectifier are shown below (figure 2.1)
-
D
+
Vs RL VO
-
Full-wave rectifier using center-tapped transformer: two diodes will be connected to the ends of the
transformer and the load will be between the diode and center tap. The circuit diagram and the wave
shapes are shown in below (figure 2.2) -
D1
12 V RL
12 V
Vs
12 V - VO +
D2
Full-wave rectifier using center-tapped transformer circuit has some advantages over full-wave rectifier.
Those are -
Wastage of power is less.
Average DC output increase significantly.
Wave shape becomes smoother.
Full-wave bridge rectifier: a bridge rectifier overcomes all the disadvantages of described above. Here
four diodes will be connected as bridge connection. The circuit diagram and the wave shapes are shown
in bellow (figure 2.3) -
RL
Vs
-VO+
This rectifier however cannot produce a smooth DC voltage. It produces some ripple in the output. This
ripple can be reducing by using filter capacitor across the load.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experimental Setup:
D
+ +
+
D1 D3
10 Vp-p 10 Vp-p
1 KHz 10 KΩ C VO 1 KHz C VO
10
D4 D2
- -
Figure 2.4: Half wave Figure 2.5: Full Wave
Procedure:
1. First, connect the circuit in breadboard as shown in figure 2.4 without any capacitor.
2. Apply 1 KHz 10V (p-p) sinusoidal input signal from signal generator.
3. Connect channel 1 of oscilloscope to the input side, and channel 2 of oscilloscope to output side.
Observe the wave shapes and p-p values inputs and outputs and draw them in the graph paper with
proper p-p values.
4. Connect the 0.22µF capacitor and repeat step 3. [ decrease the Volts/DIV for proper wave-shape]
5. Now keeping capacitor fixed at 0.22 µF, Observe the change in output wave shape by 1st varying the
frequency lower than 1 Khz and then higher than 1 khz.
6. Connect the 10µF capacitor and repeat step 3 and step 5. [decrease the Volts/DIV for proper wave-
shape]
7. Repeat steps 1-6 for Figure 2.5.
Data Collection: Signature of instructor:
Experiment: 2,
Performed by Group# _____
a) Input-output without capacitor (fig 2.4) d) Input-output without capacitor (fig 2.5)
b) Input-output with 0.22uF (fig 2.4) e) Input-output with 0.22uF (fig 2.5)
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
c) Input-output with 10uF (fig 2.4) f) Input-output with 10uF (fig 2.5)
Report:
1. For Fig 2.4 and Fig 2.5, draw the input-output wave-shape without capacitor, with 0.22µF
capacitor and 10µF capacitor.
2. Compare the change in the wave-shape and peak to peak values for no capacitor at the output to 0.22
µF to 10 µF.
3. Explain the effect on the output signal for changing the frequency of the input signal
4. Between half wave and full wave which circuit produces smoother output? Briefly explain in
context with your data collection.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment No: 04
Name of the Experiment: Clipper and Clamper circuits.
Objective:
Study of Clipper and Clamper circuits.
Theory:
Clipper: Clippers remove signal voltage above and below a specified level. In the experiment no. 2, half
wave rectifier can also be called as a clipper circuit. Because it clipped off the negative half cycle of the
input signal.
A diode connected in series with the load can clipped off any half cycle of input depending on the
orientation of the diode. (Figure 4.1) -
+
Vs RL VO
-
+
Vs RL VO
-
A diode connected in parallel with the load can clip off the input signal above 0.7 volts of one half cycle
depending on the connection of the diode. Using two diodes in parallel in opposite direction both the half
cycle can be limited to 0.7 volts.
+
Vs D RL VO
-
Using a biased diode it is possible to limit the output voltage to a specified level depending on the
attached battery voltage. Either the half cycles or both of them can be clipped off above a specified
level.
D1 D2 +
Vs RL VO
-
V2 V1
In practical case for both the series and parallel clippers voltage source is not added. Required voltage
levels are maintained by adding more semiconductor diode.
Clamper: A DC clamper circuit adds a DC voltage to the input signal. For instance, if the incoming
signal varies from -10 volts to +10 volts, a positive DC clamper will produce an output that ideally swing
from 0 volts to 20 volts and a negative clamper would produce an output between 0 volts to -20 volts.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Vs D RL Vo
Experimental Setup:
(a) (b)
(a) (b)
0.1 μF 0.1 μF
D + D
+
Vs 100 KΩ VO Vs 100 KΩ VO
- -
V V
Procedure:
1. Connect the circuit as shown in the figure 4.6.
2. Using Signal generator, apply a 1kHz 10Vp-p sinusoidal voltage source input (Vm = 5V)
3. Fix Vb to 2.5V and In the same graph paper, Draw Vs and Vo.
4. Decrease the value of Vb from 2.5V to 0V, and observe the output wave shapes
5. Increase the value of Vb from 2.5V to 5V, and observe the output wave shapes
6. Repeat step 2-4 for figure 3.7 and figure 3.8
7. Record Vmax and Vmin for the output wave for the clamper circuit only for Vb=2.5V.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment: 4,
Performed by Group# _____
Vs = _____ V(p-p).
Vo (p-p)
3
4
5
Report:
1. Using values from your data table, for all the circuit diagrams plot the input-output
waveforms observed on the oscilloscope for =2.5V.
2. For Fig 4.6(a &b), Fig4.7 (a & b) and Fig 4.8 (a & b) what change did you observe in
the output voltage, In procedure-4? Explain the reason behind such a change.
3. For Fig 4.6(a &b), Fig4.7 (a & b) and Fig 4.8 (a & b) what change did you observe in
the output voltage, In procedure-5? Explain the reason behind such a change.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment No: 05
Name of the Experiment: Zener Diode applications.
Objective:
Study of the Zener Diode applications.
Theory:
The diodes we have studied before do not operate in the breakdown region because this may damage
them. A Zener diode is different; it is a silicon diode that the manufacturer has optimized for operation
in the breakdown region. It is used to build voltage regulator circuits that circuits that hold the load
voltage almost constant despite large change in line voltage and load resistance. The symbol of Zener
diode shows in figure 4.1.
The Zener diode may have a breakdown voltage from about 2 to 200 volts. These diodes can operate in
any of three regions – forward, leakage and breakdown. Figure 4.2 shows the I-V characteristics curve of
Zener diode.
Equivalent circuits of Zener Diode: Two approximation are used for Zener Diode equivalent circuit.
First Approximation : As the voltage remains constant across the Zener diode though the current
changes through it, it is considered as a constant voltage source according to the first approximation.
= VZ
Second Approximation : A Zener resistance is in series with the ideal voltage source is approximated.
RZ
=
VZ
Experimental Setup:
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Procedure:
1. Connect the circuit as shown in the figure 3.3
2. Vary the supply voltage from zero volt, complete the Table 3.1.
3. Connect the circuit as shown in the figure 3.4
4. Keep the POT at maximum position and power up the circuit.
5. Gradually decrease the POT resistance and complete the Table 3.2.
6. Replace the POT with 1KΩ resistance, vary the supply voltage and take reading for Table 3.3.
Experiment: 3,
Performed by Group# _____
Theoretical Practical
470Ω
220Ω
1KΩ
V (volts) VL (volts)
1V
3V
5V
6V
7V
8V
9V
10 V
11 V
12 V
Report:
1. Plot characteristics of Zener diode. Determine the Zener breakdown voltage
from the plot.
2. Plot IL vs VL for the data table 4.2. Scale [ x-axis: 0.1V/DIV, y-axis: any suitable range].
Find the Load regulation from the graph.
3. Plot VL vs V for the data table 4.3. Find the line regulation from graph.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment No: 06
Name of the Experiment: The Input-Output characteristics of CE (common emitter) configuration of
BJT.
Theory: Unlike the diode, which has two doped regions, a transistor has three doped regions.
They are as follows –
a) Emitter, b) Base and c) Collector.
These three doped regions form two junctions: One between the emitter and base and other
between the collector and the base. Because of these it can be thought as combination of two
diodes, the emitter and the base form one diode and the collector and base form another diode.
The emitter is heavily doped. Its job is to emit or inject free majority carrier (electron for NPN
and hole for PNP) into the base. The base is lightly doped and very thin. It passes the most of the
emitter-injected electron (for NPN) into the collector. The doping level of the collector is between
emitter and base. Figure 5.1 shows the biased NPN transistor.
RC
+
RB
VCE
+ VCC
VBB
If the VBB is greater than the barrier potential, emitter electron will enter base region. The free
electron can flow either into the base or into the collector. As base lightly doped and thin, most of
the free electron will enter into the collector.
There are three different current in a transistor. They are emitter current (IE), collector current
(IC) and the base current (IB) are shows in figure 5.2.
IC
IB
IE
Input Characteristics Curve: Input characteristics is defined as the set of curves between input
current (IB) vs. input voltage (VBE) for the constant output voltage (VCE). It is the same curve
that is found for a forward biased diode.
Output Characteristics Curve: Output characteristics is defined by the set of curves between
output current (IC) vs. output voltage (VCE) for the constant input current (IB). The curve has
the following features –
It has three regions namely Saturation, Active and Cutoff region.
The rising part of the curve, where VCE i s between 0 and approximately 1 volt is called
saturation region. In this region, the collector diode is not reversed biased.
When the collector diode of the transistor becomes reverse biased, the graph becomes
horizontal. In this region, the collector remains almost constant. This region is known as
the active region. In applications where the transistor amplifies weak radio and TV signal,
it will always be operation in the active region.
When the base current is zero, but there is some collector current. This region of the
transistor curve is known as the cutoff region. The small collector current is called
collector cutoff current.
For different value of base current (IB) an individual curve can be obtained.
Figure 5.3 : (a) Input Characteristic, (b) Output Characteristic of NPN transistor.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Circuit Diagram:
𝑹𝑩 = 𝟏00
𝑹𝑪 = 1K
Procedure:
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment: 6,
Performed by Group# _____
R B = __________________
R C = __________________
Input Characteristics:
=2V = 5V
= =
(Volts) (Volts) (Volts) (Volts) (Volts) (Volts)
(μA) (μA)
0.1 0.1
0.2 0.2
0.3 0.3
0.4 0.4
0.5 0.5
0.6 0.6
0.7 0.7
0.8 0.8
0.9 0.9
1.0 1.0
1.2 1.2
1.4 1.4
1.6 1.6
1.8 1.8
2.0 2.0
3.0 3.0
4.0 4.0
5.0 5.0
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Output Characteristics:
= 20 A = 50 A
= =
(Volts) (Volts) (Volts) (Volts)
(Amp) (Amp)
0.1 0.1
0.2 0.2
0.3 0.3
0.4 0.4
0.5 0.5
0.6 0.6
0.7 0.7
0.8 0.8
0.9 0.9
1.0 1.0
1.2 1.2
1.5 1.5
2.0 2.0
2.5 2.5
3.0 3.0
5.0 5.0
10.0 10.0
15.0 15.0
20.0 20.0
23.0
26.0
30.0
Report:
1. Plot vs. for different values of .
2. Plot vs for different values of . Show different regions of operations.
3. Find for the each [for active region only]
4. For = 15V, draw the load line and write the coordinates of the Q-point.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment No: 07
Name of the Experiment: The BJT Biasing Circuits.
Objective:
Study of the BJT Biasing Circuits.
Theory:
Biasing a BJT circuit means to provide appropriate direct potentials and currents, using external
sources, to establish an operating point or Q-point in the active region. Once the Q-point is established,
the time varying excursions of input signal should cause an output signal of same waveform. If the
output signal is not a faithful reproduction of the input signal, for example, if it is clipped on one side,
the operating point is unsatisfactory and should be relocated on the collector characteristics. Therefore,
the main objective of biasing a BJT circuit is to choose the proper Q-point for faithful reproduction of
the input signal. There are different types of biasing circuit. However, in the laboratory, we will study
only the fixed bias and self-bias circuit. In the fixed bias circuit, shown if figure 6.1, the base current
IB is determined by the base resistance RB and it remains constant. The main drawback of this circuit
is the instability of Q-point with the variation of β of the transistor. In the laboratory, we will test the
stability using two transistors with different β. In the self-bias circuit shown if figure 6.2, this problem
is overcome by using the self-biasing resistor RE to the emitter terminal.
Experimental Setup:
10V
Procedure:
1. Arrange the circuit shown in figure - 6.1 by C828. Record RC and set RB to maximum value.
2. Decrease POT RB gradually so that VCE = VCC / 2.
3. Measure voltage across RC and VCE.
4. Record the Q-point (VCE, IC).
5. Replace the C828 transistor by BD135 and repeat step 3 and 4.
6. Arrange the circuit shown in figure - 6.2 by C828. Record RC and set RB to minimum value.
7. Increase POT RB2 gradually so that VCE = VCC / 2.
8. Measure voltage across RC and VCE.
9. Record the Q-point (VCE, IC).
10. Replace the C828 transistor by BD135 and repeat step 8 and 9.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Data Sheet:
Report:
1. Which circuit shows better stability? Explain in the context of the results obtained in the laboratory.
2. Draw the DC load line for both the circuits and show the Q-point.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experiment 08:
Name of the Experiment: Study of Switching Characteristics
Introduction:
The most common transistor types are the Metal Oxide Semiconductor Field Effect Transistors
(MOSFETs) and the Bipolar Junction Transistors (BJT). BJTs based circuits dominated the electronics
market in the 1960's and 1970's. Nowadays most electronic circuits, particularly integrated circuits
(ICs), are made of MOSFETs. The BJTs are mainly used for specific applications like analog circuits
(e.g. amplifiers), high-speed circuits or power electronics.
There are two main differences between BJTs and FETs. The first is that FETs are charge- controlled
devices while BJTs are current or voltage controlled devices. The second difference is that the input
impedance of the FETs is very high while that of BJT is relatively low.
As for the FET transistors, there are two main types: the junction field-effect transistor (JFET) and the
metal oxide semiconductor field effect transistor (MOSFET). The power dissipation of a JFET is high
in comparison to MOSFETs. Therefore, JFETs are less important if it comes to the realization of ICs,
where transistors are densely packed. The power dissipation of a JFET based circuit would be simply
too high. The combination of n- type and p-type MOSFETs allow for the realization of the
Complementary Metal Oxide Semiconductor (CMOS) technology, which is nowadays the most
important technology in electronics. All microprocessors and memory products are based on CMOS
technology. The very low power dissipation of CMOS circuits allows for the integration of millions of
transistors on a single chip. In this experiment, we will concentrate on the MOSFET transistor. We
will investigate its characteristics and study its behavior when used as a switch.
Theory:
MOSFETs Structure and Physical Operation
The MOSFETs are the most widely used FETs. Strictly speaking, MOSFET devices belong to the
group of Insulated Gate Field Effect Transistor (IGFETs). As the name implies, the gate is insulated
from the channel by an insulator. In most of the cases, the insulator is formed by a silicon dioxide
(SiO2), which leads to the term MOSFET. MOSET like all other IGFETs has three terminals, which
are called Gate (G), Source (S), and Drain (D). In certain cases, the transistors have a fourth terminal,
which is called the bulk or the body terminal. In PMOS, the body terminal is held at the most positive
voltage in the circuit and in NMOS, it is held at the most negative voltage in the circuit.
There are four types of MOSFETs: enhancement n-type MOSFET, enhancement p-type MOSFET,
depletion n-type MOSFET, and depletion p-type MOSFET. The type depends whether the channel
between the drain and source is an induced channel or the channel is physically implemented and
whether the current owing in the channel is an electron current or a hole current.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
If we put the drain and source on ground potential and apply a positive voltage to the gate, the free
holes (positive charges) are repelled from the region of the substrate under the gate (channel region)
due to the positive voltage applied to the gate. The holes are pushed away downwards into the
substrate leaving behind a depletion region. At the same time, the positive gate voltage attracts
electrons into the channel region.
When the concentration of electrons near the surface of the substrate under the gate is higher than the
concentration of holes, an n region is created, connecting the source and the drain regions. The
induced n-region thus forms the channel for current flow from drain to source. The channel is only a
few nanometers wide. Nevertheless, the entire current transport occurs in this thin channel between
drain and source.
A common application of MOSFETs is switches in analog and digital circuits. Switches in analog
circuits can be used for example in data acquisition systems, where they serve as analog multiplexors,
which allow the selection of one of several data inputs. A simple example of a switching circuit based
on an n-type enhancement transistor and a resistor is shown below.
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
The voltage applied to the gate controls the conductance of the channel. A zero or low value of VGS,
the conductance is very low so that is the transistor acts like an open circuit and no current flows
through the load resistor RL. When VGS exceeds the threshold, the channel conductance becomes
higher and the transistor acts like a closed switch. The channel resistance is not getting zero but the
resistance is getting small so that the output voltage Vout is getting small. Fig.(a) below shows an
NMOS switching FET and its models for Vin = 0 (Fig. (b)) and Vin = +5V (Fig. (c)). In each case, the
FET is modeled as a mechanical switch.
As for PMOS, a negative value of VGS has to be applied to turn the transistor on. The operation can be
described using the curves shown in figure below. When the input voltage, VGS, of the transistor
shown is zero, the MOSFET conducts virtually no current, and the output voltage, Vout, is equal to
VDD. When VGS is equal to 5V , the MOSFET Q-point moves from point A to point B along the load
line, with VDS = 0.5V . Thus, the circuit acts as an inverter. The inverter forms the basis of all MOS
logic gates.
100kΩ
NORTH SOUTH UNIVERSITY
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Experimental Setup:
100k
Procedure:
1. Set VGS to zero and record the VDS, VL and ID.
2. Increase the gate voltage VGS gradually and record the readings.
3. Take reading until ID = 20mA (or the saturation current of the MOSFET).
4. Note the condition of VDS and ID of steps 1 and 3.
5. Repeat the experiment for VDD = 15 Volts.