Interview Questions

1. What is Blind and Buried Via?

Blind vias are via holes which are formed to connect the outer circuit with inner layers, but DO NOT go
through the entire board
Buried vias or embedded vias are via holes used to connect inner layers and are not visible in the outer
layers.
Blind vias are Often used most of the PCB than Burried via.

2. What is micro via?

Via in Pad microvias play a decisive role in the miniaturisation of circuit boards. “Via in Pad“ means that
microvia holes are located directly in the solder pads. As microvias are not blind holes no capillary forces
arise. The solder deposit fills the minimum hollow space.

3. what is Aspect Ratio?

The ratio of the length or depth of a hole to its preplated diameter.

Most manufacturers can manufacture 6:1 aspect ratio. If you had a 1.5mm (.060") board thickness your
smallest hole can be 0.25mm (.010"). Formula: 0.25mm X 6 = 1.5mm.

The smaller the aspect ratio the easier it is to plate the hole. The higher aspect ratios are more difficult to
plate the hole with an even copper wall. Since all vias are plated through, a high aspect ratio (small hole /
thick board) will plate the holes near the outer edge of the hole but not in the center of the hole where it is
vital. Uneven hole plating is one of the leading causes of "Cracked Via Barrels" when your holes exceed the
aspect ratio that your manufacturer is capable of plating. A high Tg is the second most common cause of
"Cracked Via Barrels" and Thermal Cycling is the next most common cause of "Cracked Via Barrels". You
do not want "Cracked Via Barrels". This will initially cause intermittent signal integrity problems
(engineers hate when that happens) and will eventually develop into a dead board.

Some manufacturers boost of 10:1 aspect ratio capabilities but that reduces your potential vendor list.
Don't forget the different board thickness:
0.75mm (.030")
1mm (.040")
1.5mm (.060")
2.3mm (.090")
3.2mm (.125")

Using a 6:1 aspect ratio on a 1mm thick board, you can safely use a 0.16mm (.0065") via hole. But when you
use 2.3mm board thickness your smallest hole can only be 0.38mm (.015").
4. How do you calculate the trace impedance of a PCB trace ?
There are many methods. A formula method gives a quick result, though it is not highly accurate. A 2D
Field solver gives more accurate result. The Trace impedance depends upon the width of the trace,
separation from the ground / power plane, and the relative permittivity of the material

5. what the formula for the trace with calculation?

if it is for controlled impedance traces, need to consider the heigh (distance )from refference plane, just
thickness and width alone is not enough, if it is for power, consider the thickness of copper and width of
trace.
6. What is the use of a decoupling capacitor.
A decoupling capacitor is used to smoothen the power supply noise. It should be placed as close to the ICs
for which it is intended as possible.

7. What is DRC ? What Kind of DRC errors you find in PCB Design ?
DRC stands for Design Rule checking. A PCB should not have any electrical failure before we tape out for
the manufacturing. Common DRC errors include, trace to pad violation, pad to pad violation, component
keep out violation. Additionally a PCB Design may have high speed design rule related contraints. This
may include, length matching constraints, differential signal length mathching constraint.

8. What are the things you should do you ensure design for compliance for EMI ?
We should use commond mode chokes for all cables connectors. The common mode chokes should be
placed as close to the connector as possible. The Power and ground planes should be as close to each other
as possible. The High speed signal should refer to a ground or power plane and should not cross a split
plane. Stitching capacitor should be used in case split plane is used.

9. A large thermal pad is divided into four sections ? What is the use of it ?
The open area between the 4 sections lead to escape of the gases during the reflow and soldering process. It
leads to better manufacturability.

10. The width of a trace is increased ? Will its characteristic impedance increase of
decrease ?
The Capacitance per unit length of the trace increases and therefore, the characteristic impedance of the
trace decreases.

11. What is Transmission Line Effects

At low frequencies, a wire or a PCB track may be an ideal circuit without resistance, capacitance or
inductance.But at high frequencies, alternating (AC) circuit characteristics dominate causing impedances,
inductances and capacitances.A circuit model can be calculated, as shown in figure 1 below, and used to
determine the characteristic impedance of the wire or track.This impedance of the wire is extremely
important, as any mismatch within the transmission path will result in a reduction in quality of the signal.
12. HOW IMPEDANCE GOT VARIED?

Any feature that changes the cross section or geometrical shape of the net will change the impedance the
signal sees.

1. A line-width change

2. A layer change

3. A gap in return-path plane

4. A connector

5. A branch, tee, or stub

6. The end of a net

13. What is RINGING?

In electrical circuits, ringing is an unwanted oscillation of a voltage or current.

It happens when an electrical pulse causes the parasitic capacitances and inductances in the circuit (i.e.
those that are not part of the design, but just by-products of the materials used to construct the circuit)

Step response (the response to a sudden change in input). It is also known as hunting. It is closely related to
overshoot, generally occurring following overshoot, and thus the terms are at time conflated.

It is also known as ripple, particularly in electricity or in frequency domain response.

Ringing due to signal reflection, in which case it may be minimized by impedance
matching.

LEADS TO:
 extra current to flow, thereby wasting energy and causing extra heating of the components

 unwanted electromagnetic radiation to be emitted

 delay arrival at a desired final state (increase settling time)

 unwanted triggering of bi-stable elements in digital circuits.

FIXATIONS:

 Add resistive termination to the PCB (in series or parallel).

 Change the Select IO standard to one with a lower current drive.

14. What is CROSS TALK?

 Signal transmitted on one circuit or channel of a transmission system creates an undesired effect in
another circuit or channel

 Crosstalk is usually caused by undesired capacitive, inductive, or conductive coupling from one
circuit, part of a circuit, or channel, to another.

 Capacitive coupling is the transfer of energy within an electrical network by means of the
capacitance between circuit nodes.

 Two conductors are referred to as inductively coupled or magnetically coupled when they are
configured such that change in current flow through one wire induces a voltage across the ends of the other
wire through electromagnetic induction

 Near End Crosstalk (NEXT) is interference between two pairs of a cable measured at the same end of
the cable as the transmitter.

 Far end crosstalk (FEXT) is interference between two pairs of a cable measured at the other end of
the cable from the transmitter

 Reduce Cross-Talk In Either Micro-Strip Or Strip-Line Layouts

 Widen spacing between signal lines as much as routing restrictions will allow

 Use differential routing techniques wherever possible, especially for critical PCB traces

 Give preference to stripline over microstrip when routing critical signals sensitive to cross talk.

 Reduce the separation between the signal and ground layers as far as possible while still achieving
the required impedance.
 Space out the critical high speed traces as much as possible. A minimum spacing of twice the signal
width is a good number.

 Pay special attention to high speed clock signals. Keep other traces away from clock signals.

 Use guard traces if the very high immunity to noise is required.

 If guard trace is used, use vias to connect the guard trace to ground.

 For traces running in parallel, the cross talk level increases with the increase in length of
parallelism. The far end crosstalk or FEXT saturates after a certain length ( depending upon the rise time of
the signal) and the cross talk does not increase further. There is no gain in trying to minimize the length of
parallelism beyond the critical length.

 Make sure traces in adjacent layers run perpendicular to each other.

 Add thicker soldermask on the top and bottom layer. This will decrease far end cross talk.

 Use lower dielectric constant material. The lower dielectric constant reduces the separation between
the signal and the return plane, thereby reducing the crosstalk.

Use a design with lower characteristic impedance.

15. What is Ground bounce?

 Ground bounce is the voltage between two points in the return path due to a changing current in a
loop.

 Current flow during a high to low transition causing “bounce.” This can change the input
thresholds to the device as well as result in output pulses being transmitted to a receiver.

 Ground bounce is the primary cause of switching noise and EMI.

 It is primarily related to the total inductance of the return path

To decrease ground-bounce voltage noise, .

o Use buffers, particularly for large memory arrays or long lines,Everything does not have to be inside
of the FPGA or ASIC

o Avoid sockets

o Keep clocks close to ground pins

Factors Play A Criticalrole In The Generation Of Ground Bounce

 the location of the output pin.The location of the output pin with respect to the device ground also
affects the magnitude of ground bounce. Tests have shown that outputs located closer to the ground lead
generally have 30% to 50% less noise than pins further away

 The number of outputs switching simultaneously;

 the location and type of load on the line;

 the VDD voltage; the device technology; and

 the output and ground inductances

16. what is POWER NOISE ?

Tips for Power Supply Noise Reduction

 Design a stack up that keeps power and ground planes together.

 Keep the separation between power and ground plane as small as possible.

 Design a stack up that uses more power and ground planes.

 Use bigger vias to connect decoupling capacitors to power and ground layers. Your system should
have at least two types of vias, smaller vias for high speed signals and larger vias for power and ground
connections.

 Use wider traces to connect decoupling capacitors to power and ground planes.

 Keep vias connecting power and ground ends of a decoupling capacitor as close as possible.

 For larger capacitors use multiple vias to connect power and ground signals.

 Use ceramic decoupling capacitor that has wider metal contact to lower the ESL (Effective Series
Inductance). For example, a 0612 Capacitor will have lower ESL than 1206 even with same physical size.

 Place decoupling capacitors as close to the IC power pins as possible.

 If you are using multiple vias to connect a large capacitor to a power plane, keep them apart.
Similarly, keep the multiple vias connecting the ground end of a large capacitor far.

 Prefer a package with short leads. In DDR, for example if a choice is available use BGA package over
SSOP package.

 Use large number of decoupling capacitor to reduce total effective series inductance.

 Use smaller size decoupling capacitor. Prefer 0402 over 0603 or 0805.

 Place power supply regulator IC close to the place where it will be used to minimize.

17. What is Electromagnetic Interference?

Disturbance that affects an electrical circuit due to either electromagnetic conduction or electromagnetic
radiation

Tips for EMI Reduction

 Keep all traces that carry high frequency and fast edge rate signals in stripline in place of microstrip.
 Make provision for Spread Spectrum clock in the design to reduce the peak amplitude of the
radiated spectrum.

 Keep traces that carry high frequency and fast edge rate signals well inside the edge of the board.

 Keep the differential signals as symmetrical as possible.

 On the clock signal place a unpopulated small capacitor. The capacitor reduces the edge rate of the
clock signal, marginally reducing the EMI. It can make marginally failing system to pass.

 Use connectors that have inbuilt common mode chokes.

 Keep the high speed traces away from the traces that go to the connectors. The crosstalk that enter
to the signals going out of the box can radiate and become source of failure.

 Keep the power and ground signal layers as close as possible.

 Keep the lengths of high speed signals as small as possible. Place the ICs and component such that
the lengths of high speed signal traces are minimized.

 If there are many values of series terminating resistance that gives acceptable values use one with
slightly higher resistance value – this will reduce current and minimize EMI.

 Use lower operating voltage for clock oscillators, if possible. Given a choice to operate a clock
oscillator at 3.3V and 2.5V, for example, use 2.5V in place of 3.3V.

 Make provision for Metallic shielding around RF circuits.

 Keep High Speed traces away from the connectors at the edge of the board.

 Use extra power and ground layers if they are not expensive.

 User technologies that uses lower voltage for operation.

 Make provision for a ferrite choke at the entry path of power supply to reduce the conducted
emission

18. What is EMC?

 Electromagnetic compatibility (EMC) encompasses both emission and susceptibility for a given
system.

 A system is electromagnetically compatible if it satisfies three criteria:

 It does not cause interference with other systems.

 It is not susceptible to emissions from other systems.

 It does not cause interference with itself.

19. what is NOISE REDUCTION TECHNIQUE
Three ways to prevent interference are:

 Suppress the emission at its source.

 Make the coupling path as inefficient as possible.
 Make the receptor less susceptible to emission

Device-LevelTechniques

 Use multiple power and ground pins

 Use fewer clocks

 Eliminate fights or race conditions

 Reduce output buffer drive

 Use low-power techniques

 Reduce internal power/ground trace impedance

 For long buses, keep high-speed traces separated from low-speed traces.

 Add extra spacing between high-speed and low-speed signals and run

high-frequency signals next to a groundbus.

 Supply good ground imaging for long traces, high-speed signals

 Turn off clocks when not in use

 Eliminate charge pumps if possible

 Minimize loop area within chip

Board-structure noise-reduction techniques

 Use ground and power planes

 Maximize plane areas to provide low impedance for power supplydecoupling

 Minimize surface conductors

 Use narrow traces (4 to 8 mils) to increase high-frequencydamping and reduce capacitive coupling

 Segment ground/power for digital, analog, receiver, transmitter,relays, etc.

 Separate circuits on PCB according to frequency and type

 Do not notch PCB; traces routed around notches can causeunwanted loops

 Use multilayer boards to enclose traces between power andground planes as shown inFigure
Multilayer Board Layout
 Avoid large open-loop plane structures

 BorderPCBwithchassisground;thisprovidesaformidableshield(orfieldinterceptor)topreventradiation(
orreducesusceptibility)at the circuit boundaries.

 Use multipoint grounding to keep ground impedance low at highfrequencies

 Use single-point grounding only for low-frequency, low-levelcircuits

 Keep ground leads shorter than one-twentieth (1/20) of awavelength to prevent radiation and to
maintain low impedance

Routing noise-reduction techniques include:

 Use 45-degree, rather than 90-degree, trace turns. Ninety-degree turns add capacitance and cause
change in the characteristic impedance of the transmission line.
 Keep spacing between adjacent active traces greater than tracewidth to minimize crosstalk.
 Keep clock signal loop areas as small as possible.
 Keep high-speed lines and clock-signal conductors short and direct.
 Do not run sensitive traces parallel to traces that carry highcurrent,fast-switching signals.
 Eliminate floating digital inputs to prevent unnecessary switching and noise generation:
 Configure multipurpose device pins as outputs.
 Set three-state pins to high impedance.
 Use appropriate pullup or pulldown circuitry.
 Avoid running traces under crystals and other inherently noisy circuits.
 Run corresponding power and ground and signal and return
 traces in parallel to cancel noise.Keep clock traces, buses, and chip-enable lines separate from
input/output (I/O) lines and connectors.

To protect critical traces:

 Use 4-mil to 8-mil traces to minimize inductance.
 Route close to ground plane.
 Sandwich between planes.
 Guardband with a ground on each side.
 Use orthogonal crossovers for traces and intersperse ground traces to minimize crosstalk, especially
when analog and digital signals are routed together.
 Route clock signals perpendicular to I/O signals.

FILTER TECHNIQUES INCLUDE:

 Filter the power line and all signals entering a board.

  Use high-frequency, low-inductance ceramic capacitors for integrated circuit (IC) decoupling at
each power pin (0.1 µF for up to 15 MHz, 0.01 µF over 15 MHz).
 Use tantalum electrolytic capacitors as bulk decoupling capacitors at headers and connectors. Bulk
decoupling capacitors recharge the IC decoupling capacitors.
 Bypass all power feed and reference voltage pins for analog circuits.
 Bypass fast switching transistors.
 Decouple locally whenever possible.
 Decouple power/ground at device leads.
 Use ferrite beads at power entry points. Beads are an inexpensive and convenient way to attenuate
frequencies above 1 MHz without causing power loss at low frequencies. They are small and
can generally be slipped over component leads or conductors.
 Use multistage filtering to attenuate multiband power supply noise
as shown in Figure 8.

OTHER DESIGN TECHNIQUES INCLUDE:

 Mount crystals flush to board and ground them.

 Use shielding where appropriate.
 Use the lowest frequency and slowest rise time clock that will do the job.
 Use series termination to minimize resonance and transmission reflection. Impedance mismatch
between load and line causes a portion of the signal to reflect. Reflections induce ringing and overshoot,
producing significant EMI. Termination is needed when line length, L, (inches) exceeds 3 tr (ns).

The value of the termination resistor is given by:

RL = Z0/(1 + CL/CLine)1/2 (2)
Where:
Z = Characteristic impedance of the line without the load(s)
CL = Total load distributed along the line
CLine = Total capacitance of the line without the load(s)

 Route adjacent ground traces closer to signal traces than othersignal traces for more effective
interception of emerging fields.
 Place properly decoupled line drivers and receivers as close as practical to the physical I/O interface.
This reduces coupling to other PCB circuitry and lowers both radiation and susceptibility.
 Shield and twist noisy leads together to cancel mutual coupling out of the PCB.
 Use clamping diodes for relay coils and other inductive loads.
20.DFX guideline

Design for manufacturability (DFM for short. Often referred to as "design for manufacturing") is a
design methodology intended to ease the manufacturing process of a given product. In
the PCBdesign process DFM leads to a set design guidelines that attempt to ensure
manufacturability. By doing so, probable production problems may be addressed during the design
stage.
Ideally, DFM guidelines take into account the processes and capabilities of the manufacturing
industry. Therefore, DFM is constantly evolving.
As manufacturing companies evolve and automate more and more stages of the processes, these
processes tend to become cheaper. DFM is usually used to reduce these costs. For example, if a
process may be done automatically by machines (i.e. SMT component placement and soldering),
such process is likely to be cheaper than doing so by hand.
Raw laminate - both panel utilization
Complexity factors (component/design
Total number of holes
Gold requirements
Solder mask requirements
Electrical test parameters
Yield
Minimized environmental impact
21.Stackup design
Stack Up design for 6 layers and 8 layers:

22.Undershoot and Overshoot

Undershoot -->voltage below VSS
Overshoot-->voltage above VDD

when a signal or function exceeds its target. It arises especially in the step response of bandlimited systems
such as low-pass filters. It is often followed by ringing, and at times conflated with this latter.
Overshoot occurs when the transitory values exceed final value. When they are lower than the final value,
the phenomenon is called "undershoot".

23.Minimum trace width and airgap u worked.

4 mil and 4 mil

24.Propogation delay and relative propogation delay .

In general it is the length of time taken for the quantity of interest to reach its destination.

relative propogation delay

25.impedance formula.

Microstrip:

Capacitive Load Modify:

Stripline:

Capacitive Load Modify:

26.Routing strategy.
Serptine

Daisy

Star

Single ended

Differential

27. Minimum drill size u have used.

4mil

28.Types of Vias
Stub via

Blind and buried

Back drill

Micro via

29.Annular rings
The copper pad area that remains after a hole is drilled through the pad, measured from edge of hole to edge
of pad.

30.Wat are things need to have in Assembly layer

Ref Des

Pin one marking

31.Copper thickness for Top & inner layers?

Top 1 ounce and inner layer 0.5 ounce

32.Wat is the Max & Min value of total Finished thickness worked
62 mil and 125 mil

33.Do we have reference plane for TOP & Bottom Layers

Yes

34.IPC standards
2222 and 7351B
19.Analog and digital routing and separation

Seprate ground layer nd power layer both the traces do not run pairly and not adjacent to each other

35.Purpose of De-caps & why it should be place near to IC

Coupling capacitors are used to pass AC signals in an electronic circuit while blocking DC. They are placed
between the two parts of the circuit.
Decoupling capacitors are used to reduce unwanted AC signals riding on DC supply circuits and also in
places in a circuit where AC signals need to be eliminated. These are usually placed between the DC supply
and the ground of the circuit or directly across another component.
The frequency of the ripple can have a role in choosing the capacitor value. Rule of thumb is the higher the
frequency, the smaller the bypass capacitor you need. If you have very high frequency components in your
circuit, you might consider a pair of capacitors in parallel. One with a large value, one with a small value. If
you have very complex ripple, you may need to add several bypass capacitors. Each cap is targeting a
slightly different frequency. You may even need to add a larger electrolytic cap in case the amplitude of the
lower frequencys is too great. For example, the circuit on the right is using three different capacitor values
in parallel. Each will respond better to different frequencies. The 4.7uF cap (C4) is used to catch larger
voltage dips which are at relatively low frequencies. The cap C2 should be able to handle the midrange
frequencies, and C3 will handle the higher frequencies. The frequency response of the capacitors is
determined by their internal resistance and inductance.
Bypass capacitors help filter the electrical noise out of your circuits. They do this by removing the
alternating currents caused by ripple voltage. Most digital circuits have at least a couple of bypass
capacitors. A good rule of thumb is to add one bypass capacitor for every integrated circuit on your board.
A good default value for a bypass cap is 0.1uF. Higher frequencies require lower valued capacitors.

36.Wat is signal Integrity

SI is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is
represented by a voltage (or current) waveform. However, digital signals are fundamentally analog in
nature, and all signals are subject to effects such as noise, distortion, and loss. Over short distances and at
low bit rates, a simple conductor can transmit this with sufficient fidelity. At high bit rates and over longer
distances or through various mediums, various effects can degrade the electrical signal to the point where
less-than-ideal conditions (errors) occur, and the system or device fails. Signal integrity engineering is the
task of analyzing and mitigating these effects. Signal integrity engineering is an important activity at all
levels of electronics packaging and assembly, from internal connections of an integrated circuit (IC),
[1]
through the package, the printed circuit board (PCB), the backplane, and inter-system connections

37.Main Factors of signal Integrity

Ringing, crosstalk, ground bounce, distortion, signal loss, and power supply noise.
38. skin effect?
Skin effect is the tendency of an alternating electric current (AC) to become distributed within
a conductor such that the current density is largest near the surface of the conductor, and decreases with
greater depths in the conductor.

The electric current flows mainly at the "skin" of the conductor, between the outer surface and a level
called the skin depth.

39. Differential pair (coupling and un coupling, phase tolerance).

Has its own signal as reference signal.

40. How can we vary the Impedance?

Dielectric constant, Trace width, copper thickness, dielectric thickness

41. What are things need to have in DFM

All the fab qualities such as listed in the FAB Details.

42.. What PCB (Printed Circuit Board) material should I use?

The PCB material must be chosen entirely on the basis of a balance of design requirement, volume
production, and cost. Electrical elements that need be taken into account during high-speed PCB
design are called design demand. In addition, the frequency should be taken into account when
determining the dielectric constant and dielectric loss.

43: How can high-frequency interference be avoided?

The most important approach for overcoming high-frequency interference is to minimise crosstalk,
which can be accomplished by increasing the distance between high-speed signals and analogue
signals or by using ground guard or shunt traces alongside analogue channels. Furthermore, the
noise interference induced by digital ground on analogue ground must be taken into account.

44.What is the best way to arrange traces that convey differential signals?

When designing traces carrying differential signals, two points should be kept in mind. On the one
hand, two lines should be the same length; on the other, the spacing between two lines should
remain parallel.
 1. How can you organise traces conveying differential signals when the output terminal only has one clock
signal line?

In order for traces carrying differential signals to work, both the signal sources and the receiving end
must be differential signals. As a result, differential routing cannot be used with clock signals with only
one output end.

5 .Is it possible to apply matching resistance between differential pairs at the receiving end?

At the receiving end, matched resistance is frequently applied between differential pairs. matching
resistance is usually used.

1. Why should differential pair traces be parallel and close to each other?

Differential pair traces should be close and parallel to one other. Differential impedance, a critical
reference parameter in differential pair design, determines the distance between differential pair
traces.

1. How can conflicts between manual and automatic routing on high-speed signals be resolved?

Most automatic routers may now specify constraint constraints to regulate wire running manner and
number of through holes. In terms of wire running methodologies and constraint condition setup, all
EDA vendors differ significantly. The ability to run wires is closely connected to the difficulty of
autonomous routing. As a result, this issue can be rectified by purchasing a router with a high
throughput.

1. The blank space of signal layers can be plated with copper in high-speed PCB design. On grounding
and powering, how should copper be divided across many signal layers?

In most blank areas, copper covering is largely attached to the ground. Because coated copper
reduces characteristic impedance a little, the distance between copper coating and signal lines
should be carefully calculated. Other layers' characteristic impedance should not be altered in the
meantime.

1. Can a micro strip line model be used to calculate characteristic impedance on the power plane? Is it
possible to utilise the micro strip line model on communications between the power plane and the
ground plane?

Of course. Both the power plane and the ground plane can be used as reference planes in the
calculation of characteristic impedance.

1. Can test points created by automation on high-density PCBs match the testing demands of large-scale
manufacturing?

It depends on the situation whether test point regulations are consistent with test machine
requirements. Furthermore, if routing is done too intensively and test point restrictions are too
rigorous, there may be no way to put test points on each line segment. Manual procedures can, of
course, be employed to supplement test points.

1. Can the addition of test points affect the quality of high-speed signals?

It all relies on the situation, such as the test point adding method and the signal running speed.
Adding test points is accomplished by attaching them to lines or removing a segment.

1. How should the ground lines of each PCB be connected when a few of PCBs are integrated into a
system?

According to Kirchoff's current law, when power or signals are delivered from Board A to Board B, an
equal amount of current is returned from the ground plane to Board A, and the current on the ground
plane flows back at the path with the lowest impedance. As a result, the number of pins contributing
to the ground plane at each interface of power or signal connectivity should never be too small, in
order to limit ground impedance and noise. In addition, the entire current loop should be examined,
particularly the area where current is the greatest and the ground plane connection.

13: Can ground lines be added to differential signal lines in the middle?

Ground lines cannot be added to differential signal lines because the benefit of mutual coupling
between differential signal lines, such as flux cancellation and noise immunity, is the most important
aspect of the differential signal line principle. If ground lines are put between them, the coupling effect
will be lost.

1. What is the principle behind selecting an appropriate PCB and covering the grounding point?

The idea is to use chassis ground to provide a low-impedance conduit for returning current and to
control the path of that returning current. Screws, for example, are commonly used to connect the
ground plane to a high-frequency component or clock generator. to limit the total current loop area as
much as feasible, i.e. to reduce electromagnetic interference.

1. When it comes to PCB debugging, where should you start?

When it comes to digital circuits, the following steps should be followed in order. To begin, all power
levels should be double-checked to ensure that the design requirement is met on average. Second,
make sure that all of the clock signal frequencies are working properly and that there are no non-
monotonic issues on the edge. Third, in order to meet the standard requirement, reset signals must
be confirmed. If all of the above is true, the chip should send signals in the first cycle. Then, using the
system operating protocol and the bus protocol, debugging will be carried out.

1. What is the ideal method for designing a high-speed, high-density PCB with a set board area?

Crosstalk interference should be given special attention during the design of high-speed and high-
density PCBs since it has a significant impact on timing and signal integrity. There are a few design
options presented. First, the routing characteristic impedance should be regulated for continuity and
matching. Second, observe the spacing, which is usually twice the line width. Third, the appropriate
termination mechanisms should be chosen. Fourth, routing should be done in diverse directions in
adjacent levels. Fifth, to expand route space, blind/buried vias might be used. Furthermore,
differential and common-mode termination should be preserved to minimise the impact on timing and
signal integrity.
17 .At analogue power, the LC circuit is commonly used to filter the wave. Why is it that LC
sometimes outperforms RC?

When comparing LC with RC, it's important to consider if the frequency band and inductance are
properly chosen. Because inductance reactance is connected with inductance and frequency, LC
performs worse than RC if the noise frequency of power is too low and inductance isn't high enough.
However, one of the disadvantages of RC is that the resistor consumes a lot of energy and is
inefficient.

1. What is the best strategy to meet EMC requirements without breaking the bank?

The cost of a PCB board increases due to EMC, mainly because the layer count is increased to
increase shielding stress and some components, such as ferrite beads or chokes, are prepared to
halt high-frequency harmonic wave components. Other shielding structures on other systems should
also be employed to meet EMC requirements. To begin, as many components with a low slew rate as
possible should be used to reduce high-frequency sections created by signals. Second, high-
frequency components should never be installed too close to connectors on the outside. Third, high-
speed signals' impedance matching, routing layer, and return current channel should be carefully
planned to minimise high-frequency reflection and radiation.

1. When there are many digital/analog modules on a PCB board, the standard solution is to divide them.
Why?

The reason for separating digital and analogue modules is that noise is generated at power and
ground when high and low potentials are switched, and the amount of noise is proportional to signal
speed and current. Even though analogue and digital signals do not come across, analogue signals
will be influenced by noise if analogue and digital modules are not split and the noise generated by
the digital module is bigger and the circuit at the analogue region is similar.

20. How should impedance matching be implemented when designing high-speed PCBs?

When it comes to high-speed PCB design, impedance matching is crucial. one of the most important
considerations The absolute relationship between impedance and routing can be found in impedance.
Characteristic impedance, for example, is determined by a number of factors such as the distance
between the microstrip or stripline/double stripline layer and the reference layer, routing width, PCB
material, and so on. To put it another way, characteristic impedance cannot be determined until the
circuit is routed. The most important answer to this problem is to prevent impedance discontinuity as
much as feasible.

21. Which EMC/EMI mitigation measures should be taken throughout the high-speed PCB design
process?

In general, both radiated and conducted components of EMI/EMC design should be considered. The
former belongs to the segment with a higher frequency (greater than 30MHz), while the latter belongs
to the portion with a lower frequency (less than 30MHz) (less than 30MHz). As a result, both the high-
frequency and low-frequency portions of the signal should be noted. Component placement, PCB
stack up, routing, component selection, and other aspects of a good EMI/EMC design should all be
considered. Costs are likely to rise if such factors are ignored. The clock generator, for example,
should be kept as far away from the external connector as practicable. Additionally, connecting points
between the PCB and the chassis should be carefully chosen.
22. What is the topology of a routing network?

In a network with numerous terminators, routing topology, also known as routing order, refers to the
order of routing.

23. What changes should be made to the routing topology to improve signal integrity?

Because this form of network signal is so complicated, the topology varies depending on the
direction, level, and type of signal. As a result, determining which types of signals are favourable to
signal quality is tough.

24 What is the significance of copper coating?

Copper plating is frequently done for a couple of reasons. To begin with, a huge ground or power
copper covering will have a shielding effect, and some special grounds, such as PGND, can serve as
a protective ground. Second, to assure superior electroplating or stop lamination performance.
Copper should be coated on PCB boards with less routing to prevent deformation. Third, signal
integrity necessitates the use of copper covering. High-frequency digital signals should have a
complete return path, and DC network routing should be minimised. Thermal dissipation should also
be taken into account.

25. What is the definition of return current?

High-speed digital signals move from drivers to carriers along a PCB transmission line, then back to
the driver terminal via the quickest path along ground or power. Return current refers to the signals
that return to ground or power.

Where’s noise coming from?

There is no shortage of guidance on designing with EMC in mind, and many companies have their
own in-house PCB design and EMC rules. Guidance can also come from external sources, such as
legislative bodies, IC vendors and customers. However, accepting all guidelines at face value can
lead to an over-defensive EMC strategy, and introduce project delays. Rules should be evaluated
individually to determine if they apply to the current design.

That said, your basic, common sense rules will always apply. For instance, to supress noise sources
on a PCB you should:

• Keep clock frequencies as low as possible and rising edges as slow as possible (within the scope of
the requirements spec’);
• Place the clock circuit at the centre of the board unless the clock must also leave the board (in
which case place it close to the relevant connector);
• Mount clock crystals flush with the board and ground them;
• Keep clock loop areas as small as possible;
• Locate I/O drivers near to the point at which the signals enter/leave the board; and
• Filter all signals entering the board.
While the above measures will help mitigate against some of the most common EMI issues, every
powered PCB will still radiate EM energy. This is because every current produces a magnetic field
and every charge causes an electric field. The total radiation will be the sum of signal loop differential-
mode radiation, common-mode radiation (both voltage- and current-driven) and radiation produced by
the Power Distribution System (PDS).

Looking at these in more detail

• Differential mode radiation is caused by transmission line loops, and the signals creating differential
currents (see Figure 1). Countermeasures include using shielded layers (Vcc or Ground), placing
critical signals on inner layers (also known as striplining), avoiding long parallel runs for signals and,
as mentioned above, minimising the loop area and keeping signal rise and fall times as slow as
possible.

• Common mode radiation is often the more critical EMC design aspect as the EMI is more ‘visible’ in
the far field. It is created from parasitic currents (for example, switching currents or inducted currents
by flux couplings) or parasitic voltages (such as crosstalk voltages to active IO-signals). The
countermeasures include removing the sources of those parasitic currents and voltages - hence
avoiding crosstalk between fast-switching signals – and smarter component placement and routing to
avoid flux coupling and wrapping effects.

• As for PDS, it can radiate because the PCB is essentially an LCR resonator, comprising inductive
elements (the tracks), capacitance (ground and voltage planes are like the plates of a capacitor) and
resistance. Countermeasures for PDS EMI include lowering the board impedance, avoiding
inductance and ensuring sufficient decoupling.

In addition, ICs are also a source of EMI and will contribute to the PCB’s EM profile. This must be
factored in during IC selection, and chip vendors should be able to provide you with information on
the EMI behaviour of the circuits.

Rule checkers and simulations

Many PCB design tools include EMC rule checkers. Checks include looking at the design data
geometry for instances where signal crosstalk may occur (because of parallel-routed traces),
instances of little or no shielding, and where decoupling may be required.

The rules will incorporate the ‘know-how’ of many EMC engineers. However, it is important to know
their origin and how they were implemented by the CAD tool vendor; and you are in your rights to ask
to see the vendor’s rule books. The tools should also allow you to highlight PCB areas where EMI
suppression and EMC integrity are key – you tell the tool what your priorities are.

But let’s not forget, these are post-layout checks. It is always best to design with EMI and EMC in
mind rather than embark on a trial-and-error exercise. Also, you will receive little if any steer on what
the EM radiation levels are likely to be.
 For a more advanced analysis, simulation is required. As with EMC design rule checkers, the
meaningfulness and therefore value of the results will depend on how well the digital representations
of the board and its behaviour have been rendered, plus of course how well the variety of EM
equations have been implemented as software algorithms. Again, the tool vendors should be able to
supply information. You should also take some representative measurements to validate the
simulation methodology, and compile metrics to act as the basis for interpreting future results.

There are many numerical 3D EM simulation tools on the market, some of which are dedicated to
specific activities such as antenna design. They are well-suited to what-if studies and the optimisation
of structures. They can model all EMI effects for a given structure, but they do require considerable
computation power (memory and CPU time) and tend to cost a lot. In addition, an in-depth
understanding of EMI is needed to understand the results, as it can sometimes be difficult to explain
using 3D EM results alone the reason for a particular radiation peak, for example.

However, for the types of PCBs used in white goods, we are not seeking to optimise antenna
structures or produce a particular RF profile; we simply wish to verify that the board design exhibits
good EMC – and a PCB design CAD tool with good EMC rule checkers will suffice.

Designing out EMI

While there is no silver bullet to EMC, good design work should include the identification of parasitic
EMI antennas, such as electric and magnetic dipoles. Also, identify the current paths, as current flows
in loops and will always look for the path of least resistance. Accordingly, plan for a proper return path
(noting that ‘ground’ is not an accepted technical term in EMC engineering) and avoid crossing
splits/gaps (even for differential pairs) and return path discontinuities (see Figure 3).

Figure 3: In the top diagram, the reference layer changes from the ground plane to the voltage
plane for part of the trace. This creates an EMI antenna. Keeping with the same reference plane, as
in the bottom diagram, avoids/reduces return path discontinuities.

PCB Design Interview Questions and Answers

by Bhavya Sri, on May 23, 2017 3:24:08 PM

Q1. Flow of Complete PCB design.

Ans:

 Library creation
 Board outline and mechanicals
 Importing netlist
 Design Rule settings
 Component Placement
 Rounting
 Split plans
 Silkscreen and Assembly settings
 Gerber Settings

Q2. What are the inputs you need to design a PCB?

Ans:

 We need schematic,bom and netlist(some pcb engineer generates netlist) from Hardware side and Board
mechanicals from client i.e, board outline,mounting holes etc.
 and another important thing that we need is PCB stackup it is based on complexity of the board for example if
we are using fpga first we should know number of signal layers need for fpga signal breakout.

Q3. How to create footprint?

Ans: Footprint flow:

 Padstack creation
 pin placement
 assembly outline
 silkscreen outline
 Place bound top (we can mention height of the here)
 dfa bound top
 no probe top
 silk and assembly reference designator

These are the basic things we need to create a footprint,follow IPC standards for proper guidelines.

Q4. Board mechanicals.

Ans: Draw board outline by considering client requirements,place mechanical hols and global fiducials.create
route keepin and place keepin areas,

Questions that can be raised from this:

 size of the mechanical holes that you have used in your design and clearances that you have given to these.
 what are fiducials and use of these fiducials and types and differences between them.
 Fiducial placement and clearances.
 What are the clearances you have given from board outline to route and place keepin.

Q5. what are the errors you got while importing netlist?

Ans:

 pcb footprint not found.

 pins mismatch between symbol and footprint etc.
 Q6. How do you define design rules?

Ans: Design rules are nothing but creating tracewidth, spacing, vias limitations. Generally we get trace width
and spacing details from stackup.

Q7. How do place components?

Ans: Place major components first i.e connectors, BGAs, mejor ICs then place other sections.

 How do you place connectors?

First check weather i.e right angle or straight.If it is right angle place at edge of the board and consider if there
any recommendations from client.

Q8. How do you plan routing and what are the parameters you consider while routing?

Ans: Placement routing plays major roles in pcb design, quality of the board depends on placement and
routing, good placement and routing can reduce your board fabrication cost also.

Place components by considering routing strategy and follow schematic flow once your placement is done do
fanout for all the components, route high speed interfaces and complex areas first and maintain ground
reference plane for all high speed signals and make sure that every trace has reference plane and try to
reduce vias on signals vias can change trace characteristic impedance.

Which PCB/CAD tools does Freedom CAD use for layout?

Ans: Cadence Allegro: We have extensive experience with the Cadence Allegro tool suite; we currently support
versions 15 and 16. We are proud to be one of a handful of Early Adopter Program Members with Cadence.

Q9. Mentor Graphics Expedition, Power PCB (PADS) and Board Station:

Ans: We currently support WG2004, EXP 2005.1, EXP 2005.3, EXP 2007 versions of Expedition, versions
2005sp1, 2005sp2 and 2009 of PADS and Board Station versions EN2002, EN2004, BSTN2005, BSTN2006,
and BSXE2006. PADS 2007 is currently under evaluation for future support, please contact us for more
information.

Valor Enterprise 3000: This is a cornerstone process tool for Freedom CAD to assure manufacturability and
minimal delays in the fabrication process. We are a Valor Certified Design Partner.

Custom Programs: Over the past 10 years we have developed custom programs and scripts to gain
efficiencies, improve quality and augment the current design tools.
Q10. How do you calculate the trace impedance of a PCB trace?

Ans: There are many methods. A formula method gives a quick result, though it is not highly accurate. A 2D
Field solver gives more accurate result. The Trace impedance depends upon the width of the trace, separation
from the ground / power plane, and the relative permittivity of the material.

Q11. What is the difference between a blind and buried via?

Ans: Blind vias are use to connect an inner layer to either the top or bottom layer. A buried via is used for
connecting two inner layers. It does not go either to the top or the bottom layer. A regular via ( different from
the blind and the buried via connects the top and the bottom layer and also passes through the inner layers.

Do not stop here. Go ahead and draw the diagram of the blind and the buried via.

Q12. What is the use of a decoupling capacitor?

Ans: A decoupling capacitor is used to smoothen the power supply noise. It should be placed as close to the
ICs for which it is intended as possible.

Q13. What is DRC? What Kind of DRC errors you find in PCB Design?

Ans: DRC stands for Design Rule checking. A PCB should not have any electrical failure before we tape out for
the manufacturing. Common DRC errors include, trace to pad violation, pad to pad violation, component keep
out violation. Additionally a PCB Design may have high speed design rule related constraints. This may
include, length matching constraints, differential signal length matching constraint.

Q14. What are the things you should do you ensure design for compliance for EMI?

Ans: We should use common mode chokes for all cables connectors. The common mode chokes should be
placed as close to the connector as possible. The Power and ground planes should be as close to each other
as possible. The High speed signal should refer to a ground or power plane and should not cross a split plane.
Stitching capacitor should be used in case split plane is used.

Q15. A large thermal pad is divided into four sections? What is the use of it?

Ans: The open area between the 4 sections lead to escape of the gases during the reflow and soldering
process. It leads to better manufacturability.

Q16. The width of a trace is increased ? Will its characteristic impedance increase of decrease ?

Ans: The Capacitance per unit length of the trace increases and therefore, the characteristic impedance of the
trace decreases.

Q17. Robert, what are the most significant problems that you are seeing in PCB designs these days?
Ans: It's dependent on the design - whether it's high speed/low speed, high edge rate/lower edge rate, a simple
PCB or large backplane design. However, some of the glaring problems are transmission line reflection due to
the capacitive load; ground bounce; crosstalk between violent aggressors (like CMOS) and sensitive victims
(like ECL/PECL and analog); bypassing and power delivery; common mode differential pair problems; and high
speed clock loading.

Q18. How fast are the fastest boards you are seeing? How complex in terms of components and pins?

Ans: Several students in my classes are designing backplanes, servers and blades that have clock frequencies
up to 11GHz. I consulted for a company that built a backplane with 65 BGAs having over 600 balls each, 34
layers and over 58K solder joints. The fastest digital board (not microwave) was an aerospace design running
at 43 GHz. Regarding components, there is a BGA graphics processor with a clock speed of 5.6 GHz that has
over 3400 balls. How would you like to reflow solder that one?

Q19. Day 1 of your seminar covers transmission lines. What are the most important points you'll be making?

Ans: The most significant thing would be defining the cutoff conditions to determine when a land trace acts like
a transmission line versus a lumped circuit. This will determine to a large degree the termination scheme that
will be used to minimize reflection. It is also important to define skin effect, dielectric loss and proximity effect.
The interesting point about proximity effect is that if the spaces are just a fraction of the land width (like 5 to 1)
this will create more signal loss than skin effect, dielectric and surface roughness combined.

Another subject is signal delay for microstrip and stripline. With microstrip, the delay is not the same for bare,
solder mask covering and conformal covering (encapsulation over the solder mask). I'll also talk about
providing the analysis for characteristic impedance and delay expressions for microstrips, buried microstrips,
striplines and differentials.

Q20. What design techniques are needed to keep signal integrity under control?

Ans: Excellent communication between the EE design engineer, the PCB design engineer, the test engineer
and manufacturing engineer is critical. Also, close coordination with the bareboard vendor and the EMS
supplier is essential. The inputs from all of these will influence the best design techniques for achieving signal
integrity. It is very important to conduct digital simulation (as with Cadence Allegro SI) and EMI/EMC
simulation. The more up front the potential problem identification, the less debug time, the fewer problems
during compliance testing, and the quicker the time to market.

Q21. What crosstalk problems are you seeing in high-speed designs (Day 2)?

Ans: High density board layout is very challenging. I have seen designs where 2s and 2s [2 mil-in wide land
traces and spacing] are being used due to density/packaging restrictions. Interference between CMOS/TTL
high edge rates and ECL/PECL is another problem. Yet another major concern is sensitive analog circuits in
close proximity to the fast edge rate digital signals. This is where guard traces around the analog traces
become effective.

Q22. How does crosstalk impact layer stacking?

Ans: To control crosstalk there has to be a distance between the aggressor and the victim versus the distance
to the reference ground plane or power plane. Therefore, the tradeoff in many cases is how do I minimize my
stackup layers (which is a cost consideration) versus controlling the crosstalk, and also the characteristic
impedance, which is also a correlation between trace width and distance to the reference plane (or planes as
in striplines).

As each new design is released there is typically a higher clock rate with higher edge rates, more signals per
IC package, and a need for higher density that exacerbates crosstalk. In my estimation this will be one of the
major challenges for the design community, as competition and cost considerations will highly influence the
layer stacking.

Q23. What do designers need to do to ensure adequate power delivery within a specified power envelope (Day 3)?

Ans: In one word it's inductance. Designers need to identify how much inductance is inherent in the mounted
capacitor loop and the ESL [equivalent series inductance] of the capacitor. The characteristics of the power
and ground planes are also critical. Today cores are being produced with less than 1 mil-in of dielectric
thickness. If these are used, they will enhance the power delivery, but at what cost?

Designers must know the bypassing capability of their output drivers. The only way to overcome
SSO [simultaneous switching output] is at the die level. So designers need to provide the proper dq/dt at the
needed IC pin at the right time.

Therefore, one must know the maximum level of power delivery noise allowed in the overall noise budget.
With that knowledge the best strategy is to provide the correct IC die capacitance, inner plane capacitance,
discrete capacitance and capacitor types (such as X2Y, Y cap, reverse electrode) to achieve this goal.
Another factor, especially as frequency increases, is the anti/parallel resonance considerations that may
require breaking up the capacitors into banks with different ESRs [equivalent series resistances] and different
loop inductances.

Q24. What "best practices" do you advocate for differential signaling and clock distribution (Day 4)?

Ans: Probably the main concern is differential unbalance caused by the two lines not being the same electrical
length. This causes common mode and is the main reason differentials can fail EMI radiation. Another
consideration is to assign the more sensitive pairs as striplines. Avoid broadside layouts, that is, make them be
edge to edge. Broadside layouts in many cases can render the design inoperable due to returning currents
being contained on different ground planes, or possibly power planes, which can cause the receiver to see a
totally different noise spectrum on its inputs.

Q25. When does EMI become a concern in PCB design, and what do designers need to know (Day 5)?

Ans: The two big concerns are radiated emissions and ESD [electro-static discharge]. All radiated emission
formulas have both edge rate and frequency as two of the parameters. Therefore, many of the signal integrity
rules also apply to EMI. The main cause of radiation from circuit boards is the size of the antenna loop -- that
is, the pathway the current takes to the load and the direction/pathway that it takes to return to the VRM
module. The more area this entails, the more radiation.
The designer must know the ESD pulse edge rate, which in turn will define the protection device (TVSS) or the
filter. Another concern today is the ever increasing frequency, higher clock rates, and power dissipation in the
design. Designs are becoming denser with more power dissipation. Due to the higher clock rates the
apertures are decreasing in size to minimize harmonic radiation, meaning that the wavelengths are becoming
shorter. However, with smaller apertures the design is much less efficient in allowing heat to escape the
enclosure. This is one of the major concerns in EMI mechanical compatibility design.

Q26. What will each day of the seminar cover, and how will Cadence tools be demonstrated?

Ans: Each day at the conclusion of the training session, Cadence engineers will demonstrate examples of the
lecture material. This will provide the student with real world examples of the methods used to design
correctly. The following provides an itinerary of the courses.

Q27. What's your most important advice for clients working with high-speed digital boards?

Ans: One could write a book on this, but to briefly state the advice: know the rules of high speed design, work
as a team in the prototype design, simulate the design, and work closely with the bare board vendor.

Q1: How to choose PCB (Printed Circuit Board) material?

A1: PCB material has to be selected totally based on the balance between design demand, volume
production and cost. Design demand involves electrical elements that should be taken into serious
consideration during high-speed PCB design. In addition, dielectric constant and dielectric loss should
be considered whether they go with the frequency.

Q2: How to avoid high-frequency interference?

A2: The leading principle to overcome high-frequency interference is to reduce crosstalk as much as
possible, which can be achieved by enlarging the distance between high-speed signals and analog
signals or equipping ground guard or shunt traces beside analog signals. In addition, the noise
interference caused by digital ground on analog ground should be carefully considered.

Q3: How to arrange traces carrying differential signals?

A3: Two points should be focused in terms of traces carrying differential signals design. On one hand,
the length of two lines should be the same; on the other hand, the spacing between two lines should
maintain parallel.

Q4: How to arrange traces carrying differential signals when there’s only one clock signal line at
output terminal?
A4: The premise of traces carrying differential signals arrangement is that both signal sources and
receiving end should be differential signals. Therefore, differential routing can never work on clock
signals containing only one output end.
Q5: Can matched resistance be added between differential pairs at receiving end?
A5: Matched resistance is usually added between differential pairs at receiving end and its value is
equal to that of differential impedance. As a result, signal quality will be better.

Q6: Why should differential pair traces be close to each other and parallel?
A6: Differential pair traces should be properly close and parallel. The distance between differential
pair traces is determined by differential impedance that is a key reference parameter in terms of
differential pair design.

Q7: How to resolve the conflicts between manual routing and auto-routing on high-speed signals?
A7: Now most automatic routers are able to control wire running method and number of through holes
by setting constraint conditions. All EDA companies differ a lot from each other in terms of wire
running methods and constraint condition setting. The difficulty of automatic routing is closely related
with wire running capability. Therefore, this problem can be resolved by picking up a router with high
capability of wire running.

Q8: In high-speed PCB design, the blank area of signal layers can be coated with copper. How
should copper be distributed on multiple signal layers on grounding and powering?
A8: Generally, copper coating is mostly connected with the ground in blank area. The distance
between copper coating and signal lines should be strictly designed because coated copper will
reduce characteristic impedance a little. Meanwhile, characteristic impedance of other layers should
not be influenced.

Q9: Can characteristic impedance on power plane be figured out by micro strip line model? Can
micro strip line model be used on signals between power plane and ground plane?
A9: Yes. During the procedure of characteristic impedance calculation, both power plane and ground
plane can be regarded as a reference plane.
Q10: Can the test points generated through automation on high-density PCB meet the testing
demands of massive production?
A10: It all depends on the case whether regulations on test points are compatible with the
requirement laid by test machines. In addition, if routing is run too densely and regulations on test
points are very strict, there may be no ways to put test points on each segment of line. Of course,
manual methods can be used to complement test points.

Q11: Can test point adding influence the quality of high-speed signals?
A11: It all depends on the case whether test point adding method and the running speed of signals.
Basically, adding test points are obtained through adding them to lines or pulling a segment out. Both
methods can more or less affect high-speed signals and the effect extent is related with frequency
speed and edge rate of signals.

Q12: When a couple of PCBs are connected into a system, how should ground lines of each PCB be
connected?
A12: Based on Kirchoff current law, when power or signals are sent from Board A to Board B,
equivalent amount of current will be returned to Board A from ground plane and the current on ground
plane will flow back at the path where the impedance is the lowest. Therefore, the number of pins
contributed to the ground plane should never be too small at each interface of power or signal
interconnection so that both impedance and noise on the ground can be reduced. Additionally, the
whole current loop should be analyzed, especially the portion where current is the largest and
connection of ground plane or ground lines should be adjusted to control the current running and
decrease the influence on other sensitive signals.

Q13: Can ground lines be added to the middle of differential signal lines?
A13: Basically, ground lines cannot be added among differential signal lines because the biggest
significance of differential signal line principle lies in the advantage led by mutual coupling between
differential signal lines, such as flux cancellation, noise immunity etc. Coupling effect will be
destroyed if ground lines are added among them.

Q14: What is the principle of picking up suitable PCB and cover grounding point?
A14: The principle is to take advantage of chassis ground to provide a path with low impedance to
returning current and to control the path of this returning current. For example, screw can be normally
used near high-frequency component or clock generator to connect the ground plane of PCB with
chassis ground to reduce the whole current loop area as much as possible, that is, to reduce
electromagnetic interference.

Q15: Where should PCB debug start?

A15: As far as digital circuit is concerned, the following things should be done in order. First, all power
values should be confirmed to averagely achieve design requirement. Second, all the clock signal
frequencies should be confirmed to normally work and there’s no non-monotonic problem on the
edge. Third, reset signals should be confirmed to achieve standard requirement. If the above things
have been confirmed, chip should send signals in the first cycle. Then, debug will be carried out
based on system running protocol and bus protocol.

Q16: What is the best way to the design of high-speed and high-density PCB with board area fixed?
A16: In the process of high-speed and high-density PCB design, crosstalk interference should be
especially focused since it greatly affects timing and signal integrity. Some design solutions are given.
First, the continuity and matching of the routing characteristic impedance should be controlled.
Second, spacing should be noticed and spacing is normally twice line width. Third, proper termination
methods should be picked up. Fourth, routing in adjacent layers should be implemented in different
directions. Fifth, blind/buried vias can be used to increase routing area. In addition, differential
termination and common-mode termination should be maintained so as to reduce the influence on
timing and signal integrity.
Q17: LC circuit is usually applied to filter wave at analog power. Why does LC sometimes perform
better then RC?
A17: The comparison between LC and RC should be based on the assumption whether frequency
band and inductance are suitably selected. Because reactance of inductance is correlated with
inductance and frequency, if the noise frequency of power is too low and inductance isn’t high
enough, LC performs worse than RC. However, one of the disadvantages of RC lies in the fact that
resistor itself will consume energy with low efficiency.
Q18: What is the optimal way to achieve EMC requirement without cost pressure?
A18: PCB board suffers from higher cost due to EMC usually because layer count goes up to
strengthen shielding stress and some components are prepared such as ferrite bead or choke that
are used to stop high-frequency harmonic wave components. Besides, other shielding structure on
other systems should be used to meet the demands of EMC. First, components with low slew rate
should be applied as many as possible so as to decrease high-frequency portions generated by
signals. Second, high-frequency components should never be placed too near exterior connectors.
Third, impedance matching, routing layer and return current path of high-speed signals should be
carefully designed to cut down high-frequency reflection and radiation. Fourth, sufficient decoupling
capacitors should be placed at power pins in order to reduce the noise at power plane and ground
plane. Fifth, the ground near exterior connector can be cut away from ground plane and connector
ground should be near chassis ground.

Q19: When a PCB board features multiple digital/analog modules, the ordinary solution is to divide
digital/analog modules. Why?
A19: The reason for dividing digital and analog modules is that noise is usually generated at power
and ground at the switching of high and low potential and the extent of noise is related with signal
speed and current amount. If analog and digital modules are not divided and the noise generated by
digital module is larger and circuit at analog area is similar, even if analog and digital signals don’t
come across, analog signals will still be affected by noise.

Q20: When it comes to high-speed PCB design, how should impedance matching be implemented?
A20: As far as high-speed PCB design is concerned, impedance matching is one of the leading
considerations. Impedance features absolute relationship with routing. For example, characteristic
impedance is determined by a couple of elements including spacing between microstrip or
stripline/double stripline layer and reference layer, routing width, PCB material etc. Differently
speaking, characteristic impedance can never be determined until routing. The essential solution to
this problem is to stop impedance discontinuity from occurring as much as possible.

Q21: In the process of high-speed PCB design, which measures should be taken in consideration of
EMC/EMI?
A21: Generally speaking, EMI/EMC design should be considered from both radiated and conducted
aspects. The former belongs to the portion whose frequency is higher (more than 30MHz) while the
latter to the portion whose frequency is lower (less than 30MHz). Therefore, both high-frequency
portion and low-frequency portion should be noticed. A good EMI/EMC design should start from
components’ placement, PCB stack up, routing, component selection etc. Once those aspects leave
unconsidered, cost will possibly rise. For example, clock generator should not be close to exterior
connector as much as possible. Additionally, connecting points should be properly selected between
PCB and chassis.
Q22: What is routing topology?
A22: Routing topology, also called routing order, refers to the order of routing in terms of network with
multiple terminators.

Q23: How should routing topology be adjusted to increase signal integrity?

A23: This type of network signals is so complex that topology is different based on different
directions, different levels, different kinds of signals. Therefore, it’s difficult to judge which type of
signals is beneficial to signal quality.

Q24: What’s the reason for copper coating?

A24: There are usually a couple of reasons for copper coating. First, massive ground or power copper
coating will have shielding effect and some special ground, PGND for example, can have a role of
protection. Second, to ensure high performance of electroplating or stop lamination from being
deformed, copper should be coated on PCB board with less routing. Third, copper coating derives
from the requirement on signal integrity. A complete returning path should be provided to high-
frequency digital signals and DC network routing should be reduced. In addition, thermal dissipation
should be taken into consideration as well.
Q25: What is return current?
A25: As high-speed digital signals are running, signals flow from drivers to carrier along PCB
transmission line and then return to driver terminal through the shortest path along ground or power.
The returning signals at ground or power are called return current.

Q26: How many types of terminals are there?

A26: Terminal, also called matching, is usually classified into source matching and terminal matching.
The former refers to series resistor matching while the latter refers to parallel matching. A lot of
methods are available, including pull-up resistor, pull-down resistor, Davenan matching, AC matching,
Schottky diode matching etc.

Q27: What elements can determine matching types?

A27: Matching type is usually determined by BUFFER characteristics, topology, level classifications
and judgment type. Besides, signal duty cycle and system energy consumption have to be
considered as well.
Q28: What inspection should be carried out on PCB before it is released by manufacturing factory?
A28: Most PCB manufacturers implement on-off test on PCBs before they leave factory in order to
make sure all the circuits are correctly connected. Up to now, some advanced manufacturers carry
out X-ray inspection to find out some obstacles on etching or lamination. When it comes to the
products going through SMT assembly, ICT is usually applied, which calls for ICT test points setting
during PCB design phase. As soon as problems occur, a special type of X-ray inspection can be used
as well.

Q29: For a circuit composed by a couple of PCB boards, should they share the same ground?
A29: A circuit composed by a couple of PCB boards should normally share the same ground because
it’s impractical to apply a couple of powers in a single circuit. Of course, if your conditions allow,
different powers can be used as well. After all, that’ll help reduce interference.
Q30: How should ESD be considered by a system containing DSP and PLD?

A30: As far as ordinary systems are concerned, the portions should be first considered with direct contact with
human and proper protections should be done on circuit and structures. The extent of influence ESD bring
towards system is usually determined according to different situations. In dry environment, ESD will become
worse, especially on the system that is more sensitive. Even though larger system features unobvious effect on
ESD, more attention should also be paid.

Q31: When it comes to a 4-layer PCB design, what side should receive copper coating on both
sides?
A31: The following aspects should be taken into consideration for copper coating: shielding, thermal
dissipation, reinforcement and PCB manufacturing demand. Therefore, the main reason should be
considered. For example, in terms of high-speed PCB design, shielding should be most considered.
Surface grounding is beneficial to EMC and copper coating should be completely done in case of
lonely island. Generally speaking, if components on the surface receive too much routing, it’ll be
difficult to keep copper foil complete. Therefore, it’s suggested that boards with many surface
components or much routing aren’t coated with copper.
Q32: In the process of clock routing, is it necessary to add ground shielding on both sides?

A32: It depends on crosstalk or EMI of board. If shielding ground lines are not properly processed, it’ll bring
forward bad effects on the contrary.
Q33: What is the strategy of clock routing for signals at different frequencies?

A33: In terms of routing for clock lines, signal integrity analysis should be first carried out and routing
principles should be manipulated. Then it’s time to implement routing based on the principles.

Are you familiar with the IPC-9351 standard?

The IPC-9351 standard is a set of guidelines for designing printed circuit boards. The interviewer may
ask this question to see if you have experience with the standards and regulations that apply to your
industry. In your answer, explain how you use the IPC-9351 standard in your work as a PCB
designer.

Example: “I am familiar with the IPC-9351 standard because it’s important to follow these guidelines
when working on projects for clients. For example, my last client required all of their PCBs to meet the
IPC-9351 standard. As a result, I had to make sure every aspect of the design met the standard
before sending it to production. This helped ensure the quality of the final product.”

What are the most important skills for a PCB designer?

This question allows you to show the interviewer that you have a strong understanding of what it
takes to be successful in this role. You can answer by listing two or three skills and explaining why
they are important for this job.

Example: “The most important skill for a PCB designer is communication. This role requires me to
work with many different departments, including marketing, sales and manufacturing. I need to be
able to clearly explain my designs so everyone understands them. Another important skill is creativity.
I am constantly working on new projects, which means I need to think outside the box when designing
circuits. Finally, attention to detail is also very important. I must ensure all of my work is accurate
before submitting it.”

How do you troubleshoot problems with a PCB design?

Troubleshooting is an important skill for a PCB designer. Employers ask this question to see if you
have the necessary skills and experience to solve problems with your designs. Use your answer to
highlight your problem-solving skills, as well as your ability to work independently.

Example: “I start by looking at my design plan and checking all of my calculations. I also check that all
components are connected properly. If these steps don’t fix the issue, then I will go through each
component in the circuit board to make sure it’s placed correctly. If none of these steps work, then I
will contact my supervisor or another professional for help.”

What is your experience with using software programs for PCB design?

This question can help the interviewer determine your experience level with using software programs
for PCB design. You can answer this question by mentioning which software you have used in the
past and what your experience was like with each program.
Example: “I’ve worked with several different software programs for PCB design, including Altium
Designer, Eagle Layout Editor and KiCad. I find that I am most comfortable working with KiCad
because it is free to use and has a lot of helpful features. However, I also enjoy using Eagle Layout
Editor because it’s easy to learn and offers many useful tools.”

Provide an example of a time when you had to work with a difficult client or customer.

An interviewer may ask this question to assess your interpersonal skills and ability to work with
challenging people. When answering, it can be helpful to mention a specific example of how you
handled the situation successfully.

Example: “In my previous role as an electronics engineer, I worked with many different clients on
various projects. One client in particular was very demanding and would often change their mind
about designs or specifications without notice. In these situations, I always remained calm and
focused on providing them with quality work while also communicating clearly when changes were
necessary. This helped me maintain a positive relationship with the client despite their difficult
behavior.”

If a client wanted to make a significant change to a PCB design that was already finalized, how would
you respond?

This question can help interviewers understand how you handle client requests and ensure that the
final product meets their needs. In your answer, try to show that you value clients’ opinions while also
ensuring that any changes are feasible for the project.

Example: “If a client wanted to make a significant change to a PCB design after it was finalized, I
would first ask them if they were aware of the additional costs associated with making such a change.
If they understood these costs, then I would work with them to determine whether the change is
possible within the current budget or if we need to adjust the scope of the project. If the change is still
feasible, I would go back through the entire design process again to ensure that the new
requirements are met.”

What would you do if you noticed a mistake in your design after it had already been produced?

This question can help the interviewer determine how you respond to mistakes and challenges in
your work. Use examples from previous experience to show that you are willing to take responsibility
for your actions and learn from them.

Example: “If I noticed a mistake after production, I would immediately contact my supervisor or
manager to discuss what happened. If it was something minor like an incorrect wire placement, I
might be able to fix it myself by rerouting wires. However, if there were major issues with the design,
such as missing components or improper grounding, then I would have to start over completely. In
either case, I would document everything so that I could learn from my mistakes.”

How well do you work under pressure?

This question can help the interviewer determine how well you perform in a fast-paced environment.
Since PCB design is often done under tight deadlines, employers may want to know that you are able
to work quickly and efficiently while still producing high-quality results. In your answer, try to explain
that you enjoy working under pressure and feel confident about meeting deadlines.
Example: “I actually find that I work better when there’s a deadline looming. When I have a set time
frame for my project, I am motivated to get started right away and complete it as soon as possible.
This helps me avoid procrastination and ensures that I don’t spend too much time on any one aspect
of the design. Of course, I always make sure to thoroughly check my work before submitting it.”

Do you have any experience working with hazardous materials?

This question can help the interviewer determine your experience with working in a potentially
dangerous environment. If you have worked with hazardous materials, explain what steps you took to
ensure your own safety and that of others around you.

Example: “I’ve never worked with hazardous materials, but I am familiar with the proper procedures
for handling them. In my last position, we had an employee who was injured when they were exposed
to lead. We immediately removed them from the workspace and called our local emergency services
to assist us in cleaning up the area. The employee was then sent to the hospital for further treatment.”

When working with clients, what is your approach to building trust and establishing a positive rapport?

An interviewer may ask this question to learn more about your interpersonal skills and how you
interact with clients. This is an important skill for a PCB designer because they often work directly
with clients, so it’s essential that they can build trust and rapport with their customers. In your answer,
try to explain what steps you take to develop positive relationships with clients.

Example: “I find that the best way to establish trust and rapport with my clients is by being honest and
transparent throughout the design process. I always make sure to clearly communicate any changes
or updates to my client and provide them with regular progress reports on the project. I also like to
meet regularly with my clients to discuss the project and get feedback from them.”

We want to increase our customer base by targeting a new market segment. Give me an idea of how
you would go about doing this.

This question is a great way to see how you can apply your skills and knowledge of the industry to
help an organization grow. When answering this question, it’s important to show that you have
experience with market segmentation and how it can be applied to PCB design.

Example: “I would start by analyzing our current customer base to determine what they value most in
their products. I would then research the target market to find out what they want from their
electronics. From there, I would create a new product line that offers both groups of customers
something unique. This strategy has helped me increase sales for my previous employer by 20%.”

Describe your experience with working in a team environment.

Working in a team environment is an important skill for many jobs, including PCB designer.
Employers ask this question to make sure you have experience working with others and that you can
collaborate effectively. In your answer, explain how you work well with others and what makes you a
good teammate.
Example: “I’ve worked in a team environment throughout my career as a PCB designer. I find it
helpful to bounce ideas off of other designers when I’m designing a new circuit board. It’s also
beneficial to get input from the engineers who will be using the boards once they’re complete.
Working together helps us all create better products.”

What makes you stand out from other candidates?

Employers ask this question to learn more about your personality and how you would fit in with their
team. They want someone who is friendly, hardworking and passionate about the job. When
answering this question, try to highlight a few of your best qualities that relate to the position.

Example: “I am highly organized and detail-oriented, which makes me an excellent candidate for this
role. I also have experience working on large projects, so I know what it takes to meet deadlines. In
my previous role, I worked as part of a team of PCB designers, where we all shared our ideas and
collaborated to create the best product possible.”

Which PCB design software are you most familiar with using?

This question can help the interviewer determine your level of experience with a specific type of
software. It can also show them how you might fit into their company culture, as some companies
have unique preferences when it comes to which PCB design software they use. If you’re not familiar
with any specific brand or type of software, consider mentioning one that’s similar in function and
briefly explain why you prefer it over others.

Example: “I’ve used Altium Designer for my last two jobs because I find it easy to learn and navigate.
The interface is clean and simple, so I don’t waste time trying to figure out what each button does. I’m
always looking for ways to improve efficiency, so I appreciate its built-in shortcuts.”

What do you think is the most important aspect of PCB design?

This question is a great way for the interviewer to assess your knowledge of PCB design and how
you prioritize your work. Your answer should show that you understand what’s important in this role,
but it can also be an opportunity to highlight some specific skills or experiences that make you
qualified for the job.

Example: “I think communication is the most important aspect of PCB design because it affects every
other part of the process. If I’m not communicating clearly with my team members about the project
goals, then we might have different ideas about what we’re designing. Likewise, if I don’t
communicate well with my clients, they may not know what to expect from our final product.
Communication is essential to ensuring that everyone has the same expectations.”

How often do you update your knowledge and skills as a PCB designer?

This question can help interviewers understand your commitment to continuous learning. It’s
important for PCB designers to stay up-to-date on the latest technology and design trends, so it’s
beneficial if you’re willing to invest in your own professional development.

Example: “I try to attend at least one conference or seminar every year where I can learn about new
technologies and techniques. In addition, I subscribe to several industry publications that provide
valuable insights into the latest developments. I also have a few online courses under my belt, which I
find very helpful as they allow me to practice what I’ve learned while still being able to learn more.”

There is a new technology that could drastically improve the efficiency of one of your client’s
products. How do you go about recommending it to them?

This question is a great way to assess your communication skills and ability to work with clients. It
also shows the interviewer that you are aware of new technologies in the industry. In your answer, try
to show how you would approach this situation while highlighting your interpersonal skills.

Example: “I would first explain the benefits of the technology to my client. I would then offer to do
some research on it for them so they can decide if they want to implement it into their product. If they
agree, I will find out more about the technology and its applications. Then, I will create a prototype
using the new technology and present it to my client.”

PCB Designer Interview Questions

Why do we always do impedance matching for 50 ohm?

The tradition of using 50 ohms, comes from a compromise. The best power handling capabilities is done in
a 30 ohm system, however the attenuation is lowest in a 70 ohm system. Therfore a compromise is done
at 50 ohms

what different packages of you used in PCB design and How libraries managed?

what is process of managing BOM and PCB stackups?

What is crucial for high speed design?

How to manage BGA routing?

How to manage track length and characteristics impedance?

How to choose component through data sheet to encounter the problem of EMI/EMC?

Which software you are working on and what is the difference between old and new software?

How you manage PCB fabrication and what DFM standards do you follow?

How you manage design through checklist and guidelines (explain through examples)?

How to start building SMPS, what component do what? what is Ethernet and what is PHY and MAC layer in terms of
desinging? what is different protocols you know?

how to route it on PCB?

how to choose crystal for designing purpose?

What is balanced and unbalanced PCB layer stack up?

How many layer you have worked on ? Did you made DDR3 based pcb design?

many more with technical backgrounds and with explanations?

1.Flow of Complete PCB design

Library creation

Board outline and mechanicals

Importing netlist

Design Rule settings

Component Placement

Rounting

Split plans

Silkscreen and Assembly settings

Gerber Settings

2.What are the inputs you need to design a PCB ?

We need schematic,bom and netlist(some pcb engineer generates netlist) from Hardware side and Board mechanicals
from client i.e, board outline,mounting holes etc.

and another important thing that we need is PCB stackup it is based on complexity of the board for example if we are
using fpga first we should know number of signal layers need for fpga signal breakout.

3.How to create footprint ?

Footprint flow

Padstack creation

pin placement

assembly outline

silkscreen outline

Place bound top (we can mention height of the here)

dfa bound top

no probe top

silk and assembly reference designator

These are the basic things we need to create a footprint,follow IPC standards for proper guidelines.

4.Board mechanicals

Draw board outline by considering client requirements,place mechanical hols and global fiducials.create route keepin
and place keepin areas,

Questions that can be raised from this

size of the mechanical holes that you have used in your design and clearances that you have given to these.

what are fiducials and use of these fiducials and types and differences between them.

Fiducial placement and clearances.

What are the clearances you have given from board outline to route and place keepin.

5.what are the errors you got while importing netlist ?

pcb footprint not found.

pins mismatch between symbol and footprint etc.

6.How do you define design rules ?

Design rules are nothing but creating tracewidth,spacing,vias limitations.generally we get trace width and spacing details
from stackup.

Here are some standerd via sizes

vias

7.How do place components ?

Place major components first i.e connectors,BGAs,mejor ICs then place other sections.
a.How do you place connectors ?

First check weather i.e right angle or straight.If it is right angle place at edge of the board and consider if there any
recommendations from client.

8.how do you plan routing and what are the parameters you consider while routing ?

Placement routing plays major roles in pcb design, quality of the board depends on placement and routing, good
placement and routing can reduce your board fabrication cost also.

Place components by considering routing strategy and follow schematic flow once your placement is done do fanout
for all the components, route high speed interfaces and complex areas first and maintain ground reference plane for all
high speed signals and make sure that every trace has reference plane and try to reduce vias on signals vias can change
trace characteristic impedance.

Types of EDA tools you used.

Stackup details.

What is characteristic impedance.

What are crosstalk, jitter, skew, skin effect.

Signal integrity concepts.

What is the use of reference plane.

Guidelines for different high speed interfaces.

DDR3 routing guidelines and routing topologies.

Types of vias and their standard sizes.

About decoupling capacitors.

Decoupling capacitor placement.

If you used BGA in your designs type of BGA and number of pins and pitch.

What is need for a PCB?

 Designs on bread boards or perf boards are cumbersome, to have neat placement of components without jumpers or
wires a PCB is designed. It also helps in providing physical stability and overall circuit is more reliable.
What software or EDA tools are you familiar with?

What if schematic symbols and footprints are not available in component library?

 Create them!
How do you verify schematic symbols or footprints?

 cross verify with datasheets, print footprints and match with actual devices before production.
What are basic checks while laying out MCU based design

 Power path:Ensure that the power flow tracks have sufficient trace width.
 Oscillator circuit: Ensure oscillator is placed near to MCU pins. Distance depends on specific MCU. It is done so that
MCU receives stable oscillations without noise.
What are basic checks for RF design?

What are units for measuring footprints?

 Millimeter: SMD components

 Mils:Through hole
What is Mil?

 1 mil is 1/1000 inch.

Why is it used?

The dimensions of most of the through hole components are in mils. e.g pitch between IC pins(100 mils), Width of ICs
(300 mil, 600 mil) etc. Hence if measurement of these in mm will not round figures.
We use the form below to verify our PCB design, answering them would give you a good idea of what the interview for?

What inspired you to pursue a career in PCB design?

There are a few reasons why an interviewer might ask this question. They could be trying
to gauge your interest in the field, or they might be trying to assess your qualifications for
the position. Either way, it is important to be able to articulate your reasons for pursuing a
career in PCB design.

Some possible reasons you might give include:

-A desire to work with cutting-edge technology and be at the forefront of innovation

-A passion for electronics and circuit design

-The challenge of designing complex systems that must function correctly

No matter what your reasons are, it is important to be able to communicate them clearly
and concisely. This will show the interviewer that you are serious about the field and have
thought carefully about your career choice.

Example: “I was inspired to pursue a career in PCB design because of the satisfaction I get
from seeing my designs come to life. There is a great sense of accomplishment in knowing
that I played a role in creating something that is used by people every day. Additionally, I
enjoy the challenge of designing circuits that meet stringent requirements and finding
creative solutions to difficult problems.”

What do you think sets PCB design apart from other engineering
disciplines?
There are a few key things that set PCB design apart from other engineering disciplines:

1. The need for precision and accuracy: When designing a PCB, every detail matters and
has to be perfect in order to ensure the board functions correctly. This level of precision is
not always necessary in other engineering disciplines.

2. The need for creativity: PCB design often requires out-of-the-box thinking in order to
solve problems and create innovative designs.
3. The need for strong communication skills: Because PCB designers often work with teams
of engineers from different disciplines, strong communication skills are essential in order
to ensure everyone is on the same page and understands the design goals.

Overall, these three factors make PCB design a unique and challenging engineering
discipline that requires a specific skill set.

Example: “PCB design is a unique engineering discipline in several ways. First, it is a highly
interdisciplinary field, requiring knowledge of electrical, mechanical, and chemical
engineering. Second, PCB design is a very detail-oriented discipline, requiring a high degree
of accuracy and precision. Third, PCB design is a rapidly changing field, with new
technologies and materials being developed all the time. Finally, PCB design is a highly
creative field, requiring a great deal of imagination and innovation to create new designs.”

What would you consider to be your best accomplishment as a PCB

designer?
An interviewer would ask "What would you consider to be your best accomplishment as a
PCB designer?" in order to get an idea of the designer's experience and expertise. It is
important to know the designer's best accomplishment in order to gauge whether or not
they are qualified for the position.

Example: “My best accomplishment as a PCB designer would be the development of a new
board layout that was more efficient and cost-effective than the previous design. This new
layout allowed for a smaller form factor and reduced the overall number of components
required. In addition, the new layout improved signal integrity and power dissipation, which
led to increased performance and reliability.”

What do you think are the biggest challenges faced by PCB designers
today?
The interviewer is likely trying to gauge the depth of the PCB designer's knowledge and
understanding of the field. It is important to be able to articulate the challenges faced by
PCB designers in order to demonstrate a thorough understanding of the field. By
understanding the challenges faced by PCB designers, the interviewer can better
understand how the designer approaches problem solving and whether they are up-to-
date on the latest industry trends.
Example: “The biggest challenges faced by PCB designers today are:

1. The ever-increasing complexity of PCB designs.

2. The need for ever-faster turnaround times.

3. The need for ever-higher levels of reliability and performance.”

What do you see as the future of PCB design?

The interviewer is asking about the future of PCB design in order to gauge the PCB
designer's opinion on the subject. It is important to know the designer's opinion on the
future of the field in order to gauge their knowledge and experience.

Example: “The future of PCB design is very exciting. With the advent of new technologies,
the possibilities for PCB design are endless. We are already seeing new materials and
processes being used in PCB design that were not possible just a few years ago. The sky is
the limit when it comes to the future of PCB design.”

What do you think is the most important skill for a PCB designer to possess?
PCB designers need to be able to use computer-aided design (CAD) software to create
models of PCBs. They also need to be able to understand the manufacturing process and
have the ability to troubleshoot problems that arise during the manufacturing process.

Example: “There are many important skills for a PCB designer to possess, but one of the
most important is the ability to create clear and concise designs that can be easily followed
by the manufacturing team. Another important skill is the ability to troubleshoot and solve
problems that may arise during the manufacturing process.”

What do you think are the biggest challenges faced by the PCB industry
today?
The interviewer is trying to gauge the PCB Designer's understanding of the challenges
faced by the PCB industry. This is important because it helps the interviewer understand
how the PCB Designer would approach problem solving and whether they would be able
to find creative solutions to the challenges faced by the industry.
Example: “The biggest challenges faced by the PCB industry today are:

1. The ever-increasing complexity of PCB designs.

2. The need for shorter design cycles and faster time to market.

3. The increasing cost of raw materials and labor.

4. The challenge of meeting environmental regulations.”

What do you see as the future of the PCB industry?

The interviewer is trying to gauge the PCB Designer's understanding of the industry and
how it may change in the future. It is important to know how the industry may change so
that the Designer can be prepared for new challenges that may arise.

Example: “The future of the PCB industry is very promising. With the advancement of
technology, more and more companies are using PCBs in their products. This trend is
expected to continue, and the demand for PCBs is expected to grow significantly in the
coming years. The PCB industry is also expected to benefit from the increasing popularity of
electric vehicles. Electric vehicles require high-quality and reliable PCBs to function properly,
and the demand for these types of PCBs is expected to grow in the coming years.”

What do you think is the most important trend in PCB design today?
The interviewer is asking this question to get a sense of the PCB designer's understanding
of current trends in the industry. It is important to be up-to-date on trends in order to
design boards that are compatible with the latest technologies.

Example: “The most important trend in PCB design today is the move towards
miniaturization. This is being driven by the ever-increasing demand for smaller, more
compact electronic devices. As a result, PCB designers are under pressure to create ever-
smaller boards that can accommodate more and more components. This trend is also being
driven by the need for faster and more efficient electronic devices. As such, PCB designers are
constantly looking for ways to improve the speed and efficiency of their designs.”
What do you think will be the most important trend in PCB design in the
future?
There are a few reasons why an interviewer might ask this question to a PCB Designer.
First, they may be trying to gauge the Designer's understanding of current and future
trends in the industry. Second, they may be interested in the Designer's opinion on what
will be most important in the future of PCB design, in order to better understand how the
Designer plans to stay ahead of the curve. Finally, this question may simply be used as a
conversation starter to get to know the Designer better. No matter the reason, it is
important for the Designer to be able to discuss current and future trends in PCB design in
order to demonstrate their knowledge and expertise in the field.

Example: “The most important trend in PCB design in the future will be the continued
miniaturization of electronic components and devices. This trend has been ongoing for many
years and shows no signs of slowing down. As electronic components and devices continue
to get smaller, the challenge for PCB designers will be to maintain or improve performance
while working within ever-smaller dimensions. In addition, the trend towards miniaturization
is likely to lead to an increase in the use of alternative materials and technologies in PCB
design, such as flexible and/or organic materials.”

What do you think is the most important factor in choosing a PCB design
tool?
The most important factor in choosing a PCB design tool is its ability to meet the specific
needs of the designer. For example, a tool that is well suited for designing high-density
boards may not be as well suited for designing low-power boards. Similarly, a tool that is
easy to use may not be as powerful as a tool that is more difficult to use. It is important to
choose a tool that is well suited to the task at hand in order to maximize efficiency and
effectiveness.

Example: “There is no one-size-fits-all answer to this question, as the most important factor
in choosing a PCB design tool will vary depending on the specific needs of the designer.
However, some of the factors that could be considered include the tool's ability to support
the specific design requirements, its ease of use, and its cost.”
What do you think is the most important factor in choosing a PCB
fabrication process?
There are many factors to consider when choosing a PCB fabrication process, but the most
important factor is the application of the PCB. The application will dictate the required
features of the PCB, which in turn will dictate the fabrication process.

Example: “There are many factors to consider when choosing a PCB fabrication process, but
the most important one is the intended use of the PCB. If the PCB will be used in a high-
temperature or high-frequency application, for example, then it's important to choose a
fabrication process that's designed for those conditions. Other important factors to consider
include the size and complexity of the PCB, the availability of materials, and the cost.”

What do you think is the most important factor in choosing a PCB assembly
process?
There are many factors to consider when choosing a PCB assembly process, but the most
important factor is the complexity of the design. If the design is simple, then a less
expensive and less complex assembly process can be used. If the design is complex, then a
more expensive and more complex assembly process will be required. The interviewer
wants to know if the PCB designer has considered all of the factors involved in choosing
an assembly process and has selected the most appropriate one for the project.

Example: “There are many factors to consider when choosing a PCB assembly process, but
the most important one is probably the complexity of the assembly. If the assembly is very
simple, then a manual process might be sufficient. If it is more complex, however, then an
automated process is likely to be necessary in order to ensure accuracy and consistency.
Other important factors include the volume of production, the turnaround time, and the
cost.”

What do you think is the most important factor in choosing a PCB test
strategy?
There are many factors to consider when choosing a PCB test strategy, but the most
important factor is the intended use of the PCB. If the PCB will be used in a high-speed or
high-temperature environment, then it is important to choose a test strategy that can
accurately test for these conditions. Other factors to consider include the size and
complexity of the PCB, the number of layers, and the availability of test equipment.
Example: “There are many factors to consider when choosing a PCB test strategy, but the
most important factor is the type of product being designed. For example, if you are
designing a high-speed digital circuit, you will need to use different test strategies than if you
were designing an analog circuit. Other important factors to consider include the complexity
of the circuit, the manufacturing process, and the budget.”

What do you think is the most important factor in choosing a PCB

packaging strategy?
There are a few reasons why an interviewer would ask this question to a PCB designer. The
most important factor in choosing a PCB packaging strategy is the end goal of the project.
What is the project trying to achieve? Is it trying to achieve the lowest cost? The highest
performance? The best reliability? Once the end goal is known, the designer can choose
the best packaging strategy to achieve that goal.

Another reason why this question is important is that it tests the designer's knowledge of
different packaging strategies. There are many different packaging strategies available,
and each has its own strengths and weaknesses. By asking this question, the interviewer
can get a sense of how knowledgeable the designer is about the different options
available.

Finally, this question can also help to weed out designers who are not familiar with the
latest packaging technologies. In the world of PCB design, new packaging technologies
are constantly being developed. By asking this question, the interviewer can ensure that
the designer is up-to-date on the latest trends and technologies.

Example: “There are many factors to consider when choosing a PCB packaging strategy, but
the most important one is probably the intended use of the PCB. For example, if the PCB is
going to be used in a high-speed application, then choosing a packaging strategy that
minimizes signal crosstalk and impedance mismatches will be critical. Other important
factors include thermal considerations, mechanical strength and durability,
manufacturability, and cost.”

Maxwell's Equations questions and answers

Question - 1 What are Maxwell's equations, and why are they important in electromagnetics ?
Answer - 1 : Maxwell's equations are a set of four fundamental equations that describe how
electric and magnetic fields interact and propagate in space. They are crucial in
electromagnetics because they provide the foundation for understanding how electromagnetic
waves, including light and radio waves, behave.

Question - 2 : Can you explain Gauss's law for electricity and Gauss's law for magnetism ?
Answer - 2 : Gauss's law for electricity states that the electric flux through a closed surface is
proportional to the charge enclosed by the surface. Gauss's law for magnetism states that
there are no magnetic monopoles, and the total magnetic flux through a closed surface is
always zero.

Question - 3 : What are Ampere's and Faraday's laws, and how do they relate to Maxwell's
equations ?
Answer - 3 : Ampere's law relates the circulation of the magnetic field around a closed loop to
the current passing through the loop. Faraday's law describes how a changing magnetic field
induces an electromotive force (EMF) in a closed loop. Both laws are incorporated into
Maxwell's equations to describe how electric and magnetic fields change in response to each
other.

Question - 4 : What is the significance of the displacement current term in Maxwell's

equations, particularly in Ampere's law with Maxwell's addition?
Answer - 4 : The displacement current term, introduced by Maxwell, completes Ampere's law,
making it consistent with Faraday's law of electromagnetic induction. This term accounts for
the changing electric field between the plates of a capacitor, allowing for the propagation of
electromagnetic waves and explaining the behavior of time-varying electric fields.

Antennas and Propagation questions and answers

Question - 5 : What is antenna gain, and how is it measured ?
Answer - 5 : Antenna gain measures the directional ability of an antenna to focus its radiation
pattern in a particular direction. It is usually measured in decibels (dBi) and is determined by
comparing the antenna's radiation pattern to that of an ideal isotropic radiator.
Question - 6 : Explain the concept of polarization in electromagnetic waves and its
significance in antenna design.
Answer - 6 : Polarization refers to the orientation of the electric field vector in an
electromagnetic wave. Antennas are designed to transmit or receive waves with a specific
polarization, which affects their performance in various applications. Proper matching of
polarization is essential for efficient signal transmission and reception.

Question - 7 : What is the free-space path loss, and how is it calculated ?

Answer - 7 : Free-space path loss is the attenuation of an electromagnetic signal as it
propagates through free space without any obstacles. It is calculated using the Friis
transmission equation, which takes into account the distance between the transmitter and
receiver, the frequency of the signal, and the antenna gains.

Question - 8 : What is the concept of the near-field and far-field regions around an antenna,
and how do they differ in terms of electromagnetic wave behavior ?
Answer - 8 : The near-field and far-field regions are two distinct regions surrounding an
antenna. In the near-field, electromagnetic fields are primarily reactive, and the energy is
concentrated close to the antenna. In the far-field, the fields behave like radiating waves, and
the energy propagates as electromagnetic radiation. The transition between these regions
depends on the distance from the antenna and the wavelength of the emitted signal.

Microwave Engineering questions and answers

Question - 9 : What is the difference between microstrip and stripline in microwave circuits ?
Answer - 9 : Microstrip and stripline are two common transmission line configurations in
microwave circuits. Microstrip is a planar transmission line with one conductor on the top side
of a dielectric substrate, while stripline has two conductive layers separated by a dielectric
material. The choice between them depends on factors like frequency, size, and cost.
Question - 10 : Explain the concept of impedance matching in microwave circuits.
Answer - 10 : Impedance matching is the process of ensuring that the input and output
impedance of microwave components or circuits is equal to the characteristic impedance of
the transmission line. This minimizes signal reflections and maximizes power transfer,
improving overall system performance.

Question - 11: What are microwave filters, and why are they important in microwave
engineering ?
Answer - 11 : Microwave filters are passive components that allow certain frequencies to pass
through while attenuating others. They are crucial for selecting specific frequency bands in
microwave circuits, reducing interference, and shaping signal responses.

Question - 12 : Explain the purpose and operation of a circulator in microwave systems.

Answer - 12 : A circulator is a three-port microwave device that allows the flow of
electromagnetic energy in one direction while isolating the other ports. It is commonly used to
control the direction of power flow in microwave systems, such as in radar and
communication applications. Circulators are based on the principle of non-reciprocity,
ensuring that signals entering from one port are directed to the next port in a specific
sequence, making them valuable for signal routing and protection in complex microwave
circuits.

7.Max Power Track I ve used

8. Highspeed design methodologies

9. DDR, SATA, PCIe, USB, FPGA, Ethernet and other interfaces( frequency range operating voltage,
Routing constraints and topology)

12. Back drill, via filling

15. Length matching (Skew, serpentine routing)

16. Test point

18. Strip line , microstripline and dual stripline

How to Test the impedance while doing FAB

1. Decap placement
Foot print calculation
2. Component Keep in
3. Route Keep in
4. Keep out area
5. What are the components will produce EMI
Crystal oscillator
6. Placement of Crystal
Close to device and place caps close to crystal
7. Causes of EMI effect in Differential Pair
8. Gerber format file name.
9. Minimum Current rating worked
10. Placement of connectors, ETHERNET & DDR
11. Why should we go for buried Via instead of normal Via
12. Via Plugging & filling
13. any angle , 90 degree ,45 and 135 degree routing
14. Power plane
15. EMN and EMP file (import and export and tools to extract the file)
16. DXF (how to import and export and how to cross verify the dimensions)

1.Blind buried via

2.Microvia

3.Aspect Ratio

4.DFX guideline

5.Stackup design

6.Undershoot and Overshoot

7.EMN and EMC

8.Highspeed design methodologies

9.DDR , SATA , PCIe, USB, FPGA, Ethernet and other interfaces( frequency range operating voltage, Routing
constraints and topology)

10.Minimum trace width and airgap u worked.

11.Propogation delay and relative propogation delay .

12.Backdrill, Via filling

13.Cross talk, Ground Bounce, Reflection and skin effect.

14.Differential pair (coupling and un coupling, phase tolerance).

15.Length matching( Skew , serpentine routing)

16.Test point

17.IPC standards

18.Stripline , microstripline and dual stripline

19.Analog and digital routing and separation

20.impedance formula.

21.Microprocessor and controller

22.any angle , 90 degree ,45 and 135 degree routing

23.Power plane

24.Design process

25.EMN and EMP file (import and export and tools to extract the file)

26.DXF (how to import and export and how to cross verify the dimensions)

27.Routing strategy.

17. Wat is aspect ratio

18. Foot print?
19. minimum drill size u have used.
20. Types of Vias
21. About tester constraints
22. Force & Sense Signal Property
23. Annular rings
24. Wat are things need to have in Assembly layer
25. Purpose of De-caps & why it should be place near to IC
26. Wat is a controlled impedance
27. Max Power Track I ve used
28. How to reduce EMI
29. EMC?
30. Wat is signal Integrity
31. Main Factors of signal Integrity
32. Stack up
33. How to Test the impedance while doing FAB
34. Decap placement
35. Wat is homogenous & Hetrogenous parts
36. Annular Ring
37. Aspect Ratio
38. Foot print calculation
39. Component Keep in
40. Route Keep in
41. Keep out area
42. Stack up for 8 layer (2 signals)
43. Wat is a controlled Impedance
44. Wat is a EMI
45. How to reduce EMI
46. Wat is EMC
47. How can we vary the Impedance
48. Why Decaps… Why should we place near to IC
49. Wat are the components will produce EMI
50. Placement of Crystal
51. Wat is DFM & DFT
52. Wat are things need to have in DFM
53. Causes of EMI effect in Differential Pair
54. Gerber format file name.
55. Mimium Current rating worked
56. Placement of connectors, ETHERNET & DDR
57. Via,,, Types of Via.. Why should we go for buried Via instead of normal Via
58. Via Plugging & filling
59. Minimum Drill size I ve worked
60. Copper things for Top & inner layers
61. Wat is the Max & Min value of total Finished thickness worked
62. Do we have reference plane for TOP & Bottom Layers
63. Wat is Ground Bounce