Product Order Technical Tools & Support &

Folder Now Documents Software Community

LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

LM3103 Synchronous 1-MHz 0.75-A Step-Down Voltage Regulator

1 Features • Storage Systems
•
1 Input Voltage Range 4.5 V to 42 V • Broadband Infrastructure
• 0.75 A Output Current • Direct Conversion from 2,3,4 Cell Lithium
• 0.6V, ±2% Reference Batteries Systems
• Integrated Dual N-Channel Main and
3 Description
Synchronous MOSFETs
The LM3103 Synchronously Rectified Buck Converter
• Low Component Count and Small Solution Size features all required functions to implement a highly
• Stable with Ceramic and Other Low ESR efficient and cost effective buck regulator. It is
Capacitors capable of supplying 0.75 A to loads with an output
• No Loop Compensation Required voltage as low as 0.6 V. Dual N-Channel
synchronous MOSFET switches allow a low
• High Efficiency at a Light Load by DCM Operation component count, thus reducing complexity and
• Pre-bias Startup minimizing board size.
• Ultra-Fast Transient Response Different from most other COT regulators, the
• Programmable Soft-Start LM3103 does not rely on output capacitor ESR for
• Programmable Switching Frequency up to 1 MHz stability, and is designed to work exceptionally well
with ceramic and other very low ESR output
• Valley Current Limit capacitors. It requires no loop compensation, results
• Thermal Shutdown in a fast load transient response and simple circuit
• Output Over-Voltage Protection implementation. The operating frequency remains
• Precision Internal Reference for an Adjustable nearly constant with line variations due to the inverse
relationship between the input voltage and the on-
Output Voltage Down to 0.6 V
time. The operating frequency can be externally
• Thermally Enhanced HTSSOP-16 Package programmed up to 1 MHz. Protection features include
VCC under-voltage lock-out, output over-voltage
2 Applications protection, thermal shutdown, and gate drive under-
voltage lock-out. The LM3103 is available in the
• 5VDC, 12VDC, 24VDC, 12VAC, and 24VAC
thermally enhanced HTSSOP-16 package.
Systems
• Embedded Systems Device Information(1)
• Industrial Control PART NUMBER PACKAGE BODY SIZE (NOM)
• Automotive Telematics and Body Electronics LM3103 HTSSOP-16 5.00 mm × 4.40 mm
• Point of Load Regulators (1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

Table of Contents
1 Features .................................................................. 1 7 Detailed Description ............................................ 10
2 Applications ........................................................... 1 7.1 Functional Block Diagram ....................................... 10
3 Description ............................................................. 1 7.2 Feature Description................................................. 10
4 Revision History..................................................... 2 8 Applications and Implementation ...................... 14
5 Pin Configuration and Functions ......................... 3 8.1 Application Information............................................ 14
6 Specifications......................................................... 4 9 Device and Documentation Support.................. 17
6.1 Absolute Maximum Ratings ...................................... 4 9.1 Receiving Notification of Documentation Updates.. 17
6.2 ESD Ratings.............................................................. 4 9.2 Community Resources............................................ 17
6.3 Recommended Operating Conditions....................... 4 9.3 Trademarks ............................................................. 17
6.4 Thermal Information .................................................. 4 9.4 Electrostatic Discharge Caution .............................. 17
6.5 Electrical Characteristics........................................... 5 9.5 Glossary .................................................................. 17
6.6 Typical Characteristics .............................................. 7 10 Mechanical, Packaging, and Orderable
Information ........................................................... 17

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (April 2013) to Revision G Page

• Changed layout of National Data Sheet to TI format ............................................................................................................. 1

2 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

5 Pin Configuration and Functions

PWP Package
16-Pin HTSSOP
Top View

Pin Functions
Pin Name Description Application Information
1, 2 VIN Input supply voltage Supply pin to the device. Nominal input range is 4.5 V to 42 V.
3, 4 SW Switch Node Internally connected to the source of the main MOSFET and the drain of the synchronous
MOSFET. Connect to the output inductor.
5 BST Connection for Connect a 33 nF capacitor from the SW pin to this pin. This capacitor is charged through an
bootstrap capacitor internal diode during the main MOSFET off-time.
6 AGND Analog Ground Ground for all internal circuitry other than the PGND pin.
7 SS Soft-start A 70 µA internal current source charges an external capacitor of larger than 22 nF to provide
the soft-start function.
8 NC No Connection This pin should be left unconnected.
9, 10 GND Ground Must be connected to the AGND pin for normal operation. The GND and AGND pins are not
internally connected.
11 FB Feedback Internally connected to the regulation and over-voltage comparators. The regulation setting is
0.6 V at this pin. Connect to feedback resistors.
12 EN Enable pin Internal pull-up. Connect to a voltage higher than 1.6 V to enable the device.
13 RON On-time Control An external resistor from the VIN pin to this pin sets the main MOSFET on-time.
14 VCC Startup regulator Nominally regulated to 6 V. Connect a capacitor of larger than 1 µF between the VCC and
Output AGND pins for stable operation.
15, 16 PGND Power Ground Synchronous MOSFET source connection. Tie to a ground plane.
DAP EP Exposed Pad Thermal connection pad. Connect to the ground plane.

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VIN, RON to AGND –0.3 43.5 V
SW to AGND –0.3 43.5 V
SW to AGND (Transient) –2 (< 100 ns) V
VIN to SW –0.3 43.5 V
BST to SW –0.3 7 V
VCC to AGND –0.3 7 V
FB to AGND –0.3 5 V
All Other Inputs to AGND –0.3 7 V
Junction Temperature, TJ 150 °C
Storage Temperature, Tstg –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2 kV

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Supply Voltage Range (VIN) 4.5 42 V
Junction Temperature Range (TJ) −40 125 °C

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Ratings are conditions
under which operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical
Characteristics.

6.4 Thermal Information

LM3103
(1)
THERMAL METRIC PWP (HTSSOP) UNIT
16 PINS
RθJA Junction-to-ambient thermal resistance 35 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.

4 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

6.5 Electrical Characteristics

Specifications with standard type are for TJ = 25°C unless otherwise specified. Minimum and Maximum limits are specified
through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are
provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 18 V, VOUT = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
START-UP REGULATOR, VCC
VCC VCC output voltage CVCC = 1 µF, no load TJ = –40°C to +125°C 5.6 6.0 6.2 V
ICC = 2 mA TJ = –40°C to +125°C 55 150 mV
VIN – VCC VIN – VCC dropout voltage
ICC = 10 mA TJ = –40°C to +125°C 235 500
VCC undervoltage lockout
VCC-UVLO VIN increasing TJ = –40°C to +125°C 3.5 3.7 4.1 V
threshold (UVLO)
VCC-UVLO-HYS VCC UVLO hysteresis VIN decreasing 275 mV
No switching, VFB = 1
IIN IIN operating current TJ = –40°C to +125°C 1.0 1.25 mA
V
IIN operating current, device
IIN-SD VEN = 0 V TJ = –40°C to +125°C 20 40 µA
shutdown
IVCC VCC current limit VCC = 0 V TJ = –40°C to +125°C 20 33 42 mA
SWITCHING CHARACTERISTICS
RDS-UP-ON Main MOSFET RDS(on) TJ = –40°C to +125°C 0.370 0.7 Ω
RDS- DN-ON Syn. MOSFET RDS(on) TJ = –40°C to +125°C 0.220 0.4 Ω
SOFT-START
ISS SS pin source current VSS = 0 V TJ = –40°C to +125°C 45 70 95 µA

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 5

Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

Electrical Characteristics (continued)

Specifications with standard type are for TJ = 25°C unless otherwise specified. Minimum and Maximum limits are specified
through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are
provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 18 V, VOUT = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CURRENT LIMIT
ICL Syn. MOSFET current limit
0.9 A
threshold
ON/OFF TIMER
VIN = 10 V, RON = 33 kΩ 0.350
ton ON timer pulse width µs
VIN = 18 V, RON = 33 kΩ 0.170
ON timer minimum pulse
ton-MIN 100 ns
width
toff OFF timer pulse width 240 ns
ENABLE INPUT
VEN EN Pin input threshold VEN rising TJ = –40°C to +125°C 1.6 1.85 V
VEN-HYS Enable threshold hysteresis VEN falling 230 mV
IEN Enable Pull-up Current VEN = 0 V 1 µA
REGULATION AND OVERVOLTAGE COMPARATOR
VFB In-regulation feedback voltage TJ = –40°C to +125°C 0.588 0.6 0.612 V
Feedback overvoltage TJ = –40°C to +125°C
VFB-OV 0.655 0.680 0.705 V
threshold
IFB 1 nA
THERMAL SHUTDOWN
TSD Thermal shutdown TJ rising
165 °C
temperature
TSD-HYS Thermal shutdown TJ falling
20 °C
temperature hysteresis

6 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

6.6 Typical Characteristics

All curves are taken at VIN = 18 V with the configuration in the typical application circuit for VOUT = 3.3 V shown in this
datasheet. TA = 25°C, unless otherwise specified.

Figure 1. Quiescent Current, IIN vs VIN Figure 2. VCC vs ICC

Figure 3. VCC vs VIN Figure 4. ton vs VIN

Figure 5. Switching Frequency, fSW vs VIN Figure 6. VFB vs Temperature

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 7

Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

Typical Characteristics (continued)

All curves are taken at VIN = 18 V with the configuration in the typical application circuit for VOUT = 3.3 V shown in this
datasheet. TA = 25°C, unless otherwise specified.

Figure 7. RDS(on) vs Temperature Figure 8. Efficiency vs Load Current (VOUT = 3.3 V)

Figure 9. VOUT Regulation vs Load Current (VOUT = 3.3 V) Figure 10. Efficiency vs Load Current (VOUT = 0.6 V)

Figure 12. Power Up (VOUT = 3.3 V, 0.75 A Loaded)

Figure 11. VOUT Regulation vs Load Current (VOUT = 0.6 V)

8 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

Typical Characteristics (continued)

All curves are taken at VIN = 18 V with the configuration in the typical application circuit for VOUT = 3.3 V shown in this
datasheet. TA = 25°C, unless otherwise specified.

Figure 13. Enable Transient (VOUT = 3.3 V, 0.75 A Loaded) Figure 14. Shutdown Transient (VOUT = 3.3 V, 0.75 A Loaded)

Figure 15. Continuous Mode Operation (VOUT = 3.3 V, 2.5 A Figure 16. Discontinuous Mode Operation (VOUT = 3.3 V, 0.02
Loaded) A Loaded)

Figure 17. DCM to CCM Transition (VOUT = 3.3 V, 0.01 A - Figure 18. Load Transient (VOUT = 3.3 V, 0.075 A - 0.75 A
0.75 A Load) Load, Current slew-rate: 2.5 A/µs)

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 9

Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

7 Detailed Description

7.1 Functional Block Diagram

7.2 Feature Description

The LM3103 Step Down Switching Regulator features all required functions to implement a cost effective,
efficient buck power converter which is capable of supplying 0.75 A to loads. It contains dual N-Channel main
and synchronous MOSFETs. The Constant ON-Time (COT) regulation scheme requires no loop compensation,
results in a fast load transient response and simple circuit implementation. The regulator can function properly
even with an all ceramic output capacitor network, and does not rely on the output capacitor’s ESR for stability.
The operating frequency remains constant with line variations due to the inverse relationship between the input
voltage and the on-time. The valley current limit detection circuit, with a limit set internally at 0.9 A, inhibits the
main MOSFET until the inductor current level subsides.
The LM3103 can be applied in numerous applications and can operate efficiently for inputs as high as 42 V.
Protection features include VCC under-voltage lockout, output over-voltage protection, thermal shutdown, gate
drive under-voltage lock-out. The LM3103 is available in the thermally enhanced HTSSOP-16 package.

7.2.1 COT Control Circuit Overview

COT control is based on a comparator and a one-shot on-timer, with the output voltage feedback (feeding to the
FB pin) compared with a 0.6 V internal reference. If the voltage of the FB pin is below the reference, the main
MOSFET is turned on for a fixed on-time determined by a programming resistor RON and the input voltage VIN,
upon which the on-time varies inversely. Following the on-time, the main MOSFET remains off for a minimum of
240 ns. Then, if the voltage of the FB pin is below the reference, the main MOSFET is turned on again for
another on-time period. The switching will continue to achieve regulation.

10 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

Feature Description (continued)

The regulator will operate in the discontinuous conduction mode (DCM) at a light load, and the continuous
conduction mode (CCM) with a heavy load. In the DCM, the current through the inductor starts at zero and
ramps up to a peak during the on-time, and then ramps back to zero before the end of the off-time. It remains
zero and the load current is supplied entirely by the output capacitor. The next on-time period starts when the
voltage at the FB pin falls below the internal reference. The operating frequency in the DCM is lower and varies
larger with the load current as compared with the CCM. Conversion efficiency is maintained since conduction
loss and switching loss are reduced with the reduction in the load and the switching frequency respectively. The
operating frequency in the DCM can be calculated approximately as follows:
VOUT (VIN - 1) x L x 1.18 x 1020 x IOUT
fSW =
(VIN ± VOUT) x RON2 (1)
In the continuous conduction mode (CCM), the current flows through the inductor in the entire switching cycle,
and never reaches zero during the off-time. The operating frequency remains relatively constant with load and
line variations. The CCM operating frequency can be calculated approximately as follows:
VOUT
fSW =
8.3 x 10-11 x RON (2)
The output voltage is set by two external resistors RFB1 and RFB2. The regulated output voltage is
VOUT = 0.6V x (RFB1 + RFB2)/RFB2 (3)

7.2.2 Startup Regulator (VCC)

A startup regulator is integrated within the LM3103. The input pin VIN can be connected directly to a line voltage
up to 42 V. The VCC output regulates at 6 V, and is current limited to 30 mA. Upon power up, the regulator
sources current into an external capacitor CVCC, which is connected to the VCC pin. For stability, CVCC must be at
least 1 µF. When the voltage on the VCC pin is higher than the under-voltage lock-out (UVLO) threshold of 3.7
V, the main MOSFET is enabled and the SS pin is released to allow the soft-start capacitor CSS to charge.
The minimum input voltage is determined by the dropout voltage of the regulator and the VCC UVLO falling
threshold (≊3.4 V). If VIN is less than ≊4.0 V, the regulator shuts off and VCC goes to zero.

7.2.3 Regulation Comparator

The feedback voltage at the FB pin is compared to a 0.6 V internal reference. In normal operation (the output
voltage is regulated), an on-time period is initiated when the voltage at the FB pin falls below 0.6 V. The main
MOSFET stays on for the programmed on-time, causing the output voltage to rise and consequently the voltage
of the FB pin to rise above 0.6 V. After the on-time period, the main MOSFET stays off until the voltage of the FB
pin falls below 0.6 V again. Bias current at the FB pin is nominally 1 nA.

7.2.4 Zero Coil Current Detect

The current of the synchronous MOSFET is monitored by a zero coil current detection circuit which inhibits the
synchronous MOSFET when its current reaches zero until the next on-time. This circuit enables the DCM
operation, which improves the efficiency at a light load.

7.2.5 Over-Voltage Comparator

The voltage at the FB pin is compared to a 0.68 V internal reference. If it rises above 0.68 V, the on-time is
immediately terminated. This condition is known as over-voltage protection (OVP). It can occur if the input
voltage or the output load changes suddenly. Once the OVP is activated, the main MOSFET remains off until the
voltage at the FB pin falls below 0.6 V. The synchronous MOSFET will stay on to discharge the inductor until the
inductor current reduces to zero and then switch off.

7.2.6 ON-Time Timer, Shutdown

The on-time of the LM3103 main MOSFET is determined by the resistor RON and the input voltage VIN. It is
calculated as follows:
8.3 x 10-11 x RON
tON =
VIN (4)

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 11

Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

Feature Description (continued)

The inverse relationship of ton and VIN gives a nearly constant frequency as VIN is varied. RON should be selected
such that the on-time at maximum VIN is greater than 100 ns. The on-timer has a limiter to ensure a minimum of
100 ns for ton. This limits the maximum operating frequency, which is governed by the following equation:
VOUT
fSW(MAX) =
VIN(MAX) x 100 ns (5)
The LM3103 can be remotely shut down by pulling the voltage of the EN pin below 1.6 V. In this shutdown mode,
the SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the EN pin
allows normal operation to resume because the EN pin is internally pulled up.

Figure 19. Shutdown Implementation

7.2.7 Current Limit

Current limit detection is carried out during the off-time by monitoring the re-circulating current through the
synchronous MOSFET. Referring to the Functional Block Diagram, when the main MOSFET is turned off, the
inductor current flows through the load, the PGND pin and the internal synchronous MOSFET. If this current
exceeds 0.9 A, the current limit comparator toggles, and as a result the start of the next on-time period is
disabled. The next switching cycle starts when the re-circulating current falls back below 0.9 A (and the voltage
at the FB pin is below 0.6 V). The inductor current is monitored during the on-time of the synchronous MOSFET.
As long as the inductor current exceeds 0.9 A, the main MOSFET will remain inhibited to achieve current limit.
The operating frequency is lower during current limit owing to a longer off-time.
Figure 20 illustrates an inductor current waveform. On average, the output current IOUT is the same as the
inductor current IL, which is the average of the rippled inductor current. In case of current limit (the current limit
portion of Figure 20), the next on-time will not initiate until that the current drops below 0.9 A (assume the voltage
at the FB pin is lower than 0.6 V). During each on-time the current ramps up an amount equal to:
(VIN - VOUT) x ton
ILR =
L (6)
During current limit, the LM3103 operates in a constant current mode with an average output current IOUT(CL)
equal to 0.9 A + ILR / 2.

12 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

Feature Description (continued)

Figure 20. Inductor Current - Current Limit Operation

7.2.8 N-Channel MOSFET and Driver

The LM3103 integrates an N-Channel main MOSFET and an associated floating high voltage main MOSFET
gate driver. The gate drive circuit works in conjunction with an external bootstrap capacitor CBST and an internal
high voltage diode. CBST connected between the BST and SW pins powers the main MOSFET gate driver during
the main MOSFET on-time. During each off-time, the voltage of the SW pin falls to approximately –1 V, and CBST
charges from VCC through the internal diode. The minimum off-time of 240 ns provides enough time for charging
CBST in each cycle.

7.2.9 Soft-Start
The soft-start feature allows the converter to gradually reach a steady state operating point, thereby reducing
startup stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold and a 180 µs
fixed delay, a 70 µA internal current source charges an external capacitor CSS connecting to the SS pin. The
ramping voltage at the SS pin (and the non-inverting input of the regulation comparator as well) ramps up the
output voltage VOUT in a controlled manner. An internal switch grounds the SS pin if any of the following three
cases happen: (i) VCC is below the under-voltage lockout threshold; (ii) a thermal shutdown occurs; or (iii) the EN
pin is grounded. Alternatively, the output voltage can be shut off by connecting the SS pin to the ground using an
external switch. Releasing the switch allows the voltage of the SS pin to ramp up and the output voltage to return
to normal. The shutdown configuration is shown in Figure 21.

Figure 21. Alternate Shutdown Implementation

7.2.10 Thermal Protection

The junction temperature of the LM3103 should not exceed the maximum limit. Thermal protection is
implemented by an internal Thermal Shutdown circuit, which activates (typically) at 165°C to make the controller
enter a low power reset state by disabling the main MOSFET, disabling the on-timer, and grounding the SS pin.
Thermal protection helps prevent catastrophic failures from accidental device overheating. When the junction
temperature falls back below 145°C (typical hysteresis = 20°C), the SS pin is released and normal operation
resumes.
Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

8 Applications and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 External Components
The following guidelines can be used to select external components.
RFB1 and RFB2 : These resistors should be chosen from standard values in the range of 1.0 kΩ to 10 kΩ,
satisfying the following ratio:

RFB1/RFB2 = (VOUT/0.6 V) - 1 (7)

For VOUT = 0.6 V, the FB pin can be connected to the output directly with a pre-load resistor drawing more than
20 µA. This is because the converter operation needs a minimum inductor current ripple to maintain good
regulation when no load is connected.
RON: Equation 2 can be used to select RON if a desired operating frequency is selected. But the minimum value
of RON is determined by the minimum on-time. It can be calculated as follows:
VIN(MAX) x 100 ns
RON t
8.3 x 10-11 (8)
If RON calculated from Equation 2 is smaller than the minimum value determined in Equation 8, a lower frequency
should be selected to re-calculate RON by Equation 2. Alternatively, VIN(MAX) can also be limited in order to keep
the frequency unchanged. The relationship of VIN(MAX) and RON is shown in Figure 22.
On the other hand, the minimum off-time of 240 ns can limit the maximum duty ratio. This may be significant at
low VIN. A larger RON should be selected in any application requiring a large duty ratio.

Figure 22. Maximum VIN for selected RON

L: The main parameter affected by the inductor is the amplitude of the inductor current ripple (ILR), which is
recommended to be greater than 0.3 A. Once ILR is selected, L can be determined by:
VOUT x (VIN - VOUT)
L=
ILR x fSW x VIN (9)
where VIN is the input voltage and fSW is determined from Equation 2.

14 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

Application Information (continued)

If the output current IOUT is known, by assuming that IOUT = IL, the peak and valley of ILR can be determined.
Beware that the peak of ILR should not be larger than the saturation current of the inductor and the current rating
of the main and synchronous MOSFETs. Also, the valley of ILR must be positive if CCM operation is required.

Figure 23. Inductor selection for VOUT = 3.3 V

Figure 24. Inductor selection for VOUT = 0.6 V

Figure 23 and Figure 24 show curves on inductor selection for various VOUT and RON. According to Equation 8,
VIN is limited for small RON. Some curves are therefore limited as shown in the figures.
CVCC: The capacitor on the VCC output provides not only noise filtering and stability, but also prevents false
triggering of the VCC UVLO at the main MOSFET on/off transitions. CVCC should be no smaller than 1 µF for
stability, and should be a good quality, low ESR, ceramic capacitor.
COUT and COUT3: COUT should generally be no smaller than 10 µF. Experimentation is usually necessary to
determine the minimum value for COUT, as the nature of the load may require a larger value. A load which
creates significant transients requires a larger COUT than a fixed load.
COUT3 is a small value ceramic capacitor located close to the LM3103 to further suppress high frequency noise at
VOUT. A 47 nF capacitor is recommended.
CIN and CIN3: The function of CIN is to supply most of the main MOSFET current during the on-time, and limit the
voltage ripple at the VIN pin, assuming that the voltage source connecting to the VIN pin has finite output
impedance. If the voltage source’s dynamic impedance is high (effectively a current source), CIN supplies the
difference between the instantaneous input current and the average input current.
At the maximum load current, when the main MOSFET turns on, the current to the VIN pin suddenly increases
from zero to the valley of the inductor’s ripple current and ramps up to the peak value. It then drops to zero at
turn-off. The average current during the on-time is the load current. For a worst case calculation, CIN must be
capable of supplying this average load current during the maximum on-time. CIN is calculated from:

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 15

Product Folder Links: LM3103
LM3103
SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018 www.ti.com

Application Information (continued)

IOUT x tON
CIN =
'VIN (10)
where IOUT is the load current, ton is the maximum on-time, and ΔVIN is the allowable ripple voltage at VIN.
CIN3’s purpose is to help avoid transients and ringing due to long lead inductance at the VIN pin. A low ESR 0.1
µF ceramic chip capacitor located close to the LM3103 is recommended.
CBST: A 33 nF high quality ceramic capacitor with low ESR is recommended for CBST since it supplies a surge
current to charge the main MOSFET gate driver at each turn-on. Low ESR also helps ensure a complete
recharge during each off-time.
CSS: The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage at the
regulation comparator and therefore, the output voltage to reach their final value. The time is determined from the
following equation:
CSS x 0.6V
tSS = 180 Ps +
70 PA (11)
CFB: If the output voltage is higher than 1.6 V, CFB is needed in the Discontinuous Conduction Mode to reduce
the output ripple. The recommended value for CFB is 10 nF.

16 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated

Product Folder Links: LM3103

 LM3103
www.ti.com SNVS523G – SEPTEMBER 2007 – REVISED JANUARY 2018

9 Device and Documentation Support

9.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.

9.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

9.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
9.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 2007–2018, Texas Instruments Incorporated Submit Documentation Feedback 17

Product Folder Links: LM3103
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

LM3103MH/NOPB ACTIVE HTSSOP PWP 16 92 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM3103
MH
LM3103MHX/NOPB ACTIVE HTSSOP PWP 16 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM3103
MH

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 9-Aug-2022

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3103MHX/NOPB HTSSOP PWP 16 2500 330.0 12.4 6.95 5.6 1.6 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 9-Aug-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3103MHX/NOPB HTSSOP PWP 16 2500 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 9-Aug-2022

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
LM3103MH/NOPB PWP HTSSOP 16 92 495 8 2514.6 4.06

Pack Materials-Page 3
 PACKAGE OUTLINE
PWP0016A SCALE 2.400
PowerPAD
TM
HTSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE

C
6.6
TYP SEATING PLANE
6.2
A PIN 1 ID 0.1 C
AREA 14X 0.65
16
1

5.1 2X
4.9 4.55
NOTE 3

8
9
0.30
4.5 16X
B 0.19
4.3
0.1 C A B

(0.15) TYP

SEE DETAIL A

4X 0.166 MAX
2X 1.34 MAX NOTE 5
NOTE 5

THERMAL
PAD

0.25
3.3
2.7 17 GAGE PLANE 1.2 MAX

0.15
0 -8 0.05
0.75
0.50 DETAIL A
3.3 (1) TYPICAL
2.7

4214868/A 02/2017
PowerPAD is a trademark of Texas Instruments.
NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may not be present.

www.ti.com
 EXAMPLE BOARD LAYOUT
PWP0016A PowerPAD
TM
HTSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE

(3.4)
NOTE 9
SOLDER MASK
(3.3) DEFINED PAD
16X (1.5) SYMM SEE DETAILS
1
16

16X (0.45)

(1.1)
SYMM 17 TYP (3.3)
(5)
NOTE 9

14X (0.65)

8 9
( 0.2) TYP
VIA (1.1) TYP

METAL COVERED (5.8)

BY SOLDER MASK

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:10X

METAL UNDER SOLDER MASK

SOLDER MASK METAL SOLDER MASK OPENING
OPENING
EXPOSED
METAL
EXPOSED
0.05 MAX METAL 0.05 MIN
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

PADS 1-16
4214868/A 02/2017

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.

www.ti.com
 EXAMPLE STENCIL DESIGN
PWP0016A PowerPAD
TM
HTSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE

(3.3)
BASED ON
16X (1.5) 0.125 THICK
STENCIL (R0.05) TYP
1
16

16X (0.45)

17 (3.3)
SYMM BASED ON
0.125 THICK
STENCIL

14X (0.65)

9
8

SYMM
METAL COVERED
BY SOLDER MASK SEE TABLE FOR
DIFFERENT OPENINGS
(5.8) FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE BY AREA
SCALE:10X

STENCIL SOLDER STENCIL

THICKNESS OPENING
0.1 3.69 X 3.69
0.125 3.3 X 3.3 (SHOWN)
0.15 3.01 X 3.01
0.175 2.79 X 2.79

4214868/A 02/2017

NOTES: (continued)

10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.

www.ti.com
 IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022, Texas Instruments Incorporated