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Lithography

This document provides an overview of an elective course on integrated circuits technology taught by Professor Hani Fikry in Fall 2023. The course will cover topics related to silicon processes used in integrated circuit fabrication, with a focus on lithography and etching as the most critical processes in determining minimum feature sizes. The document describes the basic photolithography process and individual steps including oxidation, deposition, photoresist application, exposure through a mask, development, etching, and resist stripping. It also discusses lithography techniques such as phase shift masking used to enhance resolution and push the limits of optical lithography.

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Ahmed Shafeek
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0% found this document useful (0 votes)
57 views38 pages

Lithography

This document provides an overview of an elective course on integrated circuits technology taught by Professor Hani Fikry in Fall 2023. The course will cover topics related to silicon processes used in integrated circuit fabrication, with a focus on lithography and etching as the most critical processes in determining minimum feature sizes. The document describes the basic photolithography process and individual steps including oxidation, deposition, photoresist application, exposure through a mask, development, etching, and resist stripping. It also discusses lithography techniques such as phase shift masking used to enhance resolution and push the limits of optical lithography.

Uploaded by

Ahmed Shafeek
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 38

Elective Course

on
INTEGRATED CIRCUITS TECHNOLOGY

Litho-
graphy

Prof. Hani Fikry

Fall 2023

1
Topics on Silicon Processes
▪ Oxidation (doping mask, isolation, passivation..: thermal or deposited)
▪ Ion Implantation (doping and buried oxidation in SOI)
▪ Diffusion (activation of implanted impurities)
▪ Epitaxy (crystalline growth over substrate, buried doping,..)
▪ CMP (chemical mechanical polishing: planarization)
▪ Deposition (of poly, oxide, nitride: CVD, metal: PVD & ECP*)
▪ Photolithography (patterning of photoresist using a photomask)
▪ Etching (patterning of a surface: dry and wet)
▪ Annealing (dopant redistribution and activation, defect healing,
contact adherence,..: normal and RTA : Rapid Thermal Annealing)

CVD:Chemical Vapor Deposition, PVD:Physical Vapor Deposition, ECP:Electro-Chemical Plating

These are some topics to be studied.


The most critical in determining the minimum gate length
(minimum feature size or critical dimension CD)
are lithography and etching.

2
Stone = Litho
Direct Writing

Lithography (from Greek - lithos, 'stone' + graphein, 'to write') is a method


for printing (or engraving) on a stone. The term is well known since the ancient
Egyptians.

3
Photolithography (or "optical lithography") is a process used in microfabrication
to selectively remove parts of a thin film or the bulk of a substrate. It uses light
to transfer a geometric pattern from a photomask to a light sensitive chemical
"photoresist", or simply "resist," on the substrate. As seen in the following
slides we develop the resist and engrave the material underneath the photo resist.
In complex integrated circuits, a modern CMOS wafer will go through the
photolithographic cycle up to 50 times.

4
Photolithography

Photolithography (PL) is the process by which the photoresist (PR)


is developed to reproduce an image of the photomask after insolation
with UV photons and chemical treatment.
The slide shows a +ve PR case since after “etching” of the underlying
film the remaining film shape is a +ve image of the mask drawing.
Development is the shaping of the PR to get a –ve image of the mask
on the PR. Etching is the shaping of the underlying film to get a +ve
image of the mask. Etching step is not shown in this slide.

5
Photolithography Steps
1) Oxide growth

This is normally the field oxide (FOX: thick oxide) grown thermally after
a cleaning step. If organic or inorganic contaminations are present
on the wafer surface, they are usually removed by wet chemical cleaning.

6
Spinner

• Spin-on coating

• rpm = 2000

• thickness = 2 um

2000 rpm

The wafer is covered with photoresist by spin coating. A viscous,


liquid solution of photoresist is dispensed onto the wafer, and the
wafer is spun rapidly to produce a thickness uniform layer. The spin
coating typically runs at 1200 to 4800 rpm for 30 to 60 seconds,
and produces a layer between 0.5 and 2.5 micrometres thick.
The spin coating process results in uniformity of within 5 to 10 nanometres.
This uniformity can be explained by detailed fluid-mechanical modelling,
which shows that the resist moves much faster at the top of the layer than at
the bottom, where viscous forces bind the resist to the wafer surface.
Thus, the top layer of resist is quickly ejected from the wafer's edge
while the bottom layer still creeps slowly radially along the wafer.

7
3) Photoresist (PR) hardening :
Pre-baking (soft-baking at low T  100oC) after spin-on coating

The photo resist-coated wafer is then prebaked to drive off


excess photoresist solvent, typically at 90 to 100 °C for 30 to
60 seconds on a hotplate or inside an oven.

8
• Photolithography Area: Yellow Room

Non-actinic light

Photolithography region is illuminated in non-actinic yellow light


not to affect the applied resist and to allow comfortable visibility for operators.
A non-actinic safe-light (e.g., red or yellow) could be used without risk of exposing
UV light-sensitive films.

9
4) PR exposure to UV light through the mask
– for contact printing higher resolution is obtained but
shorter mask lifetime.
– for proximity printing resolution is less but lifetime is
higher (most machines have both modes)

quartz chromium 20 microns


400 to 200 nm

(Proximity Printing Mode)

After prebaking, the photoresist is exposed to intense light.


Optical lithography typically uses ultraviolet light. UV has a
short wavelength resulting in high imaging resolution.

10
This MJB3 mask aligner model is from a German company called Karl-Sűss.
(The model is available in our Department since 1980).

11
Lab-Scale Mask Aligner
(Exposure)

This MBJ3 mask aligner used in the 90’s


on a lab scale. It is used to align the mask over the
PR coated wafer and to expose to UV light for a given
controlled time. The exposure time depends on the
PR type and thickness.

12
5) PR development then post-baking (hardening again)
– for positive resists: the exposed region can be removed
(photo-assisted depolymerization)
– for negative resists: the exposed region can’t be removed
while the unexposed region is removed (photo-assisted
polymerization)

+ve PR

A post-development bake is performed before etching the


underneath material. Positive photoresist, the most common
type, becomes soluble in the basic developer when exposed;
exposed negative photoresist becomes insoluble in the
(organic) developer. This chemical change allows some of the
photoresist to be removed by a special solution, called
"developer" by analogy with photographic developer.

13
6) Etching of underlying oxide and PR stripping
(note that the remaining oxide pattern has the same
shape as the mask drawing, that is why the resist is
called “positive”. If the resist is “negative” the
remaining oxide pattern will be the negative of the
mask drawing)

+ve image of the mask drawing

In etching, a liquid ("wet") or plasma ("dry") chemical agent


removes the uppermost layer of the substrate in the areas that
are not protected by photoresist (see next lecture on etching).

After a photoresist is no longer needed, it must be removed


from the substrate. This usually requires a liquid "resist stripper",
which chemically alters the resist so that it no longer adheres
to the substrate. Alternatively, photoresist may be removed by
plasma. This process is called ashing, and resembles dry etching.

14
Optics Technology and Sub-Wavelength Litho

Deep UV

Feature size

The ability to project a clear image of a small feature onto


the wafer is limited by the wavelength of the light that is used,
and the ability of the reduction lens system to capture enough
diffraction orders from the illuminated mask. Current
state-of-the-art photolithography tools use deep and extreme
ultraviolet (DUV and EUV) light from laser sources with wavelengths
of 248,193 and down to around 10 nm, which allow minimum
feature sizes down to few nanometers. Laser lithography has
thus played a critical role in the continued advance of the so-called
Moore’s Law for the last 30 years.

15
“Resolution” Enhancement
( , Diffraction )

Light distribution on PR

A conventional photomask is a transparent plate with the


same thickness everywhere, parts of which are covered
with non-transmitting material in order to create a
pattern on the semiconductor wafer when illuminated.
light diffraction at the edges of the mask limits the printing
resolution. Imagine a very tiny middle part of the mask shown,
then due to diffraction this tiny feature will not mask the light
underneath and the developed photoresist will develop into
only one window rather than two windows.

16
Resolution Enhancement Techniques (RET)
1) Phase Shift
Masking (PSM)

ET

Three main RETs exist.

17
ET

Phase-shifter thickness = /2(n-1)

A first RET is Phase-shift masking (PSM). Here we use


photomasks that take advantage of the interference generated
by phase differences to improve image resolution in photolithography.

In PSM, certain transmitting regions are made thinner or thicker.


Thus we induce a phase-shift in the light traveling through those regions of the mask.
When the thickness is suitably chosen, the interference of the phase-shifted light
with the light coming from unmodified regions of the mask has the effect of
improving the contrast on some critical dimension (CD) parts of the wafer,
the ideal case is a phase shift of 180 degrees.

18
PSM Example

Along one side of the CD feature we add the 180o shifter.


The line marked CD in this slide is the narrower.
Where should we add the shifter if we have an array of
narrow dense lines (as in memory chips for example)?

19
2) OPC

Transistor failure
(see next slide)

Proximity effects are the variations in the line width of a feature


(or the shape for a 2-D pattern) as a function of the proximity of
other nearby features. This situation is found in dense random logic
or analog circuits.
Optical proximity correction (OPC) is a photolithography
enhancement technique commonly used to compensate
for image errors due to diffraction or process effects.

20
Example for OPC Yield Enhancement
Proximity Effect
Poly/Diff
Extension
Recession

By approaching the resolution limit of the exposure tool the difference


between the designed pattern and the image on the wafer increases.
Optical Proximity Correction (OPC) is a way to mitigate this issue by
predistorting the mask patterns (see next slide).

21
w/o OPC

With OPC
Initial Mask Layout Resulting Pattern
No Optical Proximity Correction
w/ OPC
(NO OPC)

Optical Proximity Correction corrects these errors by


moving edges or adding extra polygons to the pattern
written on the photomask. This may be driven by pre-computed
look-up tables based on width and spacing between features
(known as rule based OPC) or by using compact models to
simulate the final pattern and thereby drive the movement
of edges, typically broken into sections, to find the best
solution, (this is known as model based OPC). The objective is
to reproduce, as well as possible, the original layout drawn
by the designer in the silicon wafer as depicted by the example shown here.

22
OPC Methodology
Lookup Table (LUT) Based
also called Rule-Based:
Serif Hammer- Outer and
heads inner serfs

Model Based:

Hybrid Based: noncritical LUT model critical

• Serif: a slight projection finishing.

In LUT approach, the necessary corrections are stored upfront


in a massive look-up table. Filling out the look-up table is
a very time consuming job. During the OPC process itself,
the software identifies each location in the layout to a specific
case in the look-up table and gives the stored correction.
Rules based OPC is a single step approach and fast enough.
In a model based OPC approach, a model will be constructed
(instead of a look-up table). The model has to represent the
experimental process as accurately as possible.
OPC conversion process becomes an iterative process, where
any layout situation will be simulated first using the calibrated model,
and based on the size of the deviation of the simulated layout
with the desired layout, a correction will be applied.
A number of iterations will typically be needed, making this approach
more accurate but slower than LUT approach.
In a hybrid approach, first a fast and rough rules based OPC is done,
after which the parts where the layout is very critical is fine-tuned using
model based OPC. Practically the OPC conversion times should not last
longer than one night.

23
OPC Techniques Comparison

24
3) DPL : Double-Patterning Lithography

HIGH DENSITY PRINT


WITH 2 LOW DENSITY
MASKS

LELE : Litho-Etch-Litho-Etch

double patterning lithography (DPL), where a conventional


lithography process is enhanced to produce double the expected
number of features. The double patterning was introduced for
the 32 nm technology node and below.

Double exposure is a sequence of two separate exposures of


the same photoresist layer using two different photomasks.
This technique is commonly used for patterns in the same
layer which look very different or have incompatible densities or pitches.

25
Examples of Layout Decomposition for DPL

1st Litho, 1st Etch 2nd Litho, 2nd Etch

DPL allows the decomposition of two-dimensional dense patterns into two


patterns which are easier to print as depicted in this figure.

26
Main Types of Printing

• Contact printing
– Simple equipment (mask aligner)
but practically unused due to spatial
non-uniformity of the contact
and defects appearing on both mask and PR.
• Proximity printing
– Simple mask aligner but less resolution
due to light diffraction.
• Projection printing (see next slide)
– Larger separation between mask (reticule) and wafer with image
formation system including sizing, focusing and step-and-repeat
(stepper) mechanisms.
– Higher resolution than proximity printing but expensive optics and
stepper are required.

A contact printer, the simplest exposure system, puts a photomask in


direct contact with the wafer and exposes it to a uniform light. Contact
printing is liable to damage both the mask and the wafer, and this
was the primary reason it was abandoned for high volume production.

A proximity printer puts a small gap between the photomask and


wafer to avoid the mentioned damage. The mask covers the entire
wafer, and simultaneously patterns every die on the wafer. Both
contact and proximity lithography require the light intensity to be
uniform across an entire wafer, and the mask to align precisely to
features already on the wafer. As modern processes use increasingly
large wafers, these conditions become increasingly difficult.

Research and laboratories often use contact or proximity lithography,


because it uses inexpensive hardware and can achieve high optical resolution.

27
Projection Printing (Step-and-Repeat Camera)

10:1 to 5:1

Unlike contact or proximity masks, which cover an entire wafer,


projection masks (known as "reticles“ or “reticules”) show only
one die or an array of die (known as a "field"). Projection exposure
systems (step-and-repeat camera, or simply steppers or scanners)
project the reticle onto the wafer many times to create the complete
wafer-scale patterning.

28
Difference between Mask and Reticle

1:1 “parallel” printing 10:1 “serial” printing

Mask printing is faster than reticule printing. However a


reticule; in contrast with a mask, is not 1:1 scaled but
5: 1 or 10: 1. This allows for less expensive fabrication.
To reach 1:1 scaling on the wafer surface we need optical
processing (not shown in this slide).

29
30
Step and Scan

ASML Scanner

31
APPENDIX

EB Direct Writer

32
• Other Lithography Techniques

Mask or mask-less types,


Most used:
1) Photo Lithography (Mask)
2) Electron-Beam Litho (Mask-less)
3) X-Ray Litho (Expensive Mask)

Although photolithographic technology is the most commercially


advanced form of micro/nanolithography, other techniques
are also used. Some, for example electron beam lithography,
are capable of much greater patterning resolution (sometimes
as small as a few nanometers). Electron beam lithography is
also important commercially, primarily for its use in the
manufacture of photomasks. Electron beam lithography as it
is usually practiced is a form of maskless lithography, in that a
mask is not required to generate the final pattern. Instead,
the final pattern is created directly from a digital representation
on a computer, by controlling an electron beam as it scans
across a resist-coated substrate. Electron beam lithography
has the disadvantage of being much slower than photolithography.

33
EB Lithography
• Requires eb resist • Very expensive
(PMMA)*. compared to photolithography.
• Direct writing means no • Very low throughput
mask is required. (1-5 wafer/hr)
• Short   high E
0.1 nm  12 KeV
• Used in mask making.
• Also can be used in
prototyping.
Beam
diam =
0.01 - 0.1
micron

Raster Scan

PMMA (polymethyl methacrylate) is a versatile polymer material that is


well suited for many imaging applications. PMMA is most commonly
used as a high resolution positive resist for direct write e-beam
as well as x-ray and deep UV microlithographic processes.

34
Effect of Increasing E (KeV)
EB Scattering  Proximity Effect

•Simulated electron trajectories for a beam of 100 primary electrons


•Forward and backward scattering makes exposed region > beam size

Eb
resist

Exposed region

At higher E, wavelength is shorter but scattering is larger and insolation is weak

A limitation in EBL is scattering effect that makes the


exposed area quite larger than the beam diameter specially at
lower wavelengths. The technology is however suitable for
large area reticules. Since a reticle can be x10 in dimensions
then this problem is not an issue.

35
X-Ray Lithography
• X-ray  = 0.5 to 5 nm

Mask problems: 1) no transparent material


like quartz for UV light !
X-ray source Very thin carrier is therefore needed.

2) No opaque material like Cr for UV !

The masking layer should be very thick (up to


50 microns)

3) No reticule is possible. Complete wafer size


expensive mask is needed.

X-ray mask

A material to be transparent when its energy gap is


larger than hv (so we try Si, C and SiC which are
relatively highly absorbing..that is why very thin carrier is
needed (< 1 um). It should be sufficiently hard
and thin. One micron of SiC carrier has a transparency
of only 57% rather than near 100%.
On the contrary, absorbing materials are metals.
However not as absorbing and reflective as Cr for
UV photons. One micron of Au is 14% transmitting
for 1 nm X rays (rather than near 0%).
These absorbing materials make heating of
masks another problem!.

36
X-Ray Lithography

• Developed resist using X-ray Lithography


with deep penetration and high aspect-ratio 3D patterns

• Vertical devices can be fabricated on the columnar structures to save


silicon area.

X-ray litho is a promising technology used successfully


for small-scale and 3D research applications.
Having short wavelengths (below 1 nm), X-rays
overcome the diffraction limits of optical lithography,
allowing smaller feature sizes.

A columnar vertical MOSFET can be developed.


The source and drain are located at the top and
bottom of the cylinder and a surrounding closed
gate is formed on the peripheral region. Vertical
memory cell can be also formed with large cap
but low silicon area.

37
Assignment
Assignment# #1:1:
Choose one
Choose one of
of the
the following
following two
topics
topics

1. Direct Writing (Mask-less) Lithography


for Reticle Fabrication

2. Resolution Enhancement Techniques

Around 10 pages report is due one week from today.

(See handout on how to write a scientific report)

See “how to write a scientific report” uploaded to the class material.

38

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