UNIT V

CORE OF THE EMBEDDED SYSTEM

 INTRODUCTION TO EMBEDDED SYSTEMS

● An Embedded system is an electronic /electromechanical system designed

to perform a specific function and is a combination of both Hardware and
Software.

● It is unique and the hardware and firmware are highly specialized to the
application domain.

● An embedded system is a microcontroller or microprocessor based system

which is designed to perform a specific task. For example, a fire alarm is
an embedded system; it will sense only smoke
An embedded system is a microcontroller or microprocessor
based system which is designed to perform a specific task
BLOCK DIAGRAM OF ES
 Sensors and Actuators
I/P device (Sensors)
◆ A sensor is a transducer device that converts energy from one form to
another (Non electrical to electrical) for any measurement or control
purpose. Ex: Temperature Sensor, Pressure sensor.

O/P device (Actuators)

◆ An actuator is a form of transducer device which converts signals from
one form to another form (electrical to non electrical).
◆ It is an output device. Ex: Electric motors, Stepper motors, LED(Light
Emitting Diode), Speaker.

Memory
◆ Memory is a group of registers used to store the data to be processed
(Input data), the processed data (output) and instructions(Code to run the
hardware)
◆ Two types of memory are RAM(Data memory), ROM(Program memory).
System core
◆ Set of special circuit/s which is the actual processing unit where the actual
 INTRODUCTION TO EMBEDDED
SYSTEMS

Purpose of Embedded Systems

◆ Data Collection/ Storage/Representation
◆ Data Communication
◆ Data processing, Monitoring
◆ Control Application specific user interface.
 INTRODUCTION TO EMBEDDED
SYSTEMS

Applications of Embedded Systems

◆ Consumer electronics - Televisions and digital cameras, computer printers,
video game consoles and home entertainment systems like PS4
◆ Household appliances – Refrigerators, washing machines, microwave ovens,
air conditioners
◆ Home automation - switching off electrical appliances like air-conditioners or
refrigerators , security alarms.
◆ Banking and retail - Automated teller Machine (ATM)
◆ Measurement and Instrumentation - Digital CRO, Digital Multi meter, Logic
Analyzer
◆ Health care - Scanners like those for MRI, CT, ECG machines devices to monitor
blood pressure and heartbeat
◆ Automotive industry. - Airbags, anti-lock braking system , cruise control, rain-
sensing wipers, emission control, traction control, automatic parking
 Characteristics of an Embedded Systems
◆ A system which is a combination of special purpose hardware
and embedded OS for executing a specific set of applications.

◆ May or may not contain an operating system for functioning.

◆ The firmware (software permanently installed in the device) of

an ES is pre-programmed and it is non alterable by the end user.

◆ Application specific requirements are the key deciding factors.

◆ Highly tailored to take advantage of the power saving modes

supported by the hardware and the OS.

◆ Execution behaviour is deterministic for certain types of ES like

“Hard Real Time Systems” (strict deadline).

◆ The response time requirement is critical for some critical

systems.

◆ Embedded systems are created to perform the task within a

 Classification of Embedded System
Multiple Classifications based on different criteria:
◆ Based on Generation
◆ First Generation - Built around 8bit microprocessor &
microcontroller, Simple in hardware circuit & firmware
developed. Ex: Digital telephone keypads

◆ Second Generation - Built around 16-bit μp & 8-bit μc, They

are more complex & powerful than 1G μp & μc, Ex: SCADA
systems Supervisory Control & Data Acquisition System

◆ Third Generation - Built around 32-bit μp & 16-bit μc ,

Concepts like Digital Signal Processors(DSPs), Application
Specific Integrated Circuits(ASICs) evolved. Ex: Robotics,
Media.

◆ Fourth Generation- Built around 64-bit μp & 32-bit μc , The

concept of System on Chips (SoC), Multicore Processors
evolved, Highly complex & very powerful. Ex: Smart Phones
 Nanda

Classification of Embedded System

Multiple Classifications based on different criteria:

◆ Based on complexity and Performance

◆ Small Scale Embedded systems - Simple in application need ,
Performance not time-critical, Built around low performance &
low cost 8 or 16 bit μc, Ex: Electronic toy

◆ Medium Scale Embedded systems - uses a single 16bit or 32-bit

μc or multiple microcontrollers linked together. These systems
have a lot of hardware as well as software complexities, hence
are not preferred by many Ex: Industrial machines.ma

◆ Large Scale Embedded systems - Built around 32 or 64 bit RISC

μp/μc or PLDs or Multicore Processors , functions on multiple
algorithms that results in complexities in both hardware and
software. They often need a processor that is configurable and
logic array that can be programmed. Response is time-critical.
Ex: Mission critical applications
 Bhoomishree

Classification of Embedded System

Multiple Classifications based on different criteria:

◆ Based on Deterministic Behaviour

◆ Deterministic/Non Deterministic
◆ Real time ES: Hard/ Soft
Real time embedded system: It is an embedded system whose output depends on
present input with dedicated OS called RTOS(Real Time Operating System).
Examples: Digital camera, Thumb Impression Reader & ATM
Non Real time embedded system: It works on stored inputs or current inputs. It
has fixed operating system. Ex:MP3
Deterministic embedded system: It is a version of embedded system where the
output should be 100% accurate, No difference or changes in output is acceptable.
Non deterministic embedded system: Here a small change in the output is
acceptable and output need not to be completely accurate.
Hard RTES: Here the response time of embedded system is highly critical, there
should not be any delay in the response of the system. Even a small delay will cause
a disastrous situation. Ex: Brake system
Soft RTES: Here the response from the embedded system can be delayed and it will
not cause any problem. Ex: TV
 Amrutha

Core of the Embedded Systems

◆ Embedded Systems are built around a central Core

◆ General Purpose and Domain Specific Processors

◆ Microprocessors
◆ Microcontrollers
◆ Digital Signal processors

◆ Application Specific Integrated Circuits (ASIC's)

◆ Programmable Logic Devices (PLD's)

◆ Commercial Off the Shelf Components (COTS)

 Microprocessor Vs Microcontroller
Microprocessor Microcontroller
◆ A silicon chip representing ◆ A highly integrated chip that
CPU, performing ALU contains Scratch pad RAM,
operations according to pre special and general purpose
defined set of instructions. register arrays, on chip ROM/
FLASH memory for program
storage, timer and interrupt
controller units and
◆ It is a dependent unit. dedicated I/O ports.
◆ General purpose design and ◆ It is independent unit.
operation. ◆ Application oriented or
◆ Doesn't contain a built in I/O domain specific.
port. ◆ Contains multiple built in I/O
◆ Targeted for high end market ports.
where performance is ◆ Targeted for Embedded
important. market.
 Akshay

Digital Signal Processor

◆ Powerful special purpose 8/16/32 bit microprocessor designed
specifically to meet the computational demands and power
constraints of different application's.
◆ 2 to 3 times faster than GPP in signal processing application's.
◆ It implements algorithms in hardware which speeds up the
execution.
◆ A typical DSP incorporates the following units:
◆ Program Memory: storing program required by DSP.
◆ Data Memory: Storing temporary variables and data /
signal to be processed.
◆ Computational Engine: Performs the signal processing
accordance with the stored program memory.
◆ I/O unit: Acts as an interface between the outside world
and DSP( capturing signals and delivering processed
signals).
◆ Ex: Audio video signal processing, telecommunication and
 Charan
General Purpose Processor Vs
Application Specific Instruction Set
Processor
GPP ASIP
◆ Designed for general ◆ The processors contains
Computational Tasks. architecture and instruction set
Ex: laptop, Desktop optimised to specific domain/
application requirements.
◆ It contains ALU and Control
Unit. Ex: SoC, DSP's used in automotive,
Telecom, media applications etc.,
◆ High volume of production /
low cost per unit. ◆ It incorporates a processor and
on chip peripherals demanded by
the application requirement,
program and data memory.
◆ It fills the architectural spectrum
between GPP and ASIC's.
 Ammaar

Application Specific
Integrated Circuits (ASIC's)
◆ It is a microchip deigned to perform a specific or unique
application.
◆ Used as a replacement for conventional general purpose logic
chips.
◆ It integrates several functions into a single chip and consumes
very small area in the total system.
◆ It can be pre-fabricated for a special application or it can be
custom fabricated by using the components from a re-usable
building block library of components .
◆ Non Recurring Engineering Charge (NRE) : It is a non refundable
initial investment for the fabrication of ASIC's and it is a one time
investment.
◆ Application Specific Standard Product (ASSP): If the Non Recurring
Engineering Charges is borne by a third party and the Application
Specific Integrated Circuit (ASIC) is made openly available in the
market, the ASIC is reffered as ASSP.
 Aryan

Programmable Logic Devices (PLD's)

◆ PLD's can be re- configured to perform any number of functions at
any time.
Features of PLD's
◆ It has a wide range of logic capacity, features, speed and voltage
characteristics
◆ The designers uses inexpensive software tools to quickly develop,
simulate and test their designs.
◆ There are no NRE cost and the final design is completed fastly.
◆ PLD's are based on re-writable memory technology.
Two major types of PLD's are
◆ CPLD's : offer smaller amount of logic up to about 10,000
gates, offer very predictable timing characteristics
suitable for critical control applications. Ex: Xilinx
Coolrunner.
◆ FPGA's: offer highest amount of logic density, the most
features and the highest performance. Ex: Xilinx
 Dhruvv

Commercial Off -the -Shelf

Components (COTS)
◆ COTS provides easy integartion and interoperability with existing
system components.
◆ It can be developed around GPP, Domain specific Processor , ASIC
or PLDs
Advantage:
◆ Readily available in market, cheap and a developer can cut down
his/her development time to a great extent.
Disadvantage:
◆ Due to rapid change in technology, if the COTS component is
withdrawn by the manufacturer/ or discontinue the production ,
will adversely affect a commercial manufacturer of ES which
make use of the specific COTS product.
 Erin

Memory
◆ Memory is required for holding data temporarily during
certain operations.
◆ On chip memory: built in memory within an IC.
◆ Off chip memory: external memory connected with the
controller/ processor for storing controller algorithm.
◆ Program Memory also called as code storage memory of an ES
stores the program / instructions. It retains its contents even
after the power to it is turned off.( non-volatile storage
memory)
◆ Code memory is classified as follows
 Harsh

Classification of ROM
◆ Depends on fabrication, erasing and programming technique, ROM is
divided as follows:
A) Masked ROM (MROM)
• One time Programmable device.
• Uses hardwired technology to store the data.
• This is low cost for high volume of production.
• It is a good candidate for storing the embedded firmware for
low cost embedded device.
• Limitation is that its inability to modify the device firmware
against firmware upgrades.
 Karthik Dileep

Classification of ROM

B) Programmable Read Only memory (PROM/OTP)

• The end user is responsible for programming this memory.
• It is possible to program the ROM only once after it is created.
• This memory consists of polysilicon or nichrome wires
functionally viewed as fuses.
• Fuses which are not burned represents logic “1” whereas fuses
which are burned represents logic “0”
• Ex: OTP used in commercial production of ES.
 Hasnain

Classification of ROM

C) Erasable Programmable Read Only Memory ( EPROM)

• EPROM gives flexibility to re-program the same chip multiple
times.
• It stores the bit information by charging the floating gate of an
FET.
• The Erasable Programmable Read Only Memory is a memory
chip that does not lose data even when the power is switched
off. This is a non-volatile memory type i.e. it retains data even
when the power is switched off.
• It contains a quartz crystal window from which the memory
chip is visible, which is exposed to UV rays for 20 to 30 minutes,
the entire memory will be erased.
• Limitation is Erasing the memory using UV rays is tedious and
time consuming process.
 Himanshu

Classification of ROM

D) Electrically Erasable Programmable Read Only Memory ( EEPROM)

• The information contained in this memory can be erased and re-
programmed in-circuit using electrical signals at register/Byte
level.
• It is also called byte erasable.
• EEPROM is usually used to store small amounts of data in
computing and other electronic devices.
• Limitation is its capacity (only a few kilobytes).
 Samhithaa

Classification of ROM

E) FLASH
• Latest ROM technology which combines the re-
programmability of EEPROM and high capacity of standard
ROMs.
• It is organized as sectors /pages.
• It stores the information in array of floating gate of an MOSFET.

• Each sector is erased before re-programming and it is done at

sector level /page level without affecting sector/page.
Ex: W27C512 from WINDBOND (64 KB FLASH memory)
 Kishore

Classification of ROM

F) NVRAM ( Non volatile RAM )

• It is a RAM with battery backup.

• It is a non-volatile storage memory
• The lifespan of NVRAM is around 10 years
Ex: DS1644 from Maxim/Dallas (32 KB NVRAM)
 Karthik Sagar

Read- Write Memory/ Random Access

Memory (RAM)
◆ RAM is the data or working memory of controller/ processor where
we can read from it and write to it.
◆ It is volatile in nature (requires power to maintain the stored
information).
◆ It is a direct access memory.
◆ Categories:
• Static RAM (SRAM)
• Dynamic RAM (DRAM)
• Non-volatile RAM (NVRAM)
 Ipshitha

Read- Write Memory/ Random Access

Memory (RAM) - Classification
◆ A) Static RAM (SRAM)
• It is the fastest form of RAM available.
• It is made up of flip-flops and stores data in the form of voltage.
• It is realised using six transistors (MOSFET) out of which four
is for building the latch part of memory cell and two for
controlling the access.
• SRAM circuit is complex and costlier compare to DRAM.
• The major limitation of SRAM are low capacity and high cost.
 Karthik B K

Read- Write Memory/ Random Access

Memory (RAM) - Classification
B) Dynamic RAM
◆ It stores the data in the form of electric charge using capacitor.
Advantage: High density and low cost.
Disadvantage: Since it is stored as charge , data will get leaked off with

time, so refreshing is needed.

◆ Special circuits called DRAM controllers are used for refreshing the
operation.
 Divyashree

Difference between SRAM and DRAM

SRAM DRAM
◆ Made up of 6 CMOS Transistors ◆ Made up of a MOSFET and a
(MOSFET) capacitor
◆ Doesn't require refreshing ◆ Require refreshing
◆ Low capacity ◆ High Capacity
◆ Fast in operation. Typical access ◆ Less expensive
time is 10ns ◆ Slow in operation. Typical
access time is 60ns
◆ Write Operation is faster than
read operation
 Jiya

Read- Write Memory/ Random Access

Memory (RAM)- Classification contd...
C) NVRAM ( Non volatile RAM)
• It is a RAM with battery backup.
• It contains static RAM based memory
• The lifespan of NVRAM is around 10 years
• Ex: DS1744 from Maxim/Dallas (32 KB NVRAM)

D) Memory according to the Type of Interface

◆ Parallel Interface: Parallel data lines for an 8 bit processor/controller
will be connected to the memory (memory size is in terms of
kilobytes).
◆ Serial Interface: I2C :2 line serial interface (used for data storage
memory like EEPROM, memory size is in terms of kilobits) .
◆ Ex: Atmel Corporations AT24C512 (512 K bits/ 2 wire interface).
◆ Serial Peripheral Interface (SPI) : 2+n line interface where n stands
for the total number of SPI bus devices in the system.
 Hruthik
I/O Subsystem
The I/O subsystem of the embedded system facilitates the interaction of the
embedded system with the external world.
◆ Light Emitting Diode (LED)
◆ 7 Segment LED display
◆ Optocoupler - transfers electrical signals between two isolated circuits
by using light.
◆ Stepper Motor- DC motors that move in discrete steps. electromagnetic
device that converts digital pulses into mechanical shaft rotation.
◆ Relay - switches that open and close circuits electromechanically or
electronically. either make or break a circuit.
 Indra
I/O Subsystem

◆ Piezo Buzzer - electronic device that's used to produce a tone, alarm or

sound
◆ Push Button Switch - two-position devices actuated with a button that is
pressed and released.
◆ Keyboard - mechanisms under the keycaps on a mechanical keyboard
that enable you to type faster and more precisely
◆ Programmable Peripheral Interface (PPI) - general purpose
programmable I/O device designed to interface the CPU with its outside
world such as ADC, DAC, keyboard etc
 Eshwari

Communication Interface

◆ Device/
Board level communication Interface ( Onboard
Communication Interface)
• The communication channel which interconnects the
various components within an embedded product
Ex: Serial Interface like I2C, SPI , UART(Universal
Asynchronous Receiver/Transmitter), 1-Wire & parallel
bus interface
◆ Product level Communication Interface (External
Communication Interface)
• Responsible for data transfer between the embedded
system and other devices or modules.
• It can be wired media , wireless media , serial or
parallel interface
Ex: IR(Infrared) , Bluetooth, Wi- Fi (Wireless Fidelity) ,
RS232c (Recommended Standard 232), USB(Universal
 Jaikumar

Onboard communication Interfaces

◆ Inter Integrated Circuit (I2C)
• It is a synchronous bi-directional half duplex (devices
can only transmit data in two directions but not at same
time) two wire serial interface bus.
• It provides an easy way of connection between a
microprocessor/ microcontroller system and the
peripheral chips in television sets.
• It comprise of two bus lines:
» Serial Clock- SCL: Responsible for generating
synchronisation clock pulses
» Serial Data – SDA : Responsible for transmitting
the serial data across devices.
• It supports multi masters on the same bus
• It supports three different data rates
» Standard Mode: ( Data rate upto 100Kbps)
» Fast Mode: ( Data rate upto 400Kbps)
 Hrithika
Onboard communication Interfaces
contd...

◆ It is a shared bus system. The devices connected to it can act as

Master or Slave.
◆ Master: Responsible for controlling the communication by
initiating/terminating data transfer, sending data and generating
synchronisation clock pulses.
◆ Slave : waits for the commands from the master and respond
upon the receiving commands.
◆ Master and slave device can act as either transmitter or receiver.
◆ The synchronisation clock signal is generated by the Master
device , regardless the master is acting as transmitter or receiver.
 Harshith M

ARM Processor
• ARM stands for Advanced RISC Machines.
Where RISC: Reduced-instruction-set Computing
• Founded 1990, owned by Acorn, Apple and VLSI.
• ARM is one of the most licensed and thus widespread processor cores in
the world.
• Used especially in portable devices due to low power consumption and
reasonable performance.
• Used in PDA, cell phones, multimedia players,
handheld game console, digital TV and cameras
 Malleshappa

ARM Processor
• ARM has several processors that are grouped into number
of families based on the processor core they are implemented with.
• The architecture of ARM processors has continued to evolve with
every family.
• Some of the famous ARM Processor families are ARM7, ARM9, ARM10
and ARM11
 Likitha

ARM Philosophy
 Ashika

RISC Characteristics
 Harshitha

RISC Characteristics
 Venkata

Features of ARM7
• 32 bit Processor
• 32 bit ALU
• 32 bit data bus
• 32 bit instructions
• 32 Address bus
• Von Neumann Architecture
• Three stage Pipelining
 Krishna

ARM PROCESSOR FUNDAMENTALS

 Lasya
Data flow model
◆ Data enters the processor core through data bus
◆ Instruction decoder translates instructions before they are
executed.
◆ Data items are placed in register file-storage bank made of 32-
bit registers
◆ Sign extend converts signed 8-bit and 16-bit numbers to 32 bit
values
◆ Two source registers- Rn and Rm Single destination register
Rd
◆ Source operands are read from register file using internal buses
A and B
◆ ALU takes the register values Rn and Rm and computes the
result
◆ Barrel shifter computes the result for any number of shifts
within a clock cycle .
◆ This is achieved as it is combinational logic (not sequential)
 Moulya
Data flow model

As ARM is van neuman architecture, so same bus is used to load

instruction and data. Hence, input data bus enters the processor core is
connected to
i. Instruction decode Block
ii. Direct Register bank
iii. Sign extend hardware block (which again connected to register
file)

i. Instruction decoder translates instructions before they are

executed.

ii. Data items are placed in register file-storage bank made of 32- bit
registers. Since the ARM core is a 32-bit processor, most instructions
treat the registers as holding signed or unsigned 32-bit values.

iii. Sign extend hardware converts signed 8-bit and 16-bit numbers
to 32 bit values as they are read from memory and placed in a register
 Medha
Data flow model

.iii. Sign extend hardware converts signed 8-bit and 16-bit

numbers to 32 bit values as they are read from memory and
placed in a register.

Two source registers-Rn and Rm Single destination register Rd.

Source operands are read from register file using internal

buses A and B and these buses are connected to basic
processing units.
 Madhav
Data flow model

Basic processing unit are :

i. ALU (Arithmetic Logic Unit)
ii. Barrel Shifter
iii. MAC (Multiply and Accumulate Unit)

ALU (Arithmatic and Logical Unit)

❖ ALU takes values Rn and Rm and computes results

❖ ALU performs add, sub etc. (Mathematical operations)

OR/AND etc (logical operations ) on the data present in
data registers
example: ADD R3,R2,R1; // R3 = R2+R1

❖ Load and store instructions use the ALU to generate an

address to be held in the address register and broadcast on
the Address bus.
 Manish
Data flow model

Barrel Shifter:
A barrel shifter is a digital circuit that can shift a data
word by a specified number of bits in one clock cycle.

❖ Operand 2 (B) can be directly loaded or

❖ Shifted by specified number of times.
❖ Can achieve fast multiples or division by a power of 2

Example : 0010 is 2 if we left shift the data by one bit

result is 0100 that is 4 hence multiply by 2.
If data is 1000 i.e. 8 and shift one bit to right then it is 0100
i.e..4 which is divided by 2
Instruction examples: ADD R3,R2,R1,LSL#4 // R3 =
R2+R1<<4
 Mandhara
Data flow model
Basic processing unit are :

MAC (Multiply and accumulate unit)

.
❖ Multiply-Accumulate Circuit is used to perform both multiply
and add.
❖ The result of any operation can be written back to register
bank.
❖ Supports basic summation operation on data present in
registers

Ex : Matrix addition and multiplication, summation

operations
 Manjunath
Data flow model

Address register:

❖ This contains the address from which data or

instruction needs to be fetched. (like start address)
❖ This register is connected to Incrementer unit.
 Yaseen

Current Program Status Register (CPSR)

◆ It is a 32-bit register.
◆ It contains the present status of an internal operation.
◆ ARM uses CPSR to monitor and control internal operations.
◆ CPSR is a dedicated 32-bit register and resides in the register
file.
N (31) – This bit will be set if the result of an operation is non zero.
Z (30) – This bit will be set if the result of an operation is zero.
C(29) – This bit will be set whenever the carry bit is generated in
any of the iterations of binary addition.
V (28) – If the result produced is more than 32 bit size, it is said to
be overflowed, in this case this bit is set to indicate the result is
overflowed.
Reserved (8 to 27) – These bits are reserved for future use.
I (7) – This bit is set when a low priority interrupt is enabled.
F (6) – This bit is set when a high priority interrupt is enabled.
T (5) – This bit being at logic 1 keep the processor in thumb state
(16 bit processor) and this bit being at logic 0 will keep the
processor I ARM state (32 bit processor).
Mode (0 to 4) – This fields indicates the current processor mode.
 Mohitha

PROCESSOR MODES

The ARM has seven operating modes:

● User (unprivileged mode under which most tasks run).
● FIQ (entered when a high priority (fast) interrupt is raised).
● IRQ (entered when a low priority (normal) interrupt is raised).
● Supervisor (entered on reset and when a Software Interrupt
instruction is executed).
● Abort (used to handle memory access violation.
● Undefined (used to handle undefined instructions).
● System (privileged mode using the same registers as user mode).
 Hafsa

Registers of ARM Processor

● ARM has 37 registers in total, all of which are 32-bits long.

● 1 dedicated program counter.
● 1 dedicated current program status register.
● 5 dedicated saved program status registers.
● 30 general purpose registers.
● 20 registers are hidden from a program at different times. These
registers are called banked registers.
● They are available only when the processor is in a particular
mode.
 Nagathejas

◆ Stack Pointer- stores the head of the stack in the current

processor mode.
◆ Link register- core puts the return address when it calls a
subroutine.
◆ Program counter- contains the address of the next instruction to
be fetched by the processor.
◆ In ARM state the registers R0 – R15 are orthogonal.
◆ Any instruction that you can apply to R0 can equally well apply
to other registers and all registers holds good for all addressing
modes.
 Bhoomika

State and instruction sets

● The state of the core determines which instruction set is being
executed.
● There are 3 instruction states as follows.
ARM-Arm state - A processor in one instruction set state
cannot execute instructions from another instruction set. a
processor in ARM state cannot execute Thumb instructions.
Thumb state - Thumb mode provides greater code density, at
expense of speed.
Jazelle state – (direct byte code execution) is an extension that
allows some ARM processors to execute Java byte code in
hardware as a third execution state.