Chapter1 M. USAM
Chapter1 M. USAM
INTRODUCTION
1.1. INTRODUCTION
The last decade has witnessed rapid developments in computer technology, which in
return, has found widespread applications in manufacturing systems, communication
networks, robots, etc. Such systems fall into the category of Discrete Event Dynamic
Systems (DEDS) or simply Discrete Event Systems (DES), in which properties such as
non-determinism, conflict and parallelism are exhibited. These characteristics are very
difficult to describe using traditional control theory, which deals with systems of
continuous or synchronous discrete variables modelled by differential or difference
equations. DESs have emerged as a new discipline to cope with the control problems of
modern industrial systems. Before the emergence of this discipline, the problems faced
were not so complicated that is was not difficult to solve them by heuristic methods.
This fashion still exists such that the design of the control systems for DES problems is
often made by trial and error. Based on the experience and ingenuity of the control
engineer. As DESs become more complex. The need for an effective formal design tool
and its implementation becomes more important.
For the formal study of DESs, there are mainly four techniques: automata, Petri nets,
minimax and other algebras, and queuing networks (Koussoulas, 1994). The automata
approach, which is also known Finite State Machine (FSM) approach, represents the
most serious effort to extend control theory concepts for continuous systems to the
discrete event environment. FSMs provide a logical model for DESs. The objective of
this theory has been to examine concepts such as controllability, observability,
decentralized and hierarchical control for DESs. (Ramadge and Wonham ,1989; Lin and
Chapter 1 Introduction
Wonham ,1988a;Lin and Wonham ,1988b). There are mainly two obstacles when using
this technique: the computational complexity of the resulting algorithms and the high
initial effort that one has to expend to get familiar with the necessary mathematical tolls.
Petri nets were first proposed by a German mathematician (Petri , 1962) and have
become one of the most popular models for DESs , both in fields of computing and
manufacturing (Koussoulas, 1994). Petri nets are a super-set of Finite State Machines.
They are a suitable model in various contexts, such as parallel processing computer
software, flexible manufacturing etc.
The algebraic approach to DES modelling allows for greater compactness than the other
methods since a large complicated model can be built through the combination of
simpler ones in a way guided by the structure of the original system (Koussoulas, 1994).
There have been a number of algebraic techniques proposed suitable for modelling
DESs (Cuninghame-Green, 1979; Inan and Varaiya, 1989). However, they have been
mainly used for performance evaluation of Discrete Event Systems (Cohen et al, 1985;
Cohen et al, 1989).
Finally, queuing networks have also been proposed. A queuing network is a collection
of queues with interdependent operation. (Kleinrock, 1975; Gross and Harris, 1974;
Walrand, 1988). Queuing networks have been a very successful modelling tool for
computer networks and similar communications systems. They have the drawback that
the necessary mathematical analysis and computations rapidly become heavy or
impossible as the complexity of the system increases (Koussoulas, 1994).
As stated above automata or FSM method represents the most serious effort to develop
a formal way for designing control systems for DESs. Within this context, the theory of
supervisory control od DESs was introduced by Ramadge and Wonham (Ramadge and
Wonham, 1986; Ramadge and Wonham, Sept. 1987; Ramadge and Wonham. Jan. 1987;
Wonham and Ramadge. May 1987). The supervisory control is a unifying framework
for the control of DESs. It is based on formal languages, that allow the designer the
model specifications and solve the given DES control problem with standard
algorithms. The framework involves a discrete state plant (system) and a discrete state
supervisor (controller) modelled by finite state machines (FSM). The plant and
supervisor have an identical alphabet set that is partitioned into controllable and
uncontrollable symbols. The plant automaton accepts the language generated by the
plant. The state of the supervisor is used to decide the controllable symbols that will not
be permitted to occur in the plant. The supervisor assumed to have an inhibiting action
only on the controllable symbols. Given a plant automaton, it is of interest to synthesise
a supervisor that prevents the occurrence of controllable symbols of the plant to enforce
specifications in the closed-loop system. In general, the classes of specifications that
have been considered in the supervisory control literature fall into two categories: The
forbidden state problem (Ramadge and Wonham, Sept. 1987), in which the control
specifications are expressed as forbidden conditions that must be avoided, and the
forbidden string problem (Ramadge and Wonham, Jan.1987), also called the desired
string problem, in which the control specifications are expressed as sequence of
activities that must be provided, while not allowing the undesired sequence of activities
to occur. The supervisor to be synthesised is expected to be both nonblocking, i.e., the
forbidden states are avoided and maximally permissive, i.e., all events which do not
contradict the specifications are allowed to happen.
Firstly, the states of a Petri net are represented by the possible markings and not by the
places: thus give a compact description, i.e., the structure of the net may be maintained
small even if the number of the markings grow. Secondly, instead of using ambiguous
textual descriptions or mathematical notations, which can be difficult to understand, the
plant and the specifications can be represented graphically using Petri nets. Finally,
using Petri net models, the same model can be used for the analysis of behavioural
properties and performance evaluation as well as for systematic construction of the
discrete event controllers (Zurawski and Zhou, 1994). There are three main design
approaches for the control of DES using Petri net models (Holloway et al. 1998):
Controller behaviour approach, logic controller approach and control theoretic
approach.
The logical controller approach focuses on the direct design and implementation of a
controller for the DES. The objective is to define the input-output behaviour of the
controller to achieve the desired controller behaviour for the system. Generally, the
controller receives commands from an external agent and then translates them into a
sequence of operations to be performed by the system. In this approach, it is necessary
to validate the controlled behaviour through simulation. This approach leads naturally to
the physical implementation of the control program. Examples of this approach can be
found in (Valette, 1983; Courvoiser et al, 1983; Nketsa and Courvoiser, 1990; Bruno
and Marchetto, 1986). The relationship between Petri nets and the programming
language GRAFCET for specification of controller logic was discussed in (David and
Alla, 1992; David. 1993).
The control theoretic approach is mainly based on the classical supervisory control
framework proposed by Ramadge and Wonham. Given an uncontrolled model of the
system and a specification for the desired controlled behaviour, the objective is to
synthesise a controller to achieve the specifications. In this approach, there is a clear
distinction between the system and the controller, and the information flow between the
system and controller is modelled explicitly.
Because of the advantages of Petri nets over FSMs, Petri nets have emerged as a strong
alternative formalism for the study of DES control. Petri net models are generally more
compact and more powerful than FSMs and they provide structured models which can
be exploited in developing more efficient algorithms for controller synthesis. Recent
research on the application of Petri net models to the analysis and synthesis of
controllers for discrete event systems have been reviewed in (Holloway et al, 1998).
Several issues related to the use of Petri nets in the supervisory control of discrete event
systems are discussed in (Giua, 1996). There are mainly two group of Petri-net-based
supervisors proposed: mapping supervisor, whose control policy is efficiently computed
by an on-line controller as a feedback function of the marking of the system, and
compiled supervisor, whose control policy is represented as a net structure. There are
several advantages in fully compiling the supervisor action into a net structure (Giua,
1996). Firstly, the computation of the control action is faster, since it does not require
separate on-line computation. Secondly, the same Petri net system execution algorithms
may be used for both the original system and the supervisor. Finally, a closed-loop
model of the system under control can be built with standard net composition
constructions.
In addition to the forbidden state problems and the desired string problems, a class of
specification so called generalised mutual exclusion constraints (GMEC) has also been
considered in the literature. A classic approach to discrete event modelling and the
In this case, of the forbidden state problem, an important step forward has been the
introduction of so called controlled Petri nets (CtlPN) (Krogh, 1987; Holloway and
Krogh, 1990). The basic restriction of this method is that the net is a marked graph, i.e.,
each place has exactly one input arc and one output arc. Also it was assumed that there
is no conflict in the net. This technique has involved the computation of the control law
in two steps: off-line computation. Both these computations are very simple. Therefore,
this approach is very efficient. However, because the controller is given as a feedback
law, it is not possible to design a net model of the controlled system. In order words, the
supervisor obtained is a mapping supervisor. This approach has received a lot of
attention in the literature and has also been extended to classes of nets other than
marked graphs: controlled state machines (Boel et al, 1995), forward and backward
conflict-free nets (Chen, 1994), coloured Petri nets (Boel et al, 1993; Makungu et al,
1994). In (Holloway et al, 1996),the technique has been extended to be applicable to a
very general class of controlled Petri nets which can include both marked graph
structures. These extensions also permit the control of Petri nets with markings which
are not safe or live and may even be unbounded.
Recently an interesting approach has been proposed in (Godon and Ferrier, 1997) to
solve the forbidden state problems for coloured Petri nets. In this work, the compiled
supervisor is obtained in two main steps: In the first step, the primary supervisor is
obtained through the coverability tree analysis. In the second step, the final supervisor is
obtained by applying algebraic or algorithmic methods to the primary supervisor, taking
into account the required properties such as liveness, reversibility, etc. Sreenivas
(Sreenivas, 1993; Sreenivas, 1994; Sreenivas, 1996) has addressed both the forbidden
state and the desired string problems using Petri nets. In the case of forbidden state
problem, through the analysis of reachability tree of the system, the control law is
obtained as a table that lists the controllable events to be disabled for every reachable
state of the system. Then, the supervisor is heuristically designed such that the
supervised system will only accept the desired sequences of events. The results obtained
in this case are based on formal Petri net languages concepts. In (Sreeevinas and Krogh,
1992), the desired string problem has been considered. In this work, a class of
supervisory control problems that require infinite state supervisors have been
considered and Petri nets with inhibitor arcs have been introduced to model the
supervisors. In (Guia and DiCesare, 1991), how a compiled supervisor can be designed
using Petri nets has been shown. In fact in this case, the desired string problem is
converted into a forbidden state problem and then it is solved. In this method, the
desired requires two steps. In the first step, a coarse structure of a supervisor is
synthesised by means of so called concurrent composition of different modules. In the
second step, the structure is refined by ad hoc methods to avoid reaching forbidden
markings. This work has then been extended is (Kumar and Holloway, 1996), where an
algorithm has been obtained for computing a minimally restrictive control when the
system behaviour is a deterministic Petri net language and the desired behaviour is
regular language.
The control of discrete event systems is referred to as ‘logic control’ (Ferrani and
Maffezonni, 1991), ‘sequential control’ (Zhou and Twiss, 1995; Venkatesh et al, 1994;
Greene, 1990) or ‘discrete event control’ (Venkatesh et al, 1995; Bigou et al, 1987). In
today’s automated modern factories the majority of the discrete event control systems
(DECS) are implemented by Programmable Logic Controllers (PLC). A PLC is a
replacement for the hard-wired relay and timer logic to be found in traditional control
panels. PLCs provide ease and flexibility of control based on programming and
executing simple logic instructions. They are designed through Ladder Logic Diagrams
(LLD), which are known to be very difficult to debug and modify when written in a
heuristic manner. In general, LLD involved is small enough to be very easily
understood in terms of representation and operation. However, when larger and more
complex control operations have to be performed it quickly becomes apparent that an
informal and unstructured approach to LLD design will only result in programs which
are difficult to understand, modify, troubleshoot and document (Lloyd, 1985). The
matter of fact that even with these shortfalls, LLDs dominate industrial discrete event
control (Cook and Gardner, 1991, Pollard, 1994).
must be changed to the next machine state. The techniques involve representing the
state by ‘flags’ and using the flags to control the flow of the discrete event control
system.
The second approach is called GRAFCET, which is also known as Sequential Function
Chart (SFC). GRAFCET was specifically developed for describing sequential control
systems (Fisher, 1989; Lloyd, 1985; David and Alla, 1992). GRAFCET is a European
standard, established in 1977 by the French AFCET committee. It is based on Petri nets
(Desrochers and Al-Jaar, 1995). It is closely related to a sub-set of Petri nets called
condition/event nets. A condition/event net is a Petri net where each place has
maximum of one token and the transitions are called events. Therefore, a transition can
not fire if one of its output places has a token, even if it is enabled. If it does, that output
place will have two tokens which is not allowed. This is required since the places
represent a condition that could be either true (token exists) or false (no token).
The basic elements of GRAFCET are steps, actions, transitions, and receptivities.
Macro steps can also be defined. Actions are associated with the steps to represent the
desired control to be executed. Steps are represented as squares, and the associate
actions are written next to them. Steps are similar to conditions in condition/event nets,
which are places with capacity of one. The transitions are drawn as black bars, and are
equivalent to the events (transitions) in the condition/event nets. The receptivities are
logical conditions associated with the transitions. They describe a true/false condition
that must be satisfied before the transitions can occur (fire). A black dot inside the step
represents an active step, just as a token in a Petri net marks a place and indicates the
state of the system. GRAFCET evolves by clearing the enabled transitions if the
associated receptivities are true.
Petri nets, as graphical and mathematical tools, are another powerful tool for modelling,
formal analysis and design of discrete event systems. Petri nets were named after Carl
A. Petri, who invented a net-like mathematical tool for the study of communications
with automata in 1963. Petri nets enable a discrete event system of any kind whatsoever
to be modelled (David and Alla, 1994). Petri nets can be used to model properties such
as process synchronisation, asynchronous events, concurrent operations and conflicts or
resource sharing. Petri nets describe a discrete event system graphically and this
contributes to a better understanding of the complex interactions within the system. A
Petri net consists of places and transitions, which are linked to each other by directed
arcs. Graphically places are represented by circles. Places represent passive system
components, which store ‘items’ (called tokens), and take particular states. Transitions
are represented by bars, which are the active system components. They may produce,
transport and change the tokens. When enabled, a transition ‘fires’ by removing a token
from each input place and by adding a token to each output place. Comparisons between
Petri nets and LLDs have been reported (Silva and Veilla, 1982; Venkatesh et al, 1994;
Zhou and Twiss, 1995; Vanketash et al, 1995). Petri net based PLCs have been
proposed (Valette et al, 1983; Courvoiser et al, 1983; Nketsa and Courvoiser, 1990).
Some attempts have also been made at producing a technique to convert Petri nets into
ladder logic diagrams (Greene, 1990; Satoh et al, 1992; Rattigan, 1992; Jafari and
Boucher, 1994; Burns and Bidanda, 1994; Taholakian and Hales, 1995; Q. Zhou et al,
1995). However, none of these, to-date, have produced a general technique for
conversion of Petri nets into LLDs in the sense that it can deal with flags, timers,
counters, timed Petri nets and Coloured Petri nets.
State machine method can only be applied to very simple systems. When state machines
are used to model and control DESs in a straightforward manner the exponential
increase in the number of states makes it very difficult to implement complex DESs.
Graphical representation is almost impossible and thus graphical visualisation can not
be easily realised (Zhou and DiCesare, 1993). GRAFCET is closely related to a sub-set
of Petri nets. It has two advantages over Petri nets. Firstly, GRAFCET is an applied
model that is defined with its interpretations as it relates to an actual system. Secondly,
The GRAFCET standard is string. Developers of GRAFCET models must adhere to the
rules of drawing, labelling and inscription. This facilitates the exchange of documents
and controllers among various companies and different product. Nevertheless, there are
some disadvantages in using GRAFCET. Specifically: The powerful and important
notion of conflict can not be accommodated. A transition can fire even if one of the
output steps has a token. These disadvantages reduce the modelling power and
applicability of GRAFCET to many manufacturing systems, where conflict,
concurrency and asynchronous operations are exhibited. Another drawback in using
GRAFCET is that it can only be implemented on GRAFCET PLCs (Bowman, 1989).
Also, no analysis can be done using GRAFECT. On the other hand, Petri nets, as
mathematical and graphical tools, are widely used for modelling, analysis and control of
discrete event systems. They are superior to the previously defined methods. They have
ability to tackle with conflict, concurrency, and asynchronous operations. However, it
has been reported that the use of Petri nets is still restricted to research laboratories and
academic institutions because of the lack of widely available inexpensive software tools
suitable for the development of industrial type of systems (Zurawski and Zhou ,
1994).In fact, PLCs can offer a great deal of flexibility for programming and execution
of Petri net based controller, but as mentioned before there is no general technique that
will allow the conversion of such controllers into a PLC code.
For the reasons given, complied supervisors are preferable to mapping supervisors.
However, to date the design of compiled supervisors has only been done by heuristic
methods. Therefore, it is very important to design compiled supervisors using a formal
design technique. An important issue in designing complied supervisors in the case of
the forbidden state specification is that the supervisor should have the following
properties; it must be nonblocking, i.e., the forbidden state are avoided, and maximally
permissive, i.e., the supervisor does not unnecessarily constrain the behaviour of the
system. In the case of desired string problem, the construction of supervisors is
generally based on formal languages concepts. However, the results obtained are either
difficult to apply to real systems or difficult to understand in most cases. Therefore, it is
also crucial to introduce some simple design techniques to facilities the design of
complied supervisors in the case of the desired string problem as well as making sure
that the results obtained can readily be used for real problems. Supervisory control
problems occur at all level of the manufacturing system control hierarchy, ranging from
the low-level interaction between equipment controllers and devices through the
coordination of workcells, to the factory-wide coordination of workstation controller.
Therefore, in this thesis manufacturing systems are considered as an example of DESs.
It is desirable to obtain some techniques for the design of supervisors, which can be
applied to both high-level and low-level manufacturing control problems.
The design phase is only the first step towards the control of DESs. After designing a
controller (supervisor), it is necessary to have an automatic means for the generation of
control code from the controller. However, the results obtained in the supervisory
control literature are mostly related to the theoretic studies as oppose to practical
(implementation) studies. It is very crucial to come up with a technique to convert the
controllers into ladder logic diagram (LLD) code since LLDs are the most popular
implementation language used on programmable logic controllers (PLCs). In the light
of this discussion the main objectives of this thesis may thus be stated as follows:
i) the extension of existing Petri net based control desing techniques, to allow the
formal design of compiled supervisors for both the forbidden state specifications and
the desired string specifications.
ii) the development of a conversion technique from the Petri net based supervisors
into ladder logic diagrams (LLDs) for the implementation of the corresponding
supervisors on programmable logic controllers (PLCs).
This chapter has introduced the literature relevant to the research carried out, together
with the objectives of the research.
Chapter 2, provides a brief introduction to Petri nets and modelling of discrete event
system. The chapter starts by defining simple Petri nets. Then, some important
properties of ,petri nets and analysis tools for Petri nets are considered. This is followed
by the definition of extended Petri nets such as inhibitor arc Petri nets and timed Petri
nets. After that, Petri nets modules, which can be used as building blocks when
modelling a system with Petri nets, are described. Finally, an extended Petri net
formalism, called Automation Petri net (APN), which allows sensor readings and
actuator operations to be included into the Petri net framework, are described.
In the chapter 3, four design techniques, called inhibitor arc method, enabling arc
method, intermediate place method and APN-SM method, are proposed for the design
of compiled supervisors for the control of DESs in the case of the forbidden state
problem. In these methods, the uncontrolled model of the system is obtained using. In
the first three methods, the supervisor is a controlled model of the system, which
contains the uncontrolled model, so called model supervisor, and the control policy. The
model supervisor and the control policy are determined by constructing the reachability
graph and by reducing it according to the forbidden state specifications. In the inhibitor
arc method the model supervisor is connected to the uncontrolled model through the use
of inhibitor arcs such that the control policy is met. In the enabling arc method model
supervisor is connected to the uncontrolled model through the use of enabling arcs such
that the control policy is satisfied. Similarly, in the intermediate place method set of
places called intermediate places are connected between the uncontrolled model and the
model supervisor according to the control policy. In the contrast to first three methods,
in the APN-SM method the supervisor contains only one net structure. In this case the
incomplete supervisor, called the model supervisor in the previous methods, is obtained
as defined in the previous methods. The control policy defines a set of actions to be
assigned to some of the places within the incomplete supervisor. After this process, the
supervisor becomes the (complete) supervisor. Note that the supervisors obtained are
maximally permissive, nonblocking, and correct by construction. To show how these
methods can be used to obtain a complied supervisor, a manufacturing system is
considered. The comparison between these methods is also provided.
In the chapter 4, two design techniques are proposed as alternative methods to the
previous four methods, for the design of compiled supervisors for the control of DESs
in the case of the forbidden state problem. The first method represents a top-down
synthesis technique, involving the construction of the reachability graph (RG) of the
uncontrolled model of the system and involving the use of token passing marking
(TPM) rules. Therefore, it is called U-TPM rule method. The TPM rules are obtained
through the RG analysis. The TPM rules are implemented on the uncontrolled model by
enabling arcs. This process produces the controlled model, i.e., the supervisor. In this
case, the supervisor obtained is correct by construction, maximally permissive and
nonblocking. On the other hand, the second method represents a bottom-up synthesis
technique, involving the construction of the reachability graph of the controlled model
(i.e., the supervisor) of the system and involving the use of TPM rules. Therefore, it is
called C-TPM rule method. In this case the TPM rules are obtained directly from the
forbidden state specifications and then the controlled model, i.e., the supervisor is
obtained by implementing the TPM rules on the uncontrolled model through the use of
enabling arcs. However, the correctness of the controlled model must be checked by
reachability graph analysis. The supervisor in this case may not be maximally
permissive. The manufacturing system example introduced in the previous chapter is
used to show how these two methods can be used to obtain a compiled supervisor for a
DES. The results obtained for the manufacturing system also compared for these two
methods.
In the chapter 6, a general methodology for converting Automation Petri Nets into
LLDs proposed. Ladder Logic Diagrams (LLDs) are the most popular programming
language for programming PLCs. Because of this, a general methodology, called Token
Passing Logic (TPL), is proposed to convert APNs into LLDs. The TPL method is
conceptually simple , and permits a direct conversion of Automation Petri Nets into
LLDs. Is also provides a straight forward mapping between the basic sequencing
information and the programming and the programming steps. The method
accommodates timers and counters and timed APNs.
provided. Finally, the results obtained are compared in terms of the number of places
and the transitions used in different methods as well as the number of LLD rungs
produced from the supervisors.
Finally, in the chapter 8, conclusions are provided together with a discussion of the
original contributions and further directions of research.