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Electronic Circuits and Devices

EC4050
FETs

M.Yuvaraj

FETs
• FETs are widely used.
• Simple in operation.
• Fabrication is simple.
• High density of devices can be fabricated in chips.
• Used as active and passive components in circuits.
• Unipolar device.
• Voltage control device.

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JFET (Junction Field Effect Transistor)

• JFETs are more temperature stable
than bipolar transistors
• Typically much smaller than bipolar
transistor
• Typical JFET has an input resistance
in the hundreds of megohms, This is
the big advantage that a JFET has
over a bipolar transistor.

• Electrons flowing from the source to the drain must pass through the
narrow channel between the depletion layers.
• When the gate voltage becomes more negative, the depletion layers
expand and the conducting channel becomes narrower.
• The more negative the gate voltage, the smaller the current between
the source and the drain.
• The JFET is a voltage-controlled device because an input voltage
controls an output current.
• In a JFET, the gate-to-source voltage VGS determines how much
current flows between the source and the drain. When VGS is zero,
maximum drain current flows through the JFET.
• This is why a JFET is referred to as a normally on device. On the other
hand, if VGS is negative enough, the depletion layers touch and the
drain current is cut off.

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n-Channel JFET p-Channel JFET

Normal bias Zero gate voltage

shorted gate drain current

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• When VDS increases, the depletion layers expand. When VDS = VP, the
depletion layers are almost touching.
• The narrow conducting channel therefore pinches off or prevents a further
increase in current, This is why the current has an upper limit of IDSS.
• The active region of a JFET is between VP and VDS(max). The minimum voltage
VP is called the pinchoff voltage, and the maximum voltage VDS(max) is the
breakdown voltage.
• Between pinchoff and breakdown, the JFET acts like a current source of
approximately IDSS when VGS = 0.
• IDSS stands for the current drain to source with a shorted gate.
• This is the maximum drain current a JFET can produce.
• The data sheet of any JFET lists the value of IDSS. This is one of the most
important JFET quantities.

Ohmic region
• The pinchoff voltage separates two major operating regions of the
JFET.
• The almost-horizontal region is the active region, The almost-vertical
part of the drain curve below pinchoff is called the ohmic region.
• When operated in the ohmic region, a JFET is equivalent to a resistor.

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Drain curves
• The top curve is always for VGS = 0, the
shorted-gate condition.
• The next curve down is for VGS = -1 V,
the next for VGS = -2 V, and so on, the
more negative the gate-source voltage,
the smaller the drain current.
• VGS of -4 V reduces the drain current to
almost zero. This voltage is called the
gate-source cutoff voltage and is
symbolized by VGS(off) on data sheets.
• At this cutoff voltage, the depletion
layers touch. In effect, the conducting
channel disappears. This is why the
drain current is approximately zero

The Transconductance
• The transconductance curve of a JFET
is a graph of ID versus VGS
• the curve is nonlinear because the
current increases faster when VGS
approaches zero.
• The equation for this graph is

• When the gate voltage is half the

cutoff voltage, the drain current is one
quarter of maximum

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Examples
• A JFET has Vp=6V and IDSS=100mA. What is the ohmic resistance? The
gate-source cutoff voltage?
• 2N5484 has VGS(off) = -3V and IDSS = 5mA. What is the ohmic resistance
and Vp?
• 2N5668 has VGS(off) = -4V and IDSS = 5mA. What are the gate voltage and
drain current at the half cutoff point?

Examples
• For the JFET in following figure, VGS(off) = -4 V and IDSS = 12 mA
Determine the minimum value of VDD required to put the device in the
constant-current region of operation when VGS = 0 V.

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Examples
• The datasheet for a 2N5459 JFET indicates that typically IDSS = 9 mA
and VGS(off) = -8 V (maximum). Using these values, determine the drain
current for VGS = 0 V, -1 V, and -4 V

JFET Forward Transconductance

• The forward transconductance (transfer conductance), gm, is the
change in drain current (ΔID) for a given change in gate-to-source
voltage (ΔVGS) with the drain-to-source voltage constant.
• It is expressed as a ratio and has the unit of siemens (S).

• Other common designations for this parameter are gfs and yfs
(forward transfer admittance)

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• The transfer characteristic curve for

a JFET is nonlinear, gm varies in
value depending on the location on
the curve as set by VGS.
• The value for gm is greater near the
top of the curve (near VGS = 0) than
it is near the bottom (near VGS(off))
• A datasheet normally gives the
value of gm measured at VGS = 0 V
(gm0)

Input Resistance and Capacitance

• JFET operates with its gate-source junction reverse-biased, which
makes the input resistance at the gate very high.
• JFET datasheets often specify the input resistance by giving a value for
the gate reverse current, IGSS, at a certain gate-to-source voltage.
• The input resistance can be determined using the following equation.

• The input capacitance, Ciss, is a result of the JFET operating with a

reverse-biased pn junction.

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Examples
• The following information is included on the datasheet for a JFET:
typically, IDSS = 3.0 mA, VGS(off) = -6 V maximum, and gfs(max) = 5000 mS
Using these values, determine the forward transconductance for VGS =
-4 V and find ID at this point

• A certain JFET has an IGSS of -2 nA for VGS = -20 V Determine the input
resistance.

JFET Bias:
Self-Bias
• a JFET must be operated such that the gate-
source junction is always reverse-biased. This
condition requires a negative VGS for an n-channel
JFET and a positive VGS for a p-channel JFET.
• The gate resistor, RG, does not affect the bias
because it has essentially no voltage drop across
it.
• IS produces a voltage drop across RS and makes
the source positive with respect to ground.
• Since IS=ID and VG=0, then VS = IDRS

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• The gate-to-source voltage is

Thus

The drain voltage with respect to ground is determined

as follows

Since VS=IDRS, the drain-to-source voltage is

Example
• Find VDS and VGS in Figure. For the particular JFET in this circuit, the
parameter values such as gm, VGS(off), and IDSS are such that a drain
current (ID) of approximately 5 mA is produced.

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Setting the Q-Point

• The basic approach to establishing a JFET bias point is to determine ID
for a desired value of VGS.
• Then calculate the required value of RS.

Midpoint Bias
• It is usually desirable to bias a JFET near the midpoint of its transfer
characteristic curve, where ID=IDSS/2.
• ID is approximately one-half of IDSS when VGS=VGS(off)/3.4.
• To set the drain voltage at midpoint (VD =VDD/2), select a value of RD
to produce the desired voltage drop.
• Choose RG arbitrarily large.

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Graphical Analysis of a Self-Biased JFET

• The transfer characteristic curve of a JFET can be used to determine
the Q-point (ID and VGS) of a self-biased circuit.
• First, calculate VGS when ID is zero.
• Next, calculate VGS when ID=IDSS.
• With two points, the load line can be drawn on the transfer
characteristic curve.
• The point where the load line intersects the transfer characteristic
curve is the Q-point of the circuit.

Example

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Voltage-Divider Bias
• The voltage at the source of the JFET
must be more positive than the voltage at
the gate in order to keep the gate-source
junction reverse-biased.

Example
• Determine ID and VGS for the JFET with voltage-divider bias in given
circuit that for this particular JFET the parameter values are such that
VD=7 V

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Graphical Analysis of a JFET with Voltage-

Divider Bias
• An approach similar to the one used for self-bias can be used with
voltage-divider bias to graphically determine the Q-point of a circuit
on the transfer characteristic curve.
• First, calculate VGS when ID is zero.
• Next, calculate ID when VGS is zero.
• With two points, the load line can be drawn on the transfer
characteristic curve.
• The point where the load line intersects the transfer characteristic
curve is the Q-point of the circuit.

Q-Point Stability
• The transfer characteristic of a JFET can differ considerably from one
device to another of the same type.

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• With voltage-divider bias, the dependency of ID on the range of Q-

points is reduced because the slope of the load line is less than for
self-bias for a given JFET.
• Although VGS varies quite a bit for both self-bias and voltage-divider
bias, ID is much more stable with voltage-divider bias.

Current-Source Bias
• Current-source bias is a method for
increasing the Q-point stability of a
self-biased JFET by making the drain
current essentially independent of
VGS.
• This is accomplished by using a
constant-current source in series
with the JFET source.
• In this circuit, a BJT acts as the
constant-current source because its
emitter current is essentially
constant if VEE>>VBE

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Current-Source Bias

• ID remains constant for any

transfer characteristic curve, as
indicated by the horizontal load
line.

Reference
• Electronics Principles by Albert Malvino and David J Bates
• Electronic Devices by Thomas L Floyed
• Microelectronic circuits by Adel S Sedra, Kenneth Carless Smith 2010,
Oxford University Press

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