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Ti c55x DSP

The C55x DSP is designed for high performance signal processing. It features accumulator-oriented instructions well-suited to operations like a1x1 + a2x2 + ... . The C55x supports 16-bit words, 32-bit longwords, and has four 40-bit accumulators. It has three addressing modes: absolute, direct, and indirect. Instructions like MOV and ADD perform data movement and addition between registers and memory. The C55x allows for single-instruction repeats to efficiently implement loops, and provides two types of subroutine returns.

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103 views2 pages

Ti c55x DSP

The C55x DSP is designed for high performance signal processing. It features accumulator-oriented instructions well-suited to operations like a1x1 + a2x2 + ... . The C55x supports 16-bit words, 32-bit longwords, and has four 40-bit accumulators. It has three addressing modes: absolute, direct, and indirect. Instructions like MOV and ADD perform data movement and addition between registers and memory. The C55x allows for single-instruction repeats to efficiently implement loops, and provides two types of subroutine returns.

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We take content rights seriously. If you suspect this is your content, claim it here.
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The Texas Instruments C55x DSP is a family of digital signal processors designed for relatively high

performance signal processing. The family extends on previous generations of TI DSPs; many
arithmetic operations are of the form accumulator =operand + accumulator. Because one of the
operands is the accumulator, it need not be specified in the instruction. Accumulator-oriented
instructions are also well-suited to the types of operations performed in digital signal processing,
such as a1x1 + a2x2 + ... .

Processor and Memory Organization:


The C55x supports several data types:

■ A word is 16 bits long.

■ A longword is 32 bits long

Most registers are memory-mapped—that is, the register has an address in the memory space

The C55x has four 40-bit accumulators AC0,AC1,AC2, and AC3. The low-order bits 0–15 are referred
to as AC0L,AC1L,AC2L, and AC3L; the high-order bits 16–31 are referred to as AC0H, AC1H, AC2H,
and AC3H; and the guard bits 32–39 are referred to as AC0G, AC1G, AC2G, and AC3G.

Addressing Modes
The C55x has three addressing modes:

■ Absolute addressing supplies an address in the instruction.

■ Direct addressing supplies an offset.

■ Indirect addressing uses a register as a pointer

Data Operations
The MOV instruction moves data between registers and memory:

MOV src,dst

A number of variations of MOV are possible. The instruction can be used to move from memory into
a register, from a register to memory, between registers, or from one memory location to another.
TheADD instruction adds a source and destination together and stores the result in the destination:
ADD src,dst

 The C55x allows an instruction or a block of instructions to be repeated. Repeats provide


efficient implementation of loops
 A single-instruction repeat is controlled by two registers
 The C55x provides two types of subroutine returns: fast-return and slowreturn.
 These vary on where they store the return address and loop context. In a slow return, the
return address and loop context are stored on the stack. In a fast return, these two values
are stored in registers

C Coding Guideline
Some coding guidelines for the C55x [Tex01] not only provide more efficient code but in some cases
should be paid attention to in order to ensure that the generated code is correct.
The C55x compiler uses some non-standard lengths of data types: char, short, and int are all 16 bits;
long is 32 bits; and long long is 40 bits. The C55x uses IEEE formats for float (32 bits) and double (64
bits)

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