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CooLBIST An Effective Approach of Test Power Reduction For LBIST

1) CooLBIST is a new technique that controls switching activity during scan shift operations for logic built-in self-test (LBIST) to reduce test power consumption. 2) It works by having an activity control logic that can decrease switching activities in the output of the pseudorandom pattern generator during scan shifting to control switching activity. 3) Application results show that CooLBIST can successfully reduce switching activity during scan shifting without reducing fault coverage, lowering test power consumption and costs from having to slow down testing speeds.

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44 views1 page

CooLBIST An Effective Approach of Test Power Reduction For LBIST

1) CooLBIST is a new technique that controls switching activity during scan shift operations for logic built-in self-test (LBIST) to reduce test power consumption. 2) It works by having an activity control logic that can decrease switching activities in the output of the pseudorandom pattern generator during scan shifting to control switching activity. 3) Application results show that CooLBIST can successfully reduce switching activity during scan shifting without reducing fault coverage, lowering test power consumption and costs from having to slow down testing speeds.

Uploaded by

aniruddh singh
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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17th Asian Test Symposium

CooLBIST
An Effective Approach of Test Power Reduction for LBIST
Jun Matsushima, Yoichi Maeda and Masahiro Takakura
Renesas Technology Corp. 20-1, Josuihon-cho, 5-chome, Kodaira-shi, Tokyo, Japan
Abstract test costs because of slowing down shift speed to
Low power design is becoming the mainstream solve power issue.
in VLSI. However, since most of the
technologies minimizing power consumption 2 Power Reduction Configuration of
have only focused on normal mode operation, SINGEN
test mode operation is often posing the high
power consumption because of the high As shown in Fig. 1, SINGEN has PRPG, multi
switching activity during scan shift operation. input signature register (MISR), TAP controller
On the other hand, test data volume has become based on IEEE1149 and TCC as the basic
big issue as the size of digital designs continues scheme. Then, in order to reduce a test power, it
to grow. Logic built-in self-test (LBIST) is well has the activity control logic (ACL) to decrease
known as one of the technologies to reduce test the switching activities, in the output side of
data volume. In general, LBIST uses PRPG. The dedicated PRPG (PRPG-A) controls
pseudorandom pattern generator (PRPG) with whether ACL output is updated with either the
high switching activity. Therefore LBIST makes value or the reversed value from PRPG or is kept
high power consumption during scan shift with a previous value. These schemes can
operation. As the results, it increases test time control switching activity and supply high
(costs) because test engineer has to slow down randomized patterns.
shift speed to solve power issue. Now, we
propose new technique called CooLBIST that 3 Application Result
controls switching activity during scan shift
Fig.2 shows the toggle rate of the pattern with
operation of LBIST. Application result shows
ACL technique and without ACL technique.
that new activity control technique succeeds in
Both of these patterns have similar test coverage.
reducing the switching activity during scan shift
New activity control technique is able to reduce
operation without a decline in fault coverage.
the switching activity during scan shift operation
without a decline in fault coverage.
1 Introduction
Test data volume has been becoming larger as PRPG TAP : Test Access Port
TCC : Test Clock Controller
PRPG-ACL
the size and the complexity of digital designs
PRPG : Pseudo random pattern generator
ACL ACL : Activity control logic
MISR : Multi input signature register
continue to grow. Therefore manufacturing test
comprises a growing fraction of a modern VLSI TCC
device's total cost. LBIST is the technique of Scan chains

designing additional hardware and software


features into LSI and allow them to perform self- TAP
controller
testing, i.e., testing of their own operation using MISR

their own circuits, thereby reducing dependence Fig.1 Circuit of power reduction LBIST
on external automated test equipment (ATE).
We are using LBIST tool named SINGEN1 in
with ACL toggle 25%
order to reduce the test cost of VLSI. SINGEN 40%

possesses test clock controller (TCC) controlling


T oggle[%]

with out ACL


a complex synchronous clock. Then, as a result,
it supports intra-domain and inter-domain at- 20%

speed test. However, SINGEN causes high with ACL

power consumption on test mode operation since


it uses PRPG with high switching activity for 0%
time[s]
supplying values to scan-chains. And it increases
Fig2. Toggle rate for LBIST pattern

1081-7735/08 $25.00 © 2008 IEEE 262


264
DOI 10.1109/ATS.2008.36

Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY ROURKELA. Downloaded on October 13,2021 at 14:37:53 UTC from IEEE Xplore. Restrictions apply.

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