Chapter 2

Embedded System Architecture

Introduction:
Typical embedded system mainly has two parts i.e., embedded hardware and embedded software.
Embedded hardware means microprocessors, microcontrollers, memory, bus, Input/output and
Controllers. Whereas embedded software includes embedded operating systems, different
applications and device drivers. The two architectures i.e. Harvard architecture and Von
Neumann architecture are used in embedded systems.
 Harvard Architecture: It offers separate storage and signal buses for instructions and data.
This architecture has data storage entirely contained within the CPU, and there is no access to
the instruction storage as data. Computers have separate memory areas for program instructions
and data using internal data buses, allowing simultaneous access to both instructions and data.

Fig 2.1 Harvard architecture

 Von Neumann Architecture: It was first proposed by a computer scientist John von Neumann.
In this architecture, one data path or bus exists for both instruction and data. As a result, the
CPU does one operation at a time. It either fetches an instruction from memory, or performs
read/write operation on data. So an instruction fetch and a data operation cannot occur
simultaneously, sharing a common bus.

Fig 2.2 Von Neumann Architecture

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2.1 Architecture of Embedded System
Architecture of the Embedded System includes Sensor, Analog to Digital Converter, Memory,
Processor, Digital to Analog Converter, and Actuators etc. The below figure illustrates the
overview of basic architecture of embedded systems

:
Fig 2.3 Embedded system architecture block diagram
Embedded System Development Life Cycle (ESDLC):
Developing an embedded system mainly goes through the following development steps:
1. Requirement analysis 3. Design 5. Test 7. Maintenance
2. Examine 4. Develop 6. Deploy
 Advantages of Embedded System :
 Embedded systems are fast in performance.
 These systems consumes less power
 Small in shape and size.
 These systems are so scalable and reliable.
 Works on wide variety of sectors and environments.
 Improve product quality and enhance performance.
 Performs specific tasks without error.
 Disadvantages of Embedded System :
Difficult to backup of embedded files.
Sometimes complex to develop.
Integration may be a problem.
Offer very limited resources for processing.
Troubleshooting may be difficult.
Maintenance may be a problem

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2 .2 ARM Cortex M0+ Hardware Overview
The ARM (Advanced RISC Machines) Cortex-M0+ processor is the most energy-efficient Arm
processor available for constrained embedded applications. The Cortex-M0+ processor builds on
the very successful Cortex-M0 processor, retaining full instruction set and tool compatibility, while
further reducing energy consumption and increasing performance.

The exceptionally small silicon area, low power and minimal code footprint of Cortex-M0+ enables
developers to achieve 32-bit performance at an 8-bit price point, bypassing the step to 16-bit
devices. The Cortex-M0+ processor come with a wide selection of options to provide flexible
development.

Fig 2.4 ARM Cortex M0+ Hardware architecture

AHB: Advanced High-performance Bus
Cortex: higher processer in the human brain, including memory, thinking, learning, reasoning,
problem-solving, emotions, consciousness and functions related to your senses.
The cortex family has three main categories which are namely.
 Cortex-A (Application Processor cores)
 Cortex-R (Real Time Application cores)
 Cortex-M (Microcontroller Cores)
M0+: Microprocessor (M0, M1, M2, M3, M4….)
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Features and benefits
 System:
 ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to 30 MHz with
single-cycle multiplier and fast single-cycle I/O port.
 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
 System tick timer.
 AHB multilayer matrix.
 Serial Wire Debug (SWD) with four break points and two watch points. JTAGboundary scan (BSDL)
supported.
 Macro Trace Buffer (MTB).
 Memory:
 Up to 32 KB on-chip flash programming memory with 64 Byte page write and erase. Code
Read Protection (CRP) supported.
 4 KB SRAM.
 ROM API support:
 Boot loader.
 Flash In-Application Programming (IAP) and In-System Programming (ISP).
 Digital peripherals:
 High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 29 General-
Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, programmable open-
drain mode, input inverter, and digital filter. GPIO direction control supports independent
set/clear/toggle of individual bits.
 High-current source output driver (20 mA) on four pins.
 High-current sink driver (20 mA) on two true open-drain pins.
 GPIO interrupt generation capability with boolean pattern-matching feature on eight GPIO
inputs.
 Switch matrix for flexible configuration of each I/O pin function.
 CRC engine.
 DMA with 18 channels and 8 trigger inputs
 Timers:
 SCTimer / PWM with up to 4 capture inputs and 4 match output functions for timing and
PWM applications.

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  Four channel Multi-Rate Timer (MRT) for repetitive interrupt generation at up to four programmable,
fixed rates.
 Self Wake-up Timer (WKT) clocked from either the IRC, a low-power, low-frequency
internal oscillator, or an external clock input in the always-on power domain.
 Windowed Watchdog timer (WWDT).

 Analog peripherals:
 One 12-bit ADC with up to 12 input channels with multiple internal and external trigger
inputs and with sample rates of up to 1.2 M samples. The ADC supports two independent
conversion sequences.
 Serial peripherals:
 One USART interface with pin functions assigned through the switch matrix and one
fractional baud rate generator.
 Two SPI controllers with pin functions assigned through the switch matrix.
 One I2C-bus interface. Supports Fast-mode Plus with 1 Mbit/s data rates on the open-drain
pins and listen mode.
 Clock generation:
 12 MHz internal RC oscillator trimmed to 1.5 % accuracy that can optionally be used as a
system clock.
 Crystal oscillator with an operating range of 1 MHz to 25 MHz.
 Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
 PLL allows CPU operation up to the maximum CPU rate without the need for a high-
frequency crystal. May be run from the system oscillator, the external clock input, or the
internal RC oscillator.
 Clock output function with divider that can reflect all internal clock sources.
 Power control:
 Power consumption in active mode as low as 90 uA/MHz in low-current mode using the IRC
as the clock source.
 Integrated PMU (Power Management Unit) to minimize power consumption.
 Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and Deep power-
down mode.
 Wake-up from Deep-sleep and Power-down modes on activity on USART, SPI, andI2C
peripherals.
 Timer-controlled self wake-up from Deep power-down mode.

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  Power-On Reset (POR).
 Brownout detects (BOD).

2.3 Communication Protocols in Embedded Systems

Communication Protocols are a set of rules that allow two or more communication systems to
communicate data via any physical medium. The rules, regulations, synchronization between
communication systems. Protocols can be implemented by both hardware and software or
combination of both. Analog and digital communication systems use various communication
protocols widely.

Embedded System is an electronic system or device which employs both hardware and software. A
processor or controller takes input from the physical world peripherals like sensors, actuators etc.,
processes the same through appropriate software and provides the desired output. Each
communicating entity should agree to some protocol to exchange information. Many different
protocols are available for embedded systems and are deployed depending upon the application
area.
Types of Communication Protocols in Embedded Systems
2.3.1 Parallel and Serial Communication
Parallel Communication
In parallel communication, all the bits of data are transmitted simultaneously on separate
communication lines. Transmission is fast however parallel communication is costly as because to
transmit n bit, n wires or lines are required. For this reason, they are usually use for shorter distance
transmission such as in printers and hard disks.

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2.3.2 Serial Communication

For serial communication, the data bits are transmitted serially bit by bit on single communication
lines. They are hence less costly and can be used for long distance transmission such as in telephone
communications.

2.4 Inter system and Intra system communication

2.4.1 Inter System Communication Protocols
Inter system protocols establish communication between two communicating devices i.e. between
PC and microprocessor kit, developmental boards, etc. In this case, the communication is achieved
through inter bus system.

Inter system protocol can be categorized into:

A. USB Communication protocols

B. UART Communication protocols
C. USART Communication protocol

A. USB Communication Protocols

Universal Serial Bus (USB) is a two-wired serial communication protocol. It allows 127 devices to
be connected at any given time. USB supports plug & play functionality.USB protocol sends and
receives the data serially between host and external peripheral devices through data signal lines D+
and D-. Apart from two data lines, USB has VCC and Ground signals to power up the device as
shown in Figure 4 below.

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Data is transmitted in the form of packets where two devices communicate each other. Data packets
compose of 8 bits (byte) with LSB (Least Significant Bit) transmitted first.
Advantages USB Disadvantages USB
Fast and simple. Needs powerful master device.
It is of low cost. Specific drivers are required.
Plug and Play hardware.

B. UART Communication protocols

Universal Asynchronous Receiver/Transmitter (UART) is not a communication protocol but just a
physical piece of hardware which converts parallel data into serial data. Its main purpose is to transmit
and receive data serially. UART is also two-wired i.e., the serial data is handled by Tx (Transmitter) and
Rx (Receiver) pins.
UART transmits data asynchronously, which induces that no clock signal is associated in
transmitting and receiving data. Instead of clock signal, UART embed start and stop bits with actual
data bits, which defines the start and end of data packet. When receiver end detects the start bit, it
starts to read the data bits at specific baud rate. It works under half duplex communication mode
meaning it either transmits or receives at a time

C. USART Communication protocol

Universal Synchronous Asynchronous Receiver/Transmitter (USART) is identical to that of UART

with only added functionality synchronous. That is, the transmitter will generate a clock signal,
which will be recovered at the receiver end from the data stream transmitted without knowing baud
rate ahead. USART works under full duplex communication mode meaning it can transmit and
receive data at same time.

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 Advantages of UART/ USART Disadvantages of UART/ USART
Clock signal is not required Doesn’t support multiple master slave functionality
Cost effective Baud rate of communicating UART should be within 10 bps
Uses parity bit for error detection

Requires only 2 wires communication

2.4.2 Intra system communication

The Intra system protocol establishes communication between components within the circuit board.
In embedded systems, intra system protocol increases the number of components connected to the
controller. Increase in components lead to circuit complexity and increase in power consumption.
Intra system protocol promises secure access of data from the peripherals
Intra system protocol can be categorized into:

A. I2C Protocol
B. SPI Protocol
C. CAN Protocol

A. I2C Protocol

Inter Integrated Circuit (I2C) is a serial communication protocol developed by Philips

Semiconductors. The main purpose of this protocol is to provide easiness to connect peripheral
chips with microcontroller. In embedded systems, all peripheral devices are connected as memory
mapped devices to the microcontroller.I2C necessitates two wires SDA (Serial Data Line) and SCL
(Serial Clock Line) to carry information between devices. These two active wires are said to be
bidirectional.
I2C protocol is a master to slave communication protocol. Each slave is been provided with unique
address. In order to establish communication, master device initially sends the target slave address
along with R/W (Read/Write) flag. The corresponding slave device will move into active mode
leaving other devices in off state. Once the slave device is ready, communication starts between
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master and slave devices. One bit acknowledgment is replied by the receiver if transmitter transmits
1 byte (8 bits) of data. A stop condition is issued at the end of communication between devices.

Advantages of I2C Communication Protocols are as follows:

 Provides good communication between onboard devices which are accessed infrequently
 Addressing mechanism eases master slave communication
 Cost and circuit complexity does not end up on number of devices
Disadvantages of I2C Communication Protocols
 The biggest disadvantage of I2C Communication Protocols is its limited speed.

B. SPI (Serial Peripheral Interface) Communication Protocols

SPI is one of the serial communication protocol developed by Motorola. It is a 4-wire protocol
namely MOSI (Master Out Slave In), MISO (Master In Slave Out), SS (Slave Select), and SCLK
(Serial Clock).
As I2C protocol, SPI is also a master to slave communication protocol. In SPI, the master device
first configures the clock at a particular frequency. Furthermore, the SS line is used to select the
appropriate slave by pulling the SS line low where it is normally held high.
The communication is established between the selected slave and the master device as soon as
appropriate slave device is selected. It is a full duplex communication protocol. SPI doesn’t limit data
transfer to 8 bit words.

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Advantages of SPI Communication Protocols

 Faster than asynchronous serial communication protocol.

 Support multiple slaves connectivity.
 Universally accepted protocol and low cost.

Disadvantages of SPI Communication Protocol

 Requires more wires than other communication protocols.

 Master device should control all slave communications (slave-slave communication is
impossible).
 Numerous slave devices leads to circuit complexity.

C. CAN ( Controller Area Network ) Communication Protocol

CAN (Controller Area Network) is a serial communication protocol developed by the Robert
Bosch for intra vehicular communication. It requires two wires CAN High (H+) and CAN low (H-)
for data transmission.CAN protocol is based on a message oriented communication protocol.

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Advantages of CAN Communication Protocols

 Low cost and reliable

 Shows robust performance
 Secured and fast protocol

Disadvantages of CAN Communication Protocol

 Automotive oriented
 Bit complex protocol

2.5 ATmega32 microcontroller Architecture

Today’s microcontrollers are much different from what it were in the initial stage, and the number
of manufacturers are much more in count than it was a decade or two ago. At present some of the
major manufacturers are Microchip (publication: PIC microcontrollers), Atmel (publication: AVR
microcontrollers), Hitachi, Phillips, Maxim, NXP, Intel etc. Our interest is upon ATmega32. It
belongs to Atmel’s AVR series micro controller family. Let’s see the features

The AVR (Alf Vegard RISC) microcontroller is based on the Advanced Reduced Instruction Set
Computer (RISC) architecture. ATmega32 microcontroller is a low power CMOS technology based
controller. Due to RISC architecture AVR microcontroller can execute 1 million of instructions per
second if cycle frequency is 1 MHz provided by crystal oscillator.

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The CPU components are shaded blue.
The memory components are shaded green.
The clock components are shaded in orange.
The I/O components are shaded in purple

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ATmega32 Highlights
 Native data size is 8 bits (1 byte).
 Uses 16-bit data addressing allowing it to address 216 = 65536 unique addresses.
 Has three separate on-chip memories
 2KB SRAM
 8 bits wide
 used to store data
 1KB EEPROM
 8 bits wide
 used for persistent data storage
 32KB Flash
 16 bits wide
 used to store program code
 I/O ports A-D
 Digital input/output
 Analog input
 Serial/Parallel
 Pulse accumulator

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