Infineon-AURIX Hardware Security Module-Training-v01 01-EN
Infineon-AURIX Hardware Security Module-Training-v01 01-EN
Flash
32-bit
CPU
32-bit
CPU
32-bit
CPU
Highlights
Cross Bar Interconnect
RAM
› 32 bit ARM Cortex M3 processor with up
Firewall
Boot to 100 MHz CPU speed.
ROM
DSPR Bridge
AES 128 › MPU (Memory Protection Unit)
System Peripheral Bus TRNG › True Random Number Generator
Peripherals Timer
HSM Domain
AES CMAC with minimum rate 25 MBytes/s › Protection against logical attacks, debugger
protection
Secure Key Storage in separate HSM P/DFlash › Secured boot and communication, Tuning
portion (8 x 8 KB DF1 only in HE) protection, Authentication, Immobilizer
› The AES module is a fast hardware device that supports encryption and
decryption via a 128-bit key AES (Advanced Encryption System)
› It enables plain/simple encryption and decryption of a single 128-bit data (i.e., plain text
or cipher text) block as well as encryption or decryption of a multitude of data blocks of
128 bits each. For these, several so called modes of operation are implemented
– ECB (electronic code book mode)
– CBC (cipher block chaining mode)
– CTR (32-bit counter mode)
– OFB (output feedback mode)
– CFB (cipher feedback mode)
› This enables also the additional modes
– GCM (Galois counter mode)
– XTS (XEX-based Tweaked Code Book mode (TCB) with Cipher Text Stealing (CTS))
› TRNG generates Random Numbers:
– Keys for cryptographic algorithm
– Support Protocols (Challenges, blinding values, padding bytes, etc.)
– Fully compliant to the AIS 20/31 standard
k k k
E E E
Output
› HSM is connected with the device via the SPB (System Peripheral bus)
› The Bridge module acts as a „firewall“ so the HSM internal resources are
protected from accesses by other masters
› P/DFlash of the HSM are shared with the device, but can be protected via
an „exclusive access“ from TriCore™ and other masters accesses
› HSM, as a system on chip, is a bus master on the SPB
HSM
SPB
Overview Advantages
› Challenge Response Authentication › Memory protection plus the option to
close the debug interfaces protects
› Closed Debugger Interface against unauthorized read and write
› IP Protection access