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DLD Lecture 11

This document summarizes a lecture on digital logic design and combinational logic. It discusses don't care conditions in incompletely specified functions and how Karnaugh maps can be used to simplify logic with don't care conditions. Examples are provided on designing a BCD to excess-3 code converter and simplifying logic functions using Karnaugh maps. Exercises at the end provide practice problems on simplifying functions and designing logic for a four-input function with specified behavior.

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21 views15 pages

DLD Lecture 11

This document summarizes a lecture on digital logic design and combinational logic. It discusses don't care conditions in incompletely specified functions and how Karnaugh maps can be used to simplify logic with don't care conditions. Examples are provided on designing a BCD to excess-3 code converter and simplifying logic functions using Karnaugh maps. Exercises at the end provide practice problems on simplifying functions and designing logic for a four-input function with specified behavior.

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speado record
Copyright
© © All Rights Reserved
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Digital Logic Design

Dr. Irfan Yousuf


Department of Computer Science (New Campus)
UET, Lahore
(Lecture # 11; April 01, 2020)
Outline
• Karnaugh Map (K-Map)
• Don’t care conditions
• Chapter 2, sections 2.5, 2.6, 2.7
• Combinational Logic Design
• Chapter 3, section 3.1
Don’t Care Conditions
▪ Functions that have unspecified outputs for some
input combinations are called incompletely specified
functions.
▪ In most applications, we simply do not care what
value is assumed by the function for the unspecified
minterms.
▪ For this reason, it is customary to call the
unspecified minterms of a function don’t care
conditions.
Simplification with Don’t Care Conditions
Simplification with Don’t Care Conditions
Designing a Digital System
▪ Specify the desired behavior,
▪ Formulate the relationship between the inputs and
outputs of the system, usually in terms of Boolean
equations or a truth table.
▪ Optimize the representation of the logical behavior
to minimize the number of logic gates required.
▪ Map the optimized logic to the available
implementation technology.
▪ Verify the correctness of the final design in meeting
the specifications.
BCD to Excess-3 Code Converter (Example)
▪ The excess-3 code for a decimal digit is the binary
combination corresponding to the decimal digit plus
3.
▪ For example, the excess-3 code for decimal digit 5 is
the binary combination for 5 + 3 = 8, which is 1000
BCD to Excess-3 Code Converter (Example)
▪ Design a BCD to Excess-3 code converter
Exercise 1
▪ Simplify the given function using K-map and
draw the logic diagram.

F(A, B, C, D) = ∑m(3, 6, 9, 12, 15)


d(A, B, C, D) = ∑m(4, 5, 7, 8, 13, 14)
Exercise 1
▪ Simplify the given function using K-map and
draw the logic diagram.

F(A, B, C, D) = ∑m(3, 6, 9, 12, 15)


d(A, B, C, D) = ∑m(4, 5, 7, 8, 13, 14)

F = B + AC’ + A’CD
Exercise 2
▪ Simplify the given function using K-map and
draw the logic diagram.

F(A, B, C, D) = ∑m(5, 6, 9, 11, 13, 14)


d(A, B, C, D) = ∑m(0, 2, 10)
Exercise 2
▪ Simplify the given function using K-map and
draw the logic diagram.

F(A, B, C, D) = ∑m(5, 6, 9, 11, 13, 14)


d(A, B, C, D) = ∑m(0, 2, 10)

F = CD' + BC'D + AB'D


Exercise 3
▪ Consider a four-input function F such that
• F has 1 on its output if there are more 1s than 0s on
its input
• F has don’t care state when the number of 1s and
0s are equal at the input.
▪ Design a digital logic system that implements F.
Explain all the steps.
Exercise 3

F = AC + BD
Summary
• Combinational Logic Design

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