Tutorial 2023 - Ans
Tutorial 2023 - Ans
2. Design a CMOS inverter by determining the Wn and Wp of the nMOS and pMOS
transistors to meet the following speci cations
a) Vth = 2V for VDD = 5V
b) Delay time of 2ns for a Vout transition from 5V to 0V with Cload = 1pF
3. Consider the following NMOS inverter. Assume that the bulk terminals of all
NMOS devices are connected to GND. Assume that the input IN has a 0V to 2.5V
swing. φF = -0.3V, VT0 = 0.43V
Answer
a. VGD3 = 0, VGS3 = VDD - Vx, VSB3 = Vx
fi
If VDD - Vx < VT, M3 will be in cutoff otherwise in saturation.
5. Find the values of VOH, VOL and the input voltage range for Vout = VOH and Vout =
VOL. Assume VDD = 1.2V, and VTN = |VTP| = 0.2V.
Ans: