80C86

Instruction Set Summary

INSTRUCTION CODE
MNEMONIC AND DESCRIPTION 76543210 76543210 76543210 76543210
DATA TRANSFER

MOV = Move:

Register/Memory to/from Register 100010dw mod reg r/m

Immediate to Register/Memory 1100011w mod 0 0 0 r/m data data if w 1

Immediate to Register 1 0 1 1 w reg data data if w 1

Memory to Accumulator 1010000w addr-low addr-high

Accumulator to Memory 1010001w addr-low addr-high

Register/Memory to Segment Register †† 10001110 mod 0 reg r/m

Segment Register to Register/Memory 10001100 mod 0 reg r/m

PUSH = Push:

Register/Memory 11111111 mod 1 1 0 r/m

Register 0 1 0 1 0 reg

Segment Register 0 0 0 reg 1 1 0

POP = Pop:

Register/Memory 10001111 mod 0 0 0 r/m

Register 0 1 0 1 1 reg

Segment Register 0 0 0 reg 1 1 1

XCHG = Exchange:

Register/Memory with Register 1000011w mod reg r/m

Register with Accumulator 1 0 0 1 0 reg

IN = Input from:

Fixed Port 1110010w port

Variable Port 1110110w

OUT = Output to:

Fixed Port 1110011w port

Variable Port 1110111w

XLAT = Translate Byte to AL 11010111

LEA = Load EA to Register2 10001101 mod reg r/m

LDS = Load Pointer to DS 11000101 mod reg r/m

LES = Load Pointer to ES 11000100 mod reg r/m

LAHF = Load AH with Flags 10011111

SAHF = Store AH into Flags 10011110

PUSHF = Push Flags 10011100

POPF = Pop Flags 10011101

ARITHMETIC

ADD = Add:

Register/Memory with Register to Either 000000dw mod reg r/m

Immediate to Register/Memory 100000sw mod 0 0 0 r/m data data if s:w = 01

Immediate to Accumulator 0000010w data data if w = 1

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Instruction Set Summary (Continued)

INSTRUCTION CODE
MNEMONIC AND DESCRIPTION 76543210 76543210 76543210 76543210
ADC = Add with Carry:

Register/Memory with Register to Either 000100dw mod reg r/m

Immediate to Register/Memory 100000sw mod 0 1 0 r/m data data if s:w = 01

Immediate to Accumulator 0001010w data data if w = 1

INC = Increment:
Register/Memory 1111111w mod 0 0 0 r/m

Register 0 1 0 0 0 reg

AAA = ASCll Adjust for Add 00110111

DAA = Decimal Adjust for Add 00100111

SUB = Subtract:

Register/Memory and Register to Either 001010dw mod reg r/m

Immediate from Register/Memory 100000sw mod 1 0 1 r/m data data if s:w = 01

Immediate from Accumulator 0010110w data data if w = 1

SBB = Subtract with Borrow

Register/Memory and Register to Either 000110dw mod reg r/m

Immediate from Register/Memory 100000sw mod 0 1 1 r/m data data if s:w = 01

Immediate from Accumulator 0001110w data data if w = 1

DEC = Decrement:

Register/Memory 1111111w mod 0 0 1 r/m

Register 0 1 0 0 1 reg

NEG = Change Sign 1111011w mod 0 1 1 r/m

CMP = Compare:

Register/Memory and Register 001110dw mod reg r/m

Immediate with Register/Memory 100000sw mod 1 1 1 r/m data data if s:w = 01

Immediate with Accumulator 0011110w data data if w = 1

AAS = ASCll Adjust for Subtract 00111111

DAS = Decimal Adjust for Subtract 00101111

MUL = Multiply (Unsigned) 1111011w mod 1 0 0 r/m

IMUL = Integer Multiply (Signed) 1111011w mod 1 0 1 r/m

AAM = ASCll Adjust for Multiply 11010100 00001010

DlV = Divide (Unsigned) 1111011w mod 1 1 0 r/m

IDlV = Integer Divide (Signed) 1111011w mod 1 1 1 r/m

AAD = ASClI Adjust for Divide 11010101 00001010

CBW = Convert Byte to Word 10011000

CWD = Convert Word to Double Word 10011001

LOGIC

NOT = Invert 1111011w mod 0 1 0 r/m

SHL/SAL = Shift Logical/Arithmetic Left 110100vw mod 1 0 0 r/m

SHR = Shift Logical Right 110100vw mod 1 0 1 r/m

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 80C86

Instruction Set Summary (Continued)

INSTRUCTION CODE
MNEMONIC AND DESCRIPTION 76543210 76543210 76543210 76543210
SAR = Shift Arithmetic Right 110100vw mod 1 1 1 r/m

ROL = Rotate Left 110100vw mod 0 0 0 r/m

ROR = Rotate Right 110100vw mod 0 0 1 r/m

RCL = Rotate Through Carry Flag Left 110100vw mod 0 1 0 r/m

RCR = Rotate Through Carry Right 110100vw mod 0 1 1 r/m

AND = And:

Reg./Memory and Register to Either 0010000dw mod reg r/m

Immediate to Register/Memory 1000000w mod 1 0 0 r/m data data if w = 1

Immediate to Accumulator 0010010w data data if w = 1

TEST = And Function to Flags, No Result:

Register/Memory and Register 1000010w mod reg r/m

Immediate Data and Register/Memory 1111011w mod 0 0 0 r/m data data if w = 1

Immediate Data and Accumulator 1010100w data data if w = 1

OR = Or:

Register/Memory and Register to Either 000010dw mod reg r/m

Immediate to Register/Memory 1000000w mod 1 0 1 r/m data data if w = 1

Immediate to Accumulator 0000110w data data if w = 1

XOR = Exclusive Or:

Register/Memory and Register to Either 001100dw mod reg r/m

Immediate to Register/Memory 1000000w mod 1 1 0 r/m data data if w = 1

Immediate to Accumulator 0011010w data data if w = 1

STRING MANIPULATION

REP = Repeat 1111001z

MOVS = Move Byte/Word 1010010w

CMPS = Compare Byte/Word 1010011w

SCAS = Scan Byte/Word 1010111w

LODS = Load Byte/Word to AL/AX 1010110w

STOS = Stor Byte/Word from AL/A 1010101w

CONTROL TRANSFER

CALL = Call:

Direct Within Segment 11101000 disp-low disp-high

Indirect Within Segment 11111111 mod 0 1 0 r/m

Direct Intersegment 10011010 offset-low offset-high

seg-low seg-high

Indirect Intersegment 11111111 mod 0 1 1 r/m

JMP = Unconditional Jump:

Direct Within Segment 11101001 disp-low disp-high

Direct Within Segment-Short 11101011 disp

Indirect Within Segment 11111111 mod 1 0 0 r/m

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Instruction Set Summary (Continued)

INSTRUCTION CODE
MNEMONIC AND DESCRIPTION 76543210 76543210 76543210 76543210
Direct Intersegment 11101010 offset-low offset-high

seg-low seg-high
Indirect Intersegment 11111111 mod 1 0 1 r/m

RET = Return from CALL:

Within Segment 11000011

Within Seg Adding lmmed to SP 11000010 data-low data-high

Intersegment 11001011

Intersegment Adding Immediate to SP 11001010 data-low data-high

JE/JZ = Jump on Equal/Zero 01110100 disp

JL/JNGE = Jump on Less/Not Greater or Equal 01111100 disp

JLE/JNG = Jump on Less or Equal/ Not Greater 01111110 disp

JB/JNAE = Jump on Below/Not Above or Equal 01110010 disp

JBE/JNA = Jump on Below or Equal/Not Above 01110110 disp

JP/JPE = Jump on Parity/Parity Even 01111010 disp

JO = Jump on Overflow 01110000 disp

JS = Jump on Sign 01111000 disp

JNE/JNZ = Jump on Not Equal/Not Zero 01110101 disp

JNL/JGE = Jump on Not Less/Greater or Equal 01111101 disp

JNLE/JG = Jump on Not Less or Equal/Greater 01111111 disp

JNB/JAE = Jump on Not Below/Above or Equal 01110011 disp

JNBE/JA = Jump on Not Below or Equal/Above 01110111 disp

JNP/JPO = Jump on Not Par/Par Odd 01111011 disp

JNO = Jump on Not Overflow 01110001 disp

JNS = Jump on Not Sign 01111001 disp

LOOP = Loop CX Times 11100010 disp

LOOPZ/LOOPE = Loop While Zero/Equal 11100001 disp

LOOPNZ/LOOPNE = Loop While Not Zero/Equal 11100000 disp

JCXZ = Jump on CX Zero 11100011 disp

INT = Interrupt

Type Specified 11001101 type

Type 3 11001100

INTO = Interrupt on Overflow 11001110

IRET = Interrupt Return 11001111

PROCESSOR CONTROL
CLC = Clear Carry 11111000

CMC = Complement Carry 11110101

STC = Set Carry 11111001

CLD = Clear Direction 11111100

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Instruction Set Summary (Continued)

INSTRUCTION CODE
MNEMONIC AND DESCRIPTION 76543210 76543210 76543210 76543210
STD = Set Direction 11111101

CLl = Clear Interrupt 11111010

ST = Set Interrupt 11111011

HLT = Halt 11110100

WAIT = Wait 10011011

ESC = Escape (to External Device) 11011xxx mod x x x r/m

LOCK = Bus Lock Prefix 11110000

NOTES: if s:w = 01 then 16-bits of immediate data form the operand.

AL = 8-bit accumulator if s:w. = 11 then an immediate data byte is sign extended
AX = 16-bit accumulator to form the 16-bit operand.
CX = Count register if v = 0 then “count” = 1; if v = 1 then “count” in (CL)
DS= Data segment x = don't care
ES = Extra segment z is used for string primitives for comparison with ZF FLAG.
Above/below refers to unsigned value.
Greater = more positive; SEGMENT OVERRIDE PREFIX
Less = less positive (more negative) signed values
if d = 1 then “to” reg; if d = 0 then “from” reg 001 reg 11 0
if w = 1 then word instruction; if w = 0 then byte
REG is assigned according to the following table:
instruction
if mod = 11 then r/m is treated as a REG field 16-BIT (w = 1) 8-BIT (w = 0) SEGMENT
if mod = 00 then DISP = O†, disp-low and disp-high
are absent 000 AX 000 AL 00 ES
if mod = 01 then DISP = disp-low sign-extended 001 CX 001 CL 01 CS
16-bits, disp-high is absent
if mod = 10 then DISP = disp-high:disp-low 010 DX 010 DL 10 SS
if r/m = 000 then EA = (BX) + (SI) + DISP
011 BX 011 BL 11 DS
if r/m = 001 then EA = (BX) + (DI) + DISP
if r/m = 010 then EA = (BP) + (SI) + DISP 100 SP 100 AH 00 ES
if r/m = 011 then EA = (BP) + (DI) + DISP
101 BP 101 CH 00 ES
if r/m = 100 then EA = (SI) + DISP
if r/m = 101 then EA = (DI) + DISP 110 SI 110 DH 00 ES
if r/m = 110 then EA = (BP) + DISP †
if r/m = 111 then EA = (BX) + DISP 111 DI 111 BH 00 ES
DISP follows 2nd byte of instruction (before data
Instructions which reference the flag register file as a 16-bit object
if required)
use the symbol FLAGS to represent the file:
† except if mod = 00 and r/m = 110 then
EA = disp-high: disp-low. FLAGS =
†† MOV CS, REG/MEMORY not allowed.
X:X:X:X:(OF):(DF):(IF):(TF):(SF):(ZF):X:(AF):X:(PF):X:(CF)

Mnemonics Intel, 1978

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