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Lecture#09

The document discusses counters in ladder logic diagrams. Counters are used to count down from a preset value when a count pulse condition changes from off to on. The counter must be programmed with inputs like count and reset signals as well as a counter number and set value. Example ladder logic and mnemonic code for a counter are also provided.

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Mohammed Al-Kuhali
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24 views2 pages

Lecture#09

The document discusses counters in ladder logic diagrams. Counters are used to count down from a preset value when a count pulse condition changes from off to on. The counter must be programmed with inputs like count and reset signals as well as a counter number and set value. Example ladder logic and mnemonic code for a counter are also provided.

Uploaded by

Mohammed Al-Kuhali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Lecture #09

COUNTERS
## Read Ch-8 of Petruzella’s Book, etc.##

1. Introduction

- is used to count-down from SV when the execution


condition on the count pulse, CP, goes from OFF to ON,
i.e. the preset value, PV, will be decremented by one
whenever CNT is executed with an ON execution
condition for CP and the execution will OFF for the last
execution.

- The counter must be programmed with a count input, a


reset input, a counter number and a set value.

2. The Symbol in Ladder (Logic) Diagram

Figure 1. Ladder Logic Diagram of Counter


3. The Mnemonic Code

Address Instruction Data/Operand


00000 LD 0.00
00001 LD 0.02
00002 CNT 0001
#10
00002 LD C0001
00003 OUT 1.00
00004 END(01)

- Address used: 0000 – 4095 (CJ1M); 000 – 255 (CPM2A).


** to avoid a conflict execution of the program by PLC,
pls avoid to use similar address for TIM and CNT (due
to they are sharing the same data area within the PLC
memory)

- The Set Value (SV) can be ranged from 0000 to 9999.

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