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RTOS

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SHAILESH R
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0% found this document useful (0 votes)
20 views6 pages

RTOS

Uploaded by

SHAILESH R
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© © All Rights Reserved
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= Embedded ane Real Fines 1 complete before P, begins, if P, Preemps p empts P,, then Ps wil If P, preempis P,, then Py Because we Know that au ; i iteration. then it will not interfere with P, in that iteration : — me time. We know t combinations of processes cannot be ready at the sai hat Wors case CPU requirements are less than would be required if all processes wouy ih ready simultaneously. 5.9. INTERPROCESS COMMUNICATION MECHANISMS The Communication between the interprocess within the system is provided by the operating system as part of the process distribution. The process in the system can communicate with one of two ways. They are blocking or non blocking. ition (i) Blocking Communi The Process goes into the waiting state until it receives a response is called blocking communication. (i) Non - blocking Communication . It allows process to continue execution after sending the communication. Both type of communication are used equally depending on the application requirement. The four major interprocess communications used in RTOS are (i) Shared memory communication (ii) Message passing (ii) Signals (iv) Mail Boxes 5.9.1, SHARED MEMORY COMMUNICATION The Communication between the interprocess is used by bus’ based system (bus topology). The two components, for example such as CPU and I/O device cat communicate through a shared memory location as shown below. The operating system or sofiware on the CPU has been designed to know the address of the shared location, The shared location has also been loaded into the proper register of the /O device. yr eS and Operating Systems ss Ea] is shown in below diagram, if CPU want to send data to the 1/0 device, it write gota 10 the shared location, then the I/O device can read the data from the VO device Fig. 5.20, Shared memory communication implemented ona bus Asthis if the communication is more effective between the CPU and I/O device {trough a shared memory block. There must be a flag that fells the CPU wants the eta from the I/O device. A flag is an additional shared data location that has valute of 0 when the data ‘tom the /O device it not ready and 1 when the data are ready. | Ifthe flag is used by CPU it can be implemented using a shared-memory write (peration. If it used by I/O device for shared memory read operation. If the some gis used for bidirectional signaling between the CPU and I/O devices the care [Mstbe takes, Tocall the flag following scenario must be followed. ( CPU reads the flag location and see that itis 0. ti) WO device reads the flag location and see that it is 0. o CPU sets the flag location to 1 and writes data to the shared location. () VO device sets the flag to 1 and over writes the data left by the CPU- : is wa the bidirectional flag a critical timing race between the two program To ay omic test and se this, the microprocessor bus must support an at 5.44 Embedded and Real Time Example : Elastic buffers as shared memory The text compressor is a good example of a shared memory. As shown below, the text compressor uses the CPU to compress incoming text, which is then sent nl a serial line by a UART. Fig. 5.21. The input data arrive at a constant rate and are easy to manage. But the output data are'consumed at a variable rate these data require an elastic buffer. The CPU and output UART share a memory area (i.e) the CPU writes compressed characters into the buffer and the UART removes them as necessary to fill the serial line. Because the number of bits in the buffer changes constantly so the compression and transmission processes need additional size information. In this case, coordination is simple i.e, the CPU writes at one end of the buffer and the UART reads at the other end. The only challenge is to make sure that the UART does not overrun the buffer. 5.9.2, MESSAGE PASSING Message passing communication is the complementary of the shared memory model. Here each communication entity has its own message send / receive unit. Also the message is not stored on the communication link rather than this message stored in the sender/receiver end point. That means in the. shared memory communication can be seen as memory block used as a communication device, in which all the data are stored in the communication link or memory. ses annd Operating Systems 5.45 Fig. 5.22. Message Passing Communication iexample: Home Control System Home Control system is a best example for message passing communication. A Mhome control system has one microcontroller per household device to control the following devices lamp, thermostat, faucet, appliance and so on. The device must communicate relatively infrequently for furthermore application and their physical separation is large enough that we could ‘not think about the shared memory location, hence we go for passing communication. Queues form of message passing. The queue uses a FIFO discipline and holds records that represent messages. The Free RTOS - Org system provides a set of queue functions. It allows queue to be created and deleted. So that the system may have as many queues as necessary. A queue is described by the data ype X Queue Handle and created using X Queue create. A queue is a common 59.3, SIGNALS Another form of inter process communicati Commonly used. ! jon is signal which are most A signal is physical quantity that carries some information, A_ signal Communication is simple because it does not pass data beyond the existence of the (Seal ite, A signal is analogous (0 ah interrupt, but it is entirely a software | |**ation, i.e. A signal is generated by a process and transmitted to another process {he operatiny ig system. NIX. A signal called UML signal & i + ,_ Generally signal communication is used in Ul parameters other than a i ‘sed as UNIX signal. While a UNIX signal carries no 5.46 Embedded and Real Tine 39 condition code, but a UML signal is an object. Hence the UML canie parameters as an object. Some class << signal >> asig << Send >> Sig behaviour () P : integer Fig. 5.23.Use of a UML signal Above diagram describes the use of UML signal that the sigbehavou behavior of the class responsible for throwing the signal, as indicated b; signal >>. The signal object is indicated by the << signal >> stereotype. Also the signal are used as asynchronous events to one or more processes} signal could be generated by a keyboard interrupt or an error condition such as{fhe process attempting to access a non — existent location in its virtual memory. Signal are also used by the shells to signal job control commands to their child process. There are set of defined signals that the Kernel can generated or that cant generated by other process in the system, provided that they have the co: privileges. You can list a system’s set of signals using the kill command on my intel Linux box this gives the following command, 1. SIGHUP 2, SIGINT 3.SIGTRRAP 4. SIGFPE 5. SIGSTOP 6. SIGTSTP 7. SIGTTIN 8. SIGQUIT 9. SIGILL 10. SIGPWR. 11, SIGPROF 12. SIGWINCH Ete The numbers are different for an Alpha AXP Linux box. Process can be choo: to ignore most of the signals that are generated, with two notable exceptions neither the SIGSTOP signals which causes a process to halt its execution nor tg SIGKILL signals which causes a process to exit can be ignored. Otherwis@] through, a process can choose just how it wants to handle the various signals} a _ | privilegs processes and Operating Systems 3.47 b i ji a in het the signals and if they o not block them. They can either choose to handle themselves or allow the Kernel to handle them. If the Kernel pandles the signals it will do the default actions required for the signal. For example, the erat action when a process receives the: SIGFPE (Floating point exception) signal is to core dump and then exit. Signals here no inherent relative priorities. nano Kernel or Pico Kernel: The term nanokernel and pico kernel is referred to ‘A kernel where the total amount of kernel code, ie Code executing in the ed mode of the hardware, is very small. The term Picokernel was further emphasize small size. The Term nano kernel was coined sometimes used to okernel Architecture. It was a by Jonathan. S. Shaptio in the paper the Keykos Nan (0 mach, which claimed to be a micro Kernel while being sardonic response t ought to ithic, was essentially unstructured and slower than the systems it s e to the term, including the picokernel missed, Both nanokernel and picokernel ‘monolit replace. Subsequent reuse of and respons coinage. Suggest that the point was largely have subsequently come to have the same meaning expressed by the term microkernel. The term nano Kernel is used to refer not to a small kernel, but one that supports nanosecond clock resolution. 5.9.4, MAILBOXES The Mailbox is a simple mechanism for asynchronous communication. Some architecture defines mailbox registers. These mailboxes have a fixed number of bits and can be used for small messages. We can also implement a mailbox using P.() and V () using main memory for the mailbox storage. it eee simple version of a mailbox on holds only one message at a time and it rae some important principles in interprocess communication. Mailbox ten 4 two items such as the message itself and a mail ready flag. The flag is true message has been put into the mailbox and cleared when the message is moved,

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