Basics of The SPI Communication Protocol
Basics of The SPI Communication Protocol
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First, we’ll begin with some basic concepts about electronic communication,
then explain in detail how SPI works. In the next article, we’ll discuss UART
driven communication, and in the third article, we’ll dive into I2C.
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SPI, I2C, and UART are quite a bit slower than protocols like USB, ethernet,
Bluetooth, and WiFi, but they’re a lot more simple and use less hardware and
system resources. SPI, I2C, and UART are ideal for communication between
microcontrollers and between microcontrollers and sensors where large
amounts of high speed data don’t need to be transferred.
The bits of data can be transmitted either in parallel or serial form. In parallel
communication, the bits of data are sent all at the same time, each through a
separate wire. The following diagram shows the parallel transmission of the
letter “C” in binary (01000011):
In serial communication, the bits are sent one by one through a single wire.
The following diagram shows the serial transmission of the letter “C” in binary
(01000011):
One unique benefit of SPI is the fact that data can be transferred without
interruption. Any number of bits can be sent or received in a continuous
stream. With I2C and UART, data is sent in packets, limited to a specific
number of bits. Start and stop conditions define the beginning and end of
each packet, so the data is interrupted during transmission.
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MOSI (Master Output/Slave Input) – Line for the master to send data to the
slave.
MISO (Master Input/Slave Output) – Line for the slave to send data to the
master.
SS/CS (Slave Select/Chip Select) – Line for the master to select which slave to
send data to.
*In practice, the number of slaves is limited by the load capacitance of the system, which
reduces the ability of the master to accurately switch between voltage levels.
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The clock signal in SPI can be modified using the properties of clock polarity
and clock phase. These two properties work together to define when the bits
are output and when they are sampled. Clock polarity can be set by the master
to allow for bits to be output and sampled on either the rising or falling edge of
the clock cycle. Clock phase can be set for output and sampling to occur on
either the first edge or second edge of the clock cycle, regardless of whether it
is rising or falling.
SLAVE SELECT
The master can choose which slave it wants to talk to by setting the slave’s
CS/SS line to a low voltage level. In the idle, non-transmitting state, the slave
select line is kept at a high voltage level. Multiple CS/SS pins may be available
on the master, which allows for multiple slaves to be wired in parallel. If only
one CS/SS pin is present, multiple slaves can be wired to the master by daisy-
chaining.
MULTIPLE SLAVES
SPI can be set up to operate with a single master and a single slave, and it can
be set up with multiple slaves controlled by a single master. There are two
ways to connect multiple slaves to the master. If the master has multiple slave
select pins, the slaves can be wired in parallel like this:
If only one slave select pin is available, the slaves can be daisy-chained like this:
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The slave can also send data back to the master through the MISO line in serial.
The data sent from the slave back to the master is usually sent with the least
significant bit first.
2. The master switches the SS/CS pin to a low voltage state, which activates the
slave:
3. The master sends the data one bit at a time to the slave along the MOSI line.
The slave reads the bits as they are received:
4. If a response is needed, the slave returns data one bit at a time to the master
along the MISO line. The master reads the bits as they are received:
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ADVANTAGES
No start and stop bits, so the data can be streamed continuously without
interruption
Separate MISO and MOSI lines, so data can be sent and received at the
same time
DISADVANTAGES
Hopefully this article has given you a better understanding of SPI. Continue on
to part two of this series to learn about UART driven communication, or to part
three where we discuss the I2C protocol.
If you have any questions, feel free to ask it in the comment section, we’re here
to help. And be sure to subscribe, we send out an email each time we publish
new tutorials!
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60 COMMENTS
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mahesh on July 6, 2017 at 5:18 pm
keep going…simple explaining
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Blenfid on July 26, 2019 at 9:45 am
Bright and clear explanations. I just would like to know how is the
election of a specific slave possible in the daisy-chained shape or
how is the desired slave be activated in preference to others ?
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There is a new version of I2C that read 800 k, but the equivalent
generation SPI is 40 meg. This let me to believe that SPI is more
than twice the speed of I2C.
The SPI is actually always full duplex, every bit sent by the master is
accompanied by a bit answered from the slave.
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The answer from the slave is always one byte late compared to the
master.
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