CS 6303 - Computer Architecture Unit 2 – Q & A

1. Explain Carry Look Ahead adders in detail

A carry-look ahead adder (CLA) is a type of adder used in digital logic. A carry-look
ahead adder improves speed by reducing the amount of time required to determine carry bits.
The carry-look ahead adder calculates one or more carry bits before the sum, which reduces
the wait time to calculate the result of the larger value bits.

Idea
 Try to “predict” Ck earlier than Tc*k
 Instead of passing through k stages, compute Ck separately using additional logic

Operation Mechanism

Carry look ahead depends on two things:

1. Calculating, for each digit position, whether that position is going to propagate a carry
if one comes in from the right.
2. Combining these calculated values to be able to deduce quickly whether, for each group
of digits, that group is going to propagate a carry that comes in from the right.

CLA – Concept
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 To reduce the computation time, there are faster ways to add two binary numbers by
using carry lookahead adders.
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 They work by creating two signals P and G known to be Carry Propagator and Carry
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Generator.
 The carry propagator is propagated to the next level whereas the carry generator is used
to generate the output carry regardless of input carry.
 The block diagram of a 4-bit Carry Lookahead Adder is shown here below

The number of gate levels for the carry propagation can be found from the circuit of full adder.
The signal from input carry Cin to output carry Cout requires an AND gate and an OR gate,
which constitutes two gate levels. So if there are four full adders in the parallel adder, the output
carry C5would have 2 X 4 = 8 gate levels from C1 to C5. For an n-bit parallel adder, there are
2n gate levels to propagate through.
CS 6303 - Computer Architecture Unit 2 – Q & A

Design Issues

The corresponding boolean expressions are given here to construct a carry lookahead
adder. In the carry-lookahead circuit we ned to generate the two signals carry propagator(P)
and carry generator(G),

 Pi = Ai ⊕ Bi
 Gi = Ai · Bi

The output sum and carry can be expressed as

 Sumi = Pi ⊕ Ci
 Ci+1 = Gi + ( Pi · Ci)

Having these we could design the circuit. We can now write the Boolean function for
the carry output of each stage and substitute for each Ci its value from the previous equations:

 C1 = G0 + P0 · C0
 C2 = G1 + P1 · C1 = G1 + P1 · G0 + P1 · P0 · C0
 C3 = G2 + P2 · C2 = G2 P2 · G1 + P2 · P1 · G0 + P2 · P1 · P0 · C0
 C4 = G3 + P3 · C3 = G3 P3 · G2 P3 · P2 · G1 + P3 · P2 · P1 · G0 + P3 · P2 · P1 · P0 · C0
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A B C-out
0 0 0 “kill”
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0 1 C-in “propagate”
1 0 C-in “propagate”
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1 1 1 “generate”

 Generate: Cout = 1 independent of C

o G =A • B
 Propagate: Cout = C
o P =A  B
 Kill: Cout = 0 independent of C
o K =~A • ~B
 Cout = G + P.Cin
CS 6303 - Computer Architecture Unit 2 – Q & A

Algebraic calculations for carry out

• ci+1 = gi + pici
c1 = g0 + p0c0

c2 = g1 + p1c1

= g1 + p1(g0 + p0c0)

= g1 + p1g0 + p1p0c0

c3 = g2 + p2c2

= g2 + p2(g1 + p1g0 + p1p0c0)

= g2 + p2g1 + p2p1g0 + p2p1p0c0

c4 = g3 + p3c3

= g3 + p3(g2 + p2g1 + p2p1g0 + p2p1p0c0)

= g3 + p3g2 + p3p2g1 + p3p2p1g0 + p3p2p1p0c0

4 Bit – Carry lookahead adder circuit diagram

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16 Bit – Carry lookahead adder

CS 6303 - Computer Architecture Unit 2 – Q & A

2. Explain IEEE 754 Format in detail

In mathematics, floating point number is otherwise called as real number
representation.

Example,

 3.14159265… ten (pi)

 1.0ten × 10−9 (seconds in a nanosecond)
 3.15576ten × 109 (seconds in a typical century)

A number in scientific notation that has a single digit to the left of the decimal point
has no leading 0s is called a normalized number.

Example, 1.010 x 10-9 is in normalized scientific notation, but 0.110 x 10-8 & 10.010 x
10-10 are not.

Binary numbers in scientific notation: 1.02 X 2-1, here decimal point is called as
binary point for clarity.

General syntax for Binary floating point number 1.xxxxxxxxx2 X 2yyyy

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Floating-Point Representation:

The representation has 2 parts that has fraction part and exponent part. The fraction part
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size is used to increase or decrease precision. The exponent part size is used to increase or
decrease the range of the number.
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The representation has 1 sign bit where bit -0 represents +ve value and bit -0 represents
negative value.

In general, floating-point numbers are of the form

(-1)S x F x 2E

 F involves the value in the fraction field

 E involves the value in the exponent field

Overflow & Underflow

 Overflow here means that the exponent is too large to be represented in the exponent
field.
 The smallest non zero fraction that can be represented in the fraction field, when it is
too small to store in faction field then we call it as underflow.
CS 6303 - Computer Architecture Unit 2 – Q & A

Double precision representation:

 The range of the single precision format 2.0 x 10 -38 to 2.0 x 10 38

 The range of the double precision format 2.0 x 10 -308 to 2.0 x 10 308
To pack even more bits into the significand, IEEE 754 makes the leading 1-bit of
normalized binary numbers implicit.

Hence, the number is actually 24 bits long in single precision (implied 1 and a 23-bit
fraction), and 53 bits long in double precision (1 + 52).

So the new representation will be (-1)S x (1+ F) x 2E

The IEEE format uses NaN, for Not a Number to represent undefined values like
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infinity, calculation of 0/0 values etc.

Representation of exponent value eg 2 +1

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Representation of exponent value eg 2 -1

The 2 power -1 is represented in 2's complement format, in fig (b) value -1 is

represented like as if a large exponent value is sitting in the exponent field, to avoid this
confusion bias value is used.

IEEE 754 uses a bias of 127 for single precision, so an exponent of -1 is represented by
the bit pattern of the value -1+ 127ten, or 126ten and +1 is represented by 1 + 127ten, or 128ten

So the value represented by a floating-point number is,

 (-1)S x (1+ F) x 2(Exponent - bias)

The range of single precision numbers is then from as

 small as /+1.00000000000000000000000two x 2 -126
 to as large as -/+1.11111111111111111111111two x 2+127
CS 6303 - Computer Architecture Unit 2 – Q & A

3. State and explain the arithmetic addition operations on floating point

numbers.
Add numbers in scientific notation: eg., 9.999ten X 10-1 + 1.610ten X 10-1. Assume that we
can store only four decimal digits of the significand and two decimal digits of the exponent.

Step 1 : Align the decimal point of the number that has the smaller exponent. here 1.610ten X
10-1 is number that has small exponent value among the given two number. So moving the
decimal place to left we achieve the same exponent value as the larger number.
1.610ten X 10-1 = 0.1610ten X 100 = 0.01610ten X 101
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only 4 digits are used so the now becomes 0.016ten X 10

Step 2 : Next comes the addition of the significands:

9.999ten
+ 0.016ten
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10.015ten
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The sum is 10.015ten X 10 .

Step 3. This sum is not in normalized scientific notation, so we need to adjust it:
10.015ten X 101 = 1.0015ten X 102
The exponent is increased or decreased, we must check for overflow or underflow—
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that is, we must make sure that the exponent still fits in its field.

Step 4. Since we assumed that the significand can be only four digits long (excluding the sign),
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we must round the number. The number 1.0015ten X 102 is rounded to four digits in the
significand to
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1.002ten X 102
CS 6303 - Computer Architecture Unit 2 – Q & A

Example based on above algorithm -- using binary numbers Binary Floating-Point

Addition
Add the number 0.5 ten and -0.4375 ten in binary, convert the given number to binary
we get,

0.5 ten = 0.1two = 0.1two x 20 = 1.000 two x 2-1

-0.4375 = -0.0111two = -0.0111two x 20 = -1.110 two x 2-2
Step 1: The number with less exponent shifted right -1.110 two x 2-2 = -0.111 two x 2-1

Step 2: Add the significand: 1.000 two + (-0.111 two ) = 0.001two x 2-1

Step 3: Normalize the sum, check for underflow and overflow

0.001two x 2-1=0.010two x 2-2=0.100two x 2-3=1.000 x 2-4
Step 4: Round the sum: 1.000 x 2-4 , The sum already the 4 bits size, so no change.
The decimal value will be 1.000 x 2-4 = 0.0001two, on conversion we get 1 x 2-4 =
1/24ten = 1/16ten
= 0.0625ten
When added normally the sum of 0.5 ten and -0.4375 ten = 0.0625ten, Thus verified.
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CS 6303 - Computer Architecture Unit 2 – Q & A

4. State and explain the arithmetic multiplication operations on floating

point numbers.
Multiplying decimal numbers in scientific notation by hand:
1.110ten X 1010 X 9.200ten X 10-5
Assume that we can store only four digits of the significand and two digits of the exponent.

Step 1 : Unlike addition, we calculate the exponent of the product by simply adding the
exponents of the operands together:

New exponent = 10 + (-5) = 5

Step 2 : Next comes the multiplication of the significands:
1.110ten
× 9.200ten
0000
0000
2220
9990
10212000ten
There are three digits to the right of the decimal point for each operand, so the decimal
point is placed six digits from the right in the product significand:
10.212000ten
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Assuming that we can keep only three digits to the right of the decimal point, the
product is 10.212 X 105.
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Step 3 : This product is un normalized, so we need to normalize it:

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10.212ten x 105 = 1.0212ten x 106

check for overflow and underflow.

Step 4 : We assumed that the significand is only four digits long (excluding the sign), so we
must round the number. The number 1.0212ten X 106 is rounded to four digits in the significand
to 1.021ten X 106.

Step 5 : The sign of the product depends on the signs of the original operands. If they are both
the same, the sign is positive; otherwise, it’s negative. Hence, the product is +1.021ten X 106
CS 6303 - Computer Architecture Unit 2 – Q & A

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example based on above algorithm -- using binary numbers Binary Floating-Point

Multiplication
Multiply the number 0.5 ten and -0.4375 ten in binary
Convert the number to binary

0.5 ten = 0.1two = 0.1two x 20 = 1.000 two x 2-1

-0.4375 = -0.0111two = -0.0111two x 20 = -1.110 two x 2-2
Step 1. Adding the exponent with out bias: -1 + (-2) = -3
Step 2. Multiply the significand:
1.000two
x 1.110 two
0000
1000
1000
1000
1110000 two There are three digits to the right of the
decimal point for each operand, so the product will be 1110000 two x 2-3 , we need to keep
only 4 - bits 1.110 two x 2-3 .
Step 3. Check whether the product is normalized, and check for underflow or overflow.
It is already normalized so, the product is 1.110 two x 2-3
CS 6303 - Computer Architecture Unit 2 – Q & A

Step 4. Round the product to 4 - bits, it already fits, so no action.

1.110 two x 2-3

Step 5. Since the sign of the operands are different so the show product as negative.
-1.110 two x 2-3
converting to decimal, -1.110 two x 2-3 = -0.001110two , After conversion we get -7
x 2-5ten
= - 7/25ten = -7/32 ten = -0.21875 ten

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