Introduction to Computer

Organization
DSCO
UNIT 4
Mrs. Ashwini Rajurkar

For reading refer to following points

from William Stallings, “Computer
Organization and Architecture”, 8e
1.1,1.2, 3.1, 3.2, 12.1, 12.2, 15.2 (pg. 570
SY Div B – 575) and 16.1
Syllabus
● Introduction to Computer Organization
● Function and structure of a computer
● Functional components and their Interconnection
● Register organization
● Case study of 8086
● Number and size of registers
● General purpose registers
● Design and Organizational issues of registers
● Control Unit organization
● Hardwired vs. microprogrammed organization.
● Introduction to Computer Organization

● Computer Organization and Architecture is used to design computer

systems.
● Computer Organization is the way in which a system has to
structure and It is operational units and the interconnections
between them that achieve the architectural specifications
● It is the realization of the abstract model, and It deals with
How to implement the system.
● control signals
● interfaces between computer and peripherals
● the memory technology being used
●
Structure and Function
Structure is the way in which components
relate to each other
• Function is the operation of individual
components as part of the structure
All computer functions are:
➔ Data processing: Computer must be able
to process data which may take a wide
variety of forms and the range of
processing.
➔ Data storage: Computer stores data
either temporarily or permanently.
➔ Data movement: Computer must be able
to move data between itself and the
outside world.
➔ Control: There must be a control of the
above three functions.
Four main structural components:
o Central processing unit (CPU)
o Main memory
oI/O
o System interconnections

CPU structural components:

o Control unit
o Arithmetic and logic unit (ALU)
o Registers
o CPU interconnections
Computer Components

● memory address register (MAR),

which specifies the address in
memory for the next read or write;
and a memory buffer register
● (MBR), which contains the data to
be written into memory or which
receives the data read from
memory.
● Similarly, an I/O address register
(I/OAR) specifies a particular I/O
device.
● An I/O buffer register (I/OBR) is
used for the exchange of data
between an I/O module and the
processor.
CPU Structure
CPU must:
—Fetch instructions
—Interpret instructions
—Fetch data
—Process data
—Write data
 Registers
Registers are a type of computer memory used to quickly accept, store, and
transfer data and instructions that are being used immediately by the CPU

● register may hold an instruction, a storage address, or any data

● The computer needs processor registers for manipulating data and a register for
holding a memory address

The registers in the processor serve two functions:

User Visible: These registers are visible to the assembly or machine language programmers and
they use them effectively to minimize the memory references in the instructions. Well, these
registers can only be referenced using the machine or assembly language.

The control and status register holds the address or data that is important to control the
processor’s operation. The most important thing is that these registers are not visible to the
users
● The general-purpose registers detain both the addresses or the data.
● the programmers can restrict some of the general-purpose registers to
specific functions.
● The general purpose register also accepts the intermediate results in the
course of program execution

How Many GP Registers?

Between 8 - 32
• Fewer = more memory references
Data Register
The term itself describes that these registers are employed to hold the data. But the programmers
can’t use these registers for calculating operand address

Address Register
Now, the address registers contain the address of an operand or it can also act as a
general-purpose register. An address register may be dedicated to a certain addressing mode.

(a) Segment Pointer Register

A memory divided in segments, requires a segment register to hold the base address of the
segment.

(b) Index Register

The index register is employed for indexed addressing and it is initial value is 0. Generally, it used
for traversing the memory locations. After each reference, the index register is incremented or
decremented by 1, depending upon the nature of the operation.
c) Stack Pointer Register
The stack register has the address that points the stack top.

4. Condition Code

Condition codes are the flag bits which are the part of the control register. The condition
codes are set by the processor as a result of an operation and they are implicitly read
through the machine instruction.

The programmers are not allowed to alter the conditional codes.

1.Program Counter

The program counter is a processor register that holds the address of the instruction that has to be executed
next. It is a processor which updates the program counter with the address of the next instruction to be
fetched for execution.

2. Instruction Register

Instruction register has the instruction that is currently fetched. It helps in analysing the opcode and
operand present in the instruction.

3. Memory Address Register (MAR)

Memory address register holds the address of a memory location.

4. Memory Buffer Register (MBR)

The memory buffer register holds the data that has to be written to a memory location or it holds the data
that is recently been read.
Program Status ○ Sign: This field has the resultant sign bit of the last
Word (PSW). arithmetic operation performed.
❖ As the word ○ Zero: This field is set when the result of the operation
suggests it is zero.
contains the ○ Carry: This field is set when an arithmetic operation
status results in a carry into or borrow out.
information.
○ Equal: If a logical operation results in, equality the
❖ A set of bits
Equal bit is set.
❖ Includes
Condition ○ Overflow: This bit indicates the arithmetic overflow.
Codes ○ Interrupt: This bit is set to enable or disable the
❖ Sign of last interrupts.
result ○ Supervisor: This bit indicates whether the processor
is executing in the supervisor mode or the user
mode.
 Supervisor Mode Registers

• Intel ring zero

• Kernel mode
• Allows privileged instructions to execute
• Used by operating system
• Not available to user programs

Supervisor mode or privileged mode is a computer system mode in which all instructions such as privileged
instructions can be performed by the processor. Some of these privileged instructions are interrupt
instructions, input output management etc
Design and Organizational issues of registers
(a) Number of register

Fewer register result in more memory reference, more register do not noticeably reduce memory
reference. Generally 8 to 32 register usage appears to be optimum.

(b) General purpose registers Vs Special purpose registers

Special purpose registers hold the status of a program. We can use data, address ,segment register as special
purpose registers

(c) Register length

The length of register should be at least long enough to hold the largest address. Data register
should hold the value of most data types.

(d) Allocation of control information The allocation of control information between the register
and memory is also one of the main design challenges.
Control Unit organization ● A Control Unit is Finite State
Machine
● Generates control
signal-timing signal
● I/P – machine instructions
and datapath conditions
● O/P – register transfer
control signals, ALU operation
codes Instruction
Interpretation – instruction
fetch, decode, execute
Functions of the Control Unit
● It coordinates the sequence of data movements into, out of, and between a
processor’s many sub-units.
● It interprets instructions.
● It controls data flow inside the processor.
● It receives external instructions or commands to which it converts to sequence of
control signals.
● It controls many execution units(i.e. ALU, data buffers and registers) contained
within a CPU.
● It also handles multiple tasks, such as fetching, decoding, execution handling and
storing results.
Types of Control Unit
There are two types of control units:
● Hardwired
● Micro programmable control unit.

Hardwired CU

● A hardwired control unit is a control unit that uses a fixed set of logic gates and circuits to
execute instructions.
● Control logic implemented with-gates,FF, decoders,etc
● Generates control signals to executes proper sequence of instructions and at correct time
● Uses RISC
● The control signals for each instruction are hardwired into the control unit, so the control
unit has a dedicated circuit for each possible instruction.
● Hardwired control units are simple and fast, but they can be inflexible and difficult to
modify.
 ● IR sends data to Opcode Bits
● Opcode bits sends code to
decoder
● Decoder decodes it and send it
control signal generator
● Eg. signal from keyboard
● Counter countings based on clk

Read,write etc…..
Problems With Hard Wired Designs
• Complex sequencing & micro-operation logic
• Difficult to design and test
• Inflexible design
• Difficult to add new instructions
Microoperation, Microinstruction, Micro program, Microcode.

Microoperations: In computer central processing units, micro-operations (also known as a micro-ops or

μops) are detailed low-level instructions used in some designs to implement complex machine
instructions (sometimes termed macro-instructions in this context)

Micro instruction: A symbolic microprogram can be translated into its binary equivalent by means of an
assembler. Each line of the assembly language microprogram defines a symbolic microinstruction

Micro program: A sequence of microinstructions constitutes a microprogram

Microcode: Microinstructions can be saved by employing subroutines that use common sections of
microcode.
Microprogrammed Control unit
● Implemented using programming approach
● a micro-programmed control unit is a control unit that uses a microcode to
execute instructions.
● The microcode is a set of instructions that can be modified or updated,
allowing for greater flexibility and ease of modification.
● The control signals for each instruction are generated by a microprogram
that is stored in memory, rather than being hardwired into the control unit.
● Microprogrammed control units are slower than hardwired control units
because they require an extra step of decoding the microcode to generate
control signals, but they are more flexible and easier to modify.
● They are commonly used in modern CPUs because they allow for easier
implementation of complex instruction sets and better support for
instruction set extensions.
●
 Microprocessor - 8086-Case Study
❏ It is a 16-bit Microprocessor having 20 address lines and 16 data lines that
provides up to 1MB storage.
❏ It consists of powerful instruction set, which provides operations like
multiplication and division easily.
❏ The architecture of the 8086 microprocessor is based on a complex instruction set
computer (CISC) architecture, which means that it supports a wide range of
instructions, many of which can perform multiple operations in a single
instruction.
❏ The 8086 microprocessor has a segmented memory architecture
Features of 8086
The most prominent features of a 8086 microprocessor are as follows −

It has an instruction queue, which is capable of storing six instruction bytes from
the memory resulting in faster processing.
It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data
bus, and 16-bit external data bus resulting in faster processing.
It is available in 3 versions based on the frequency of operation −
8086 → 5MHz
8086-2 → 8MHz
(c)8086-1 → 10 MHz
It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which improves
performance.
Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.
Architecture of 8086
EU (Execution Unit)

Execution unit gives instructions to BIU stating from where to fetch the data and
then decode and execute those instructions.

Its function is to control operations on data using the instruction decoder & ALU.

EU has no direct connection with system buses as shown in the above figure, it
performs operations over data through BIU.

ALU
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT
operations.
Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the
result stored in the accumulator. It has 9 flags and they are divided into 2 groups −
Conditional Flags and Control Flags.

Conditional Flags
It represents the result of the last arithmetic or logical instruction executed. Following is the list of conditional flags −

Carry flag − This flag indicates an overflow condition for arithmetic operations.
Auxiliary flag − When an operation is performed at ALU, it results in a carry/barrow from lower nibble (i.e. D0 –
D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses
this flag to perform binary to BCD conversion.
Parity flag − This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result
contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity Flag is reset.
Zero flag − This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set to 0.
Sign flag − This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag
is set to 1 else set to 0.
Overflow flag − This flag represents the result when the system capacity is exceeded.
Control Flags
Control flags controls the operations of the execution unit. Following is the list of
control flags −

Trap flag − It is used for single step control and allows the user to execute one
instruction at a time for debugging. If it is set, then the program can be run in a
single step mode.
Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit
the interruption of a program. It is set to 1 for interrupt enabled condition and
set to 0 for interrupt disabled condition.
Direction flag − It is used in string operation. As the name suggests when it is
set then string bytes are accessed from the higher memory address to the lower
memory address and vice-a-versa.
General purpose register
There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can be
used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register
pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX
respectively.

AX register − It is also known as accumulator register. It is used to store operands for arithmetic
operations.
BX register − It is used as a base register. It is used to store the starting base address of the
memory area within the data segment.
CX register − It is referred to as counter. It is used in loop instruction to store the loop counter.
DX register − This register is used to hold I/O port address for I/O instruction.

Stack pointer register

It is a 16-bit register, which holds the address from the start of the segment to the memory
location, where a word was most recently stored on the stack.
BIU (Bus Interface Unit)
BIU takes care of all data and addresses transfers on the buses for the EU like sending
addresses, fetching instructions from the memory, reading data from the ports and the memory
as well as writing data to the ports and the memory. EU has no direction connection with
System Buses so this is possible with the BIU. EU and BIU are connected with the Internal Bus.
BIU has the following functional parts −

Instruction queue − BIU contains the instruction queue. BIU gets upto 6 bytes of next instructions
and stores them in the instruction queue. When EU executes instructions and is ready for its next
instruction, then it simply reads the instruction from this instruction queue resulting in increased
execution speed.
Fetching the next instruction while the current instruction executes is called pipelining.
Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of
instructions and data in memory, which are used by the processor to access memory locations. It also
contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU.
CS − It stands for Code Segment. It is used for addressing a memory location in the code
segment of the memory, where the executable program is stored.
DS − It stands for Data Segment. It consists of data used by the program andis accessed in the
data segment by an offset address or the content of other register that holds the offset address.
SS − It stands for Stack Segment. It handles memory to store data and addresses during
execution.
ES − It stands for Extra Segment. ES is additional data segment, which is used by the string to
hold the extra destination data.
Instruction pointer − It is a 16-bit register used to hold the address of the next
instruction to be executed.