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Digital IC Design1

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47 views3 pages

Digital IC Design1

Uploaded by

Mohamt
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Track Title: Digital IC Design

Code: E002

Duration: 3 Months

Overview:
This course aims to introduce students to digital electronics design & implementation
on field programmable gate arrays (FPGAs). FPGA architecture, digital design flow
using FPGAs & Verilog coding guidelines will be discussed. Course study will involve
several projects to give hands-on experience in designing basic digital blocks as well
as implementing complex designs using FPGAs. Timing violations and power analysis
will be discussed. ISE & Vivado IDEs will be used on Zynq-7000 development kits.

ASIC design is a methodology of cost and size reduction of an electronic circuit,


product, or system through miniaturization and integration of individual components
and their functionality into a single element – an Application Specific Integrated Circuit
(ASIC). An electronic product commonly consists of many integrated circuits (ICs)
which are interconnected together to perform a particular function. For example, a
1980s smoke detector was built entirely of general-purpose ICs, such as amplifiers,
comparators, regulators and discrete components such as resistors and capacitors.
The objective of this module is to able to convert the RTL code (Verilog/VHDL) to the
chip (Tape-out)

The main aim of the module is to qualify students to have knowledge about the roles
of the verification engineer in the market. The module gives a quick overview on the
verification process in general and trains the applicant on how to construct a robust
verification plan. After finishing the module, applicants shall be able to construct a
verification plan and create complex test cases using UVM to test complex SoC
designs.

Prerequisites:
 Good knowledge in digital electronics design
 Basic knowledge of HDL languages such as VHDL / Verilog
 Basic knowledge in FPGA and ASIC Technology
Contents:
Module 1: Digital Design with FPGA
 Review of digital systems design
 Top-down digital design flow
 Introduction to field-programmable gate arrays
 FPGA architecture
 FPGA flow overview
 Ultrafast design methodology
 Motivation for VHDL/Verilog
 Modules
 Basic operators
 Combinational logic
 Sequential logic
 Using simulators
 More VHDL /Verilog operators
 Parameters
 Hierarchical design
 Blocking vs non-blocking assignments
 Test-benches
 Functions, packaging
 Tasks
 Compiler directives
 System tasks
 Finite state machines, their types & applications
 Design Constraints
 Timing analysis
 Design flow for a specific FPGA tool
 Project 1 (UART) explanation
 Scripting Languages

Module 2: Digital Design ASIC


 ASIC Introduction
 Basics of STA, Timing paths
 FF basic requirements, timing Constraints.
 EDA tools design objects, Logic Synthesis
 Formal verification,
 Tutorial on Synthesis
 Synthesis Project
 Floor planning, power planning, placement, ICC
 CTS, Routing, Chip finishing
 Complete tutorial (Synthesis, Formal verification, PNR, STA) Part1
 Complete tutorial (Synthesis, Formal verification, PNR, STA) Part2
 Extraction and STA
 EMIR, Power Estimation
 Final Project
Module 3 : Digital Design Verification
 Verification basics
 Verification basics
 System Verilog
• Data types & process blocks
• Hierarchical structures
• compiler directives, scheduling, and assignments
• Classes
• Randomization
• Coverage
 UVM
• UVM overview, UVM hierarchy, and base classes
• UVM Factory & phasing
• Resources and Configurations
• TLM
• Sequences and sequencers
• Components
• Full environment
• UVM Testing Lab
 Design for Testability (DFT)
•
Hands ON:
 Labs using FPGA kits (Such as Pynq development kits)
 Writing VHDL/Verilog programs
 Writing System Verilog programs

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