Government Polytechnic, Jalgaon

Microproject
Topic: BCD Adder and Substractor

BCD ADDER
The BCD-Adder is used in the computers and the calculators that
perform arithmetic operation directly in the decimal number system. The
BCD-Adder accepts the binary-coded form of decimal numbers. The
Decimal-Adder requires a minimum of nine inputs and five outputs.
There is the following table used in designing of BCD-Adder.
In BCD concept the group of four of combination of high and low bits is
known as Nibble

From the above table, it is clear that if the produced sum is between 1 to
9, the Binary and the BCD code is the same. But for 10 to 19 decimal
numbers, both the codes are different. In the above table, the binary sum
combinations from 10 to 19 give invalid BCD. There are the following
points that help the circuit to identify the invalid BCD.

It is obvious from the table that a correction is needed when the ‘Binary
Sum’ has an output carry K=1.
The other six combinations from 10 to 15 need correction in which the
bit on the Z8 position is 1.
In the Binary sum of 8 and 9, the bit on the Z8 position is also 1. So, the
second step fails, and we need to modify it.
To distinguish these two numbers, we specify that the bit on the Z4 or
Z2 position also needs to be 1 with the bit of Z8
The condition for a correction and an output carry can be expressed by
the Boolean function:
C=K+Z8.Z4+Z8.Z2

Once the circuit found the invalid BCD, the circuit adds the binary
number of 6 into the invalid BCD code to make it valid.

We take a 4-bit Binary-Adder, which takes addend and augend bits as an

input with an input carry ‘Carry in’.
The Binary-Adder produces five outputs, i.e., Z8, Z4, Z2, Z1, and an
output carry K.
With the help of the output carry K and Z8, Z4, Z2, Z1 outputs, the
logical circuit is designed to identify the Cout
The Z8, Z4, Z2, and Z1 outputs of the binary adder are passed into the
2nd 4-bit binary adder as an Augend.
The addend bit of the 2nd 4-bit binary adder is designed in such a way
that the 1st and the 4th bit of the addend number are 0 and the 2nd and the
3rd bit are the same as Cout. When the value of Cout is 0, the addend
number will be 0000, which produce the same result as the 1st 4-bit
binary number. But when the value of the Cout is 1, the addend bit will
be 0110, i.e., 6, which adds with the augent to get the valid BCD
number.
Example: 1001+1000
First, add both the numbers using a 4-bit binary adder and pass the input
carry to 0.
The binary adder produced the result 0001 and carried output ‘K’ 1.
Then, find the Cout value to identify that the produced BCD is invalid or
valid using the expression Cout=K+Z8.Z4+Z8.Z2.
K=1
Z8 = 0
Z4 = 0
Z2 = 0
Cout = 1+0*0+0*0
Cout = 1+0+0
Cout = 1
The value of Cout is 1, which expresses that the produced BCD code is
invalid. Then, add the output of the 1st 4-bit binary adder with 0110.
= 0001+0110
= 0111
The BCD is represented by the carry output as:
BCD=Cout Z8 Z4 Z2 Z1=1 0 1 1 1
When the resultant BCD is invalid i.e.,
1. If sum of nibbles is less than or equal to 9 and carry is 0 then no
correction is required i.e., it is a valid BCD.

2. If sum of nibbles is less than or equal to 9 but, carry is 1 then add 6

i.e., (0110) in binary to that nibble separately
3. If sum of nibbles is greater than 9 then add 6 i. e., (0110) in binary
to that nibble.

4. After adding 6 (0110) it gives correct resultant valid BCD

4 Bit Parallel adder

A 4-bit parallel adder is a digital circuit that can add two 4-bit binary
numbers together. It performs addition by adding each corresponding
pair of bits from the two numbers, along with any carry from the
previous bit. The result is a sum of the two numbers, represented in
binary form.
 Fig. Block diagram of 4 bit BCD adder

Types of 4 bit BCD adder

1. Full BCD Adder :-
Full Adder is the adder that adds three inputs and produces two
outputs. The first two inputs are A and B and the third input is an
input carry as C-IN. The output carry is designated as C-OUT and
the normal output is designated as S which is SUM. The C-OUT is
also known as the majority 1’s detector, whose output goes high
when more than one input is high. A full adder logic is designed in
such a manner that can take eight inputs together to create a byte-
wide adder and cascade the carry bit from one adder to another. We
use a full adder because when a carry-in bit is available, another 1-
bit adder must be used since a 1-bit half-adder does does not take a
carry-in bit. A 1-bit full adder adds three operands and generates 2-
bit results.
 Logical Expression for SUM: = A’ B’ C-IN + A’ B C-IN’ + A B’ C-
IN’ + A B C-IN = C-IN (A’ B’ + A B) + C-IN’ (A’ B + A B’) = C-
IN XOR (A XOR B) = (1,2,4,7)

Logical Expression for C-OUT: = A’ B C-IN + A B’ C-IN + A B C-

IN’ + A B C-IN = A B + B C-IN + A C-IN = (3,5,6,7)

Applications of Full Adder

• Full adders are used in ALUs (arithmetic logic units) of CPUs of
computers.
• Full adders are used in calculators.
• Full adders also help in carrying out multiplication of binary
numbers.
• Full adders are also used to realize critic digital circuits like
multiplexers.
• Full adders are used to generate memory addresses.
• Full adders are also used in generation of program counterpoints.
• Full adders are also used in GPU (Graphical Processing Unit).

Advantages of Full Adder

• Full adder provides facility to add the carry from the previous stage.
• The power consumed by the full adder is relatively less as compared
to half adder.
• Full adder can be easily converted into a half subtractor just by
adding a NOT gate in the circuit.
• Full adder produces higher output that half adder.
• Full adder is one of the essential part of critic digital circuits like
multiplexers.
• Full adder performs operation at higher speed.

Disadvantages of Full Adder

 The main limitation of a full adder is that it can only add three
input bits; it cannot handle more than one carry bit from the
previous steps. Additionally, both circuits are limited to addition;
they cannot perform other operations such as subtraction or
multiplication.

K-MAP Representation For Full BCD Adder

2. Half BCD Adder

A half adder is a digital logic circuit that performs binary addition of two
single-bit binary numbers. It has two inputs, A and B, and two outputs,
SUM and CARRY. The SUM output is the least significant bit (LSB) of
the result, while the CARRY output is the most significant bit (MSB) of
the result, indicating whether there was a carry-over from the addition of
the two inputs. The half adder can be implemented using basic gates
such as XOR and AND gates.
Sure, here’s a more in-depth explanation of the half adder circuit:
The half adder is a basic building block for more complex adder circuits
such as full adders and multiple-bit adders. It performs binary addition
of two single-bit inputs, A and B, and provides two outputs, SUM and
CARRY.
The SUM output is the least significant bit (LSB) of the result, which is
the XOR of the two inputs A and B. The XOR gate implements the
addition operation for binary digits, where a “1” is generated in the SUM
output only when one of the inputs is “1”.
The CARRY output is the most significant bit (MSB) of the result,
indicating whether there was a carry-over from the addition of the two
inputs. The CARRY output is the AND of the two inputs A and B. The
AND gate generates a “1” in the CARRY output only when both inputs
are “1”.

Fig. Block Diagram of Half Adder

Truthtable
Applications of Half adder
1.Arithmetic circuits: Half adders are utilized in number-crunching
circuits to add double numbers. At the point when different half adders
are associated in a chain, they can add multi-bit double numbers.

2.Data handling: Half adders are utilized in information handling

applications like computerized signal handling, information encryption,
and blunder adjustment.

3.Address unraveling: In memory tending to, half adders are utilized in

address deciphering circuits to produce the location of a particular
memory area.

4.Encoder and decoder circuits: Half adders are utilized in encoder and
decoder circuits for computerized correspondence frameworks.
5.Multiplexers and demultiplexers: Half adders are utilized in
multiplexers and demultiplexers to choose and course information.

6.Counters: Half adders are utilized in counters to augment the count by

one.

Advantages of Half adder:

Simple design, the basic building block to understanding 1-bit addition.
Just with an inverter, it can be converted to the half substractor.

Disadvantages of half adder:

1. Half adders have no scope of adding the carry bit resulting
from the addition of previous bits.

2. The real-time scenarios involve adding the multiple numbers

of bits which cannot be accomplished using half adder.

3. It is not suitable for cascading for multi-bit additions.

4. To get rid of this problem, a full adder is required which adds

three 1 bit.

5. It does not incorporate the previous carry for addition.

K-MAP Representation for Half Adder
BCD SUBSTRACTOR
BCD subtractor is a circuit which accepts minuend and
subtrahend in the form of BCD and produces the difference in
BCD form. The BCD subtractor will be implemented in this project
with the help of a BCD adder and 9's complement circuits. A
schematic diagram of the design of the BCD Subtractor is shown
in figure
Types of BCD Substractor
1. Full Substractor :-
A full subtractor is a combinational circuit that performs
subtraction of two bits, one is minuend and other is subtrahend,
taking into account borrow of the previous adjacent lower minuend
bit. This circuit has three inputs and two outputs. The three inputs
A, B and Bin, denote the minuend, subtrahend, and previous
borrow, respectively. The two outputs, D and Bout represent the
difference and output borrow, respectively. Although subtraction is
usually achieved by adding the complement of subtrahend to the
minuend, it is of academic interest to work out the Truth Table and
logic realisation of a full subtractor; x is the minuend; y is the
subtrahend; z is the input borrow; D is the difference; and B
denotes the output borrow. The corresponding maps for logic
functions for outputs of the full subtractor namely difference and
borrow.
Working:-
1. First, we need to convert the binary numbers to their two’s
complement form if we are subtracting a negative number.
2. Next, we compare the bits in the minuend and subtrahend at the
corresponding positions. If the subtrahend bit is greater than or
equal to the minuend bit, we need to borrow from the previous
stage (if there is one) to subtract the subtrahend bit from the
minuend bit.
3. We subtract the two bits along with the borrow-in to get the
difference bit. If the minuend bit is greater than or equal to the
subtrahend bit along with the borrow-in, then the difference bit is
1, otherwise it is 0.
4. We then calculate the borrow-out bit by comparing the minuend
and subtrahend bits. If the minuend bit is less than the subtrahend
bit along with the borrow-in, then we need to borrow for the next
stage, so the borrow-out bit is 1, otherwise it is 0.

The circuit diagram for a full subtractor usually consists of two

half-subtractors and an additional OR gate to calculate the borrow-
out bit. The inputs and outputs of the full subtractor are as follows:

Inputs:
A: minuend bit
B: subtrahend bit
Bin: borrow-in bit from the previous stage

Outputs:
Diff: difference bit
Bout: borrow-out bit for the next stage
 Fig. Block Diagram of full Substractor

Truthtable:-
Applications of Full Subtractor:-

The applications of a full subtractor are many and varied,

including:

1.Arithmetic circuits: Full subtractors are used in arithmetic

circuits for performing binary subtraction.

2.ALU (Arithmetic Logic Unit): The full subtractor is an essential

component of an ALU, which performs arithmetic and logical
operations in a computer’s central processing unit (CPU).

3.Binary number representation: Full subtractors are used in the

representation of negative binary numbers.

4,Error Correction: Full subtractors are used in error correction

codes for detecting and correcting errors in digital signals.

5.Digital filters: Full subtractors are used in digital filters to

subtract one signal from another to produce a filtered output.

6.Digital clocks: Full subtractors are used in digital clocks to

subtract one number from another to obtain the elapsed time.
7.Microcontrollers: Full subtractors are used in microcontrollers to
perform subtraction operations as part of their instruction set.

8.Digital signal processing: Full subtractors are used in digital

signal processing to perform subtraction operations on signals.

Advantage of Full Substractor:-

Here is the advantage of full Subtractor circuit. We can cascade
single bit full Subtractor circuits and could subtract two multiple
bit binary numbers. In such cases a cascaded full-Adder circuit can
be used with NOT gates.

Disadvantage of Full Substractor:-

The foremost disadvantage of the half subtractor is, we cannot

make a Borrow bit in this subtractor. Whereas in its design,
actually we can make a Borrow bit in the circuit & can subtract
with the remaining two i/ps.

K-MAP Representation for Full Substractor

HALF SUBSTRACTOR
A half subtractor is a digital logic circuit that performs binary
subtraction of two single-bit binary numbers. It has two inputs, A
and B, and two outputs, DIFFERENCE and BORROW. The
DIFFERENCE output is the difference between the two input bits,
while the BORROW output indicates whether borrowing was
necessary during the subtraction.

The half subtractor can be implemented using basic gates such as

XOR and NOT gates. The DIFFERENCE output is the XOR of the
two inputs A and B, while the BORROW output is the NOT of
input A and the AND of inputs A and B.
Half subtractor is a combination circuit with two inputs and two
outputs that are different and borrow. It produces the difference
between the two binary bits at the input and also produces an
output (Borrow) to indicate if a 1 has been borrowed. In the
subtraction (A-B), A is called a Minuend bit and B is called a
Subtrahend bit.

Fig: Block Diagram of Half Substractor

 Truthtable:

Applications of Half Substractor

1.Half subtractor is used to reduce the force of audio or radio

signals.

2. It can be used in amplifiers to reduce the sound distortion.

3.Half subtractor is used in ALU of processor.

 3. It can be used to increase and decrease operators and also
calculates the addresses.

Advantages of Half Substractor

1. Simple design, the basic building block to understanding 1-bit

addition.
2. Just with an inverter, it can be converted to the half subtractor.

3. Half subtractor is used to reduce the force of audio or radio

signals.

4. It can be used in amplifiers to reduce the sound distortion.

5. Lf subtractor is used in ALU of processor.

6. It can be used to increase and decrease operators and also

calculates the addresses.

Disadvantages of Half Substractor

1. Only handles subtraction of two single-bit binary numbers.

2. Cannot perform addition or handle multi-bit numbers.

3. Only gives a difference and a borrow output, not the sum and
carry.

4. Cannot handle negative numbers or perform signed subtraction.

K-MAP Representation for Half Substractor