Q:2 ID No. Second Year B.Teel Course Code: CP206 Course Title: Date: 15.05.2018 ‘Time: 10:30 am to 1:30 pm Maximum Marks Birla Vishvakarma Mahavidyalaya (Engineering College) (An Autonomous Institution) (Computer Engg.) - End Semester Examinati = Summer 2018 Computer Organization 10 Instructions: [Al (8) al (8) {cl [D] [A] Each section must be written in a separate answer book, Numbers to the right indicate maximum marks. All figures and diagrams must be drawn in ink Make suitable assumptions if required, clearly mentioning and justifying the same. Section=1 Explain why it is required to de-multiplex the data from address on 8085. With [5] precise diagrams (in ink) show how this can be done, The diagrams must clearly show the device-type and the number of the chip, showing relevant pin connections in each case. ‘A micro-computer using 8085 processor Is to be designed to have 16KByte ROM, [6] using KByte EPROM(2764) chips starting from the address 0000H and 16 KByte RAM, using 8K SRAM Chips (6164), starting from the address 8000H. Show the design for this memory module with clear diagrams. ‘Attempt any THREE of the following questions Explain the instruction MOV A, 8. Show timing diagrams for the same. [4] Explain the following instructions. Also mention addressing mode, number of {4] machine cycles and number of T states: 1.LDAXB 2. CPI data State and explain the functioning of the following program code, very clearly [4] showing all the stack operations: PUSH B PUSH D PoP B PoP D ‘Assume SP points at FOOOH before the given program starts. Two 8 bit BCD numbers are stored at memory locations 2000H and 2001H [4] respectively. Write an Assembly language program for 8085, which adds the two given numbers and stores the BCD result at 3000H and carry (if any) at 3001H location. Attempt any TWO of the following ‘The block of 100 data bytes Is stored in the memory locations starting from 2000H. [6] Write an 8085 Assembly Language Program to arrange this data in ascending order and store the same at 3000H onwards. Page tof 2Q6 (B] (c) [A] [B] [Al (8) fc] [Al [8] {c] Explain what you understand by: 1. DMA 2. Programmed 10 3. Interrupt driven 1/0 Explain how a processor can read /write data from 1/0 devices using each of these methods. With neat diagram show how interrupts arriving at an INTR pin of 8085 from few interrupting devices can be serviced. Explain the role of INTA# signal and show timing diagram of INTA# cycle. Show the activities that are carried out by the processor to service the interrupt device chosen under INTA# cycle. jection ~ IT Develop and draw architecture of a simple processor which resembles that of 8085 as much as possible. For this architecture, write a sequence of control steps required to execute the instruction: ADD M Draw block diagram of a micro-programmed CPU, and explain the function of each of its blocks. Also explain the Vertical Micro-Programming in this context. Attempt any TWO of the following questions: Explain with diagrams the basic working of Static RAMs, Dynamic RAMs and of Cache memories. Give expression for the speed up using cache memories, showing the meaning of each term used. Explain Direct Mapping Algorithm in the context of cache memories. State advantages of representing binary numbers using 2's complement method compared to the other methods such as sign and magnitude method and 1's complement method. Explain how to multiply OFH with OAH using shift-add method, for binary numbers represented using 2's complement method. Show how very large binary numbers can be represented using single precision floating point representation? Explain the algorithm to multiply two floating point humbers under such a representation. Also show double precision floating point representation of binary numbers. Attempt any TWO of the following: What is the maximum through-put achievable with K stage pipelined processor? What are difficulties in achieving highest theoretically suggested through-put in case of Pipelined processors? List these difficulties with thelr possible solutions. Describe Flynn's taxonomy. Show where the following cases map under the Flynn's classification and_ explain each in detail: 1, Symmetric Multiprocessing 2. Cluster Computing. 3. SIMD Instructions Explain the following: 1, RISC Concepts 2. Vector Computing (6) {6] (5] [6] (6) [6] [6] (6] {6] [6] Page 2 of 2