USOO886.

1337B2

(12) United States Patent (10) Patent No.: US 8,861,337 B2

Martin et al. (45) Date of Patent: Oct. 14, 2014

(54) ROBUST COMMUNICATIONS IN 2006, O136604 A1 6/2006 Schultze et al.

ELECTRICALLY NOISY ENVIRONMENTS 2008. O140892 A1 6/2008 Fong et al.
2011/0285538 A1 11/2011 Lee et al.
2012fOO132O1 A1 1/2012 Pariseau et al.
(75) Inventors: Nathaniel Brian Martin, San Bruno, 2012/0076146 A1 3/2012 Rohatschek et al.
CA (US); Ian Casimir Dimen, San
Francisco, CA (US) FOREIGN PATENT DOCUMENTS
(73) Assignee: Tesla Motors, Inc., Palo Alto, CA (US) EP 383.946 8, 1990
EP 4288.10 5, 1991
(*) Notice: Subject to any disclaimer, the term of this JP 56O20356 7/1979
patent is extended or adjusted under 35 JP 551 10452 8, 1980
U.S.C. 154(b) by 292 days.
OTHER PUBLICATIONS
(21) Appl. No.: 13/572,665 European search report in application EP 13 16 6307, Sep. 27, 2013.
(22) Filed: Aug. 12, 2012 An Shi-Qietal: “Design and realization of SPI interface inlithiumion
battery voltage measuring system”, 2006 IEEE Power Electronics
(65) Prior Publication Data Specialists Conference—Jun. 18-22, 2006—Jeju, South Korea, 2006
IEEE Power Electronics Specialists Conference (IEEE CAT. No.
US 2013/O294529 A1 Nov. 7, 2013 06CH37819C) 2006 IEEEPiscataway, NJ,USA, pp. 83-87.
O O Dongping Xu et al: “Research on Li-ion Battery Management Sys
Related U.S. Application Data tem', Electrical and Control Engineering (ICECE), 2010 Interna
(60) Provisional application No. 61/643,794, filed on May tional Conference on, IEEE, Piscataway, NJ. USA, pp. 4106-4109.
7, 2012. European Search Report in application 13166306, dated Sep. 11,
2013.
(51) Int. Cl. European Search Report in application 13166316, dated Jul. 29.
H04L 2/26 (2006.01) 2013.
HO3K II/00 (2006.01) European Search Reportin application 13166313, dated Oct. 2, 2013.
G6F 3/42 (2006.01) European Search Report in application 13166309, dated Sep. 16.
H04L 2/40 (2006.01) 2013.
(52) U.S. Cl. k .
CPC ...... G06F 13/4247 (2013.01); H04L 12/40052 cited by examiner
(2013.01)
USPC ............................ 370/222; 370/406: 3.75/215
s s Primary Examiner — Shaq Taha
(58) Field of Classification Search
USPC .......................................................... 702 (74) Attorney, Agent, or Firm — J. Richard Soderberg
See application file for complete search history.
(56) References Cited (57) ABSTRACT
U.S. PATENT DOCUMENTS A system and method for low-cost, fault tolerant, EMI robust
data communications, particularly for an EV environment.
4,159,470 A 6/1979 Froehling et al.
4.937,811 A 6, 1990 Harris
6,600,790 B1* 7/2003 Umemura et al. ............ 375/257 30 Claims, 15 Drawing Sheets

- 100
225 220

y 110s
U.S. Patent Oct. 14, 2014 Sheet 1 of 15 US 8,861,337 B2

100
N

FIG. 1
U.S. Patent Oct. 14, 2014 Sheet 2 of 15 US 8,861,337 B2

- 100
U.S. Patent Oct. 14, 2014 Sheet 3 of 15 US 8,861,337 B2

FIG. 3
U.S. Patent Oct. 14, 2014 Sheet 4 of 15 US 8,861,337 B2

/ 4OO

DATA RECEIVED?

RETRANSMIT
RECEIVED
DATA

PERIOD OF SILENCE2

DECODE
FIRST BYTE

MATCH STORED
ADDRESSP

DECODE
COMMAND

PROCESS
COMMAND

FIG. 4
U.S. Patent Oct. 14, 2014 Sheet 5 Of 15 US 8,861,337 B2

500
Y 515
505 N. 510 ( Y

1/01/01/01/01/01/01/01/0
FIG. 5
600 Y
605 610 615 620

0x00 0x00 0x00 0x00

FIG. 6
700 Ya

M 710
0x80 0x02 0x03 0x03
710
AAR M
0x00 0x80 0x02 0x03 0x03
0x00 BAR
705
AAR M
0x03 0x00 0x02 0x03 0x03
0x00 BAR
205

FIG. 7
U.S. Patent Oct. 14, 2014 Sheet 6 of 15 US 8,861,337 B2

105

FIG. 8
U.S. Patent Oct. 14, 2014 Sheet 7 Of 15 US 8,861,337 B2

215 A. 910
FAULT1 FAULT2

915

920

915

FIG. 9
U.S. Patent Oct. 14, 2014 Sheet 8 of 15 US 8,861,337 B2

100
N

FIG. 10
U.S. Patent Oct. 14, 2014 Sheet 9 Of 15 US 8,861,337 B2

FAULT1

FIG. 11

FIG. 12
U.S. Patent Oct. 14, 2014 Sheet 10 of 15 US 8,861,337 B2

305 1305 1310

320

FIG. 13
U.S. Patent Oct. 14, 2014 Sheet 11 of 15 US 8,861,337 B2

y TWISTED

FIG. 14
U.S. Patent Oct. 14, 2014 Sheet 12 of 15 US 8,861,337 B2

1630
X
1635 FAULT

1625

X
BROKEN
WIRE

FIG. 16
U.S. Patent Oct. 14, 2014 Sheet 13 of 15 US 8,861,337 B2

105
Ya

215

220

BROKEN

FIG. 17
U.S. Patent Oct. 14, 2014 Sheet 14 of 15 US 8,861,337 B2

100
N

FAULT1 FAULT2

DATAN)
U.S. Patent Oct. 14, 2014 Sheet 15 Of 15 US 8,861,337 B2

FIG. 19

FAULT2

FIG. 20
 US 8,861,337 B2
1. 2
ROBUST COMMUNICATIONS IN BRIEF SUMMARY OF THE INVENTION
ELECTRICALLY NOISY ENVIRONMENTS
Disclosed is a system and method for low-cost, fault toler
CROSS REFERENCE TO RELATED ant, EMI robust data communications.
APPLICATIONS The following summary of the invention is provided to
facilitate an understanding of Some of technical features
This application claims the benefit of U.S. Provisional related to low-cost, fault tolerant, EMI robust data commu
Application No. 61/643,794, filed 7 May 2012, the contents nications in an electric vehicle (EV), and is not intended to be
of which are expressly incorporated by reference thereto in its 10
a full description of the present invention. A full appreciation
entirety for all purposes. of the various aspects of the invention can begained by taking
The following applications are related to the present appli the entire specification, claims, drawings, and abstract as a
cation, each also an application claiming benefit of U.S. Pro whole. The present invention is applicable to other environ
visional Application No. 61/643,794, filed 7 May 2012 and ments besides electric vehicles.
filed on even date herewith, the contents of these applications 15 Other features, benefits, and advantages of the present
are expressly incorporated by reference thereto in their entire invention will be apparent upon a review of the present dis
ties for all purposes: application Ser. No. 13/572,666 titled closure, including the specification, drawings, and claims.
HOST COMMUNICATIONS ARCHITECTURE, applica
tion Ser. No. 13/572,667 titled REDUNDANT MULTI BRIEF DESCRIPTION OF THE DRAWINGS
STATESIGNALING, application Ser. No. 13/572,668 titled
WIRE BREAKDETECTION IN REDUNDANT COMMU The accompanying figures, in which like reference numer
NICATIONS, and application Ser. No. 13/572,669 titled als refer to identical or functionally-similar elements
HOST INITIATED STATE CONTROL OF REMOTE CLI throughout the separate views and which are incorporated in
ENT IN COMMUNICATIONS SYSTEM. and form a part of the specification, further illustrate the
25 present invention and, together with the detailed description
BACKGROUND OF THE INVENTION of the invention, serve to explain the principles of the present
invention.
The present invention relates generally to data communi FIG. 1 illustrates a data flow schematic for a battery elec
cations, and more specifically, but not exclusively, to low tronics system;
cost, fault tolerant, EMI robust data communications for high 30 FIG. 2 illustrates a connections schematic for the battery
performance electric vehicle (EV) environments. electronics system;
Increasingly in vehicular and industrial applications, high FIG. 3 illustrates a general schematic of components of a
energy electrical energy storage systems are used. Whether client;
deployed to energize traction/propulsion motors, or factory FIG. 4 illustrates a flowchart of a client response process
machines, these energy storage systems often include many 35 400 to received serial data;
interconnected battery module assemblies, each module FIG. 5 illustrates an address byte used in the battery com
assembly including many individual battery storage cells. munications system;
FIG. 6 illustrates a packet 6 having 4 bytes used in the
The interconnected modules collectively represent a unitary battery communications system during enumeration;
battery pack for the energy storage needs of the application. 40 FIG. 7 illustrates a sequence of address enumeration trans
Each module includes on-board electronics for safety and missions initiated by the host 105;
monitoring uses, and it is important that a centralized moni FIG. 8 illustrates a detailed general schematic of a signal
toring system reliably exchange data with these modules. The transmission portion of a fault signaling Subsystem for bat
Voltages and currents that exist in operation and control of the tery communications system;
motors or machines produce conditions (e.g., Voltage and 45 FIG. 9 illustrates a detailed general schematic of a redun
current variations) that can interfere with the communica dancy portion of a fault signaling Subsystem for battery com
tions in a number of ways. The communication system must munications system;
therefore be designed to operate satisfactorily in the presence FIG. 10 illustrates a detailed general schematic of an inter
of significant potential electromagnetic interference (both ference rejection portion of a fault signaling Subsystem for a
electromagnetic induction and electromagnetic radiation). 50 battery communications system;
In the EV context, further boundary conditions include: a) FIG. 11 illustrates an alternate configuration for the host
low-cost solutions, b) reduced part/component solutions, c) from that shown in FIG. 10 which adds a filter at each end of
low power consumption, and d) reliability appropriate for an the daisy-chain loop:
automotive environment. The communications to and from FIG. 12 illustrates a detailed schematic diagram of an
the energy storage system includes safety-critical data and the 55 oscillation damping portion of the power distribution imple
automotive environment is harsh. The vehicle moves and is mentation for client;
Subject to mechanical bumps, shocks, and vibrations, under a FIG. 13 illustrates a detail schematic diagram of a wake
range of temperature and humidity conditions. The modules portion of the client;
FIG. 14 illustrates ageneral schematic diagram of a portion
are discrete elements and communications systems require 60 of a differential data signal implementation of battery elec
wiring harnesses using wires and connectors. The wires and tronics system;
wire connectors/connections can break and/or they can FIG. 15 illustrates a schematic diagram for a data conduc
become loose or provide intermittent connections, among tor break detection circuit topology that includes a mecha
other challenges. nism for data signal break detection (i.e., a “break detector');
What is needed is a system and method for low-cost, fault 65 FIG. 16 illustrates a schematic diagram for a more gener
tolerant, EMI robust data communications, particularly for an alized conductor break detection circuit topology as com
EV environment. pared to topology 1500 shown in FIG. 15:
 US 8,861,337 B2
3 4
FIG. 17 illustrates a schematic diagram for a power supply 110, (e.g., client 110) retransmits all data it receives on a
conductor break detection circuit topology 1700; byte-by-byte basis to a next client 110 (i.e., client 110s).
FIG. 18 illustrates a detailed general schematic of an inter The last client in the loop (i.e., client 110 s) transmits all
ference rejection portion of a signaling Subsystem for a bat data back to host 105. Thus in FIG. 1, host 105 always trans
tery communications system similar to FIG. 10 with addi mits data to client 110 and receives from client 110s. Battery
tional optional details; electronics system 100 does not require any particular con
FIG. 19 illustrates an alternate configuration for the host nection order for battery modules, independent of the poten
from that shown in FIG. 11 which adds a second host isolated tial (e.g., the modules need not be connected in pack Voltage
power Supply; and order). Daisy-chain loops as used in conventional parlance
FIG. 20 illustrates an alternate configuration for the host 10 includes wiring schemes in which multiple devices are wired
from that shown in FIG. 19. together in a sequence or ring. As used herein, daisy-chain
includes such wiring schemes, as well as other circularise
DETAILED DESCRIPTION OF THE INVENTION quenced wiring schemes in which digital data is regenerated
or modified and analog signals are processed to counteract
Embodiments of the present invention provide a system 15 attenuation.
and method for low-cost, fault tolerant, EMI robust data com FIG. 2 illustrates a connections schematic for battery elec
munications. The following description is presented to enable tronics system 100. The connections architecture for battery
one of ordinary skill in the art to make and use the invention electronics system 100 includes five wires, each wire is ter
and is provided in the context of a patent application and its minated at each client 110. These five wires include: a first
requirements. serial data wire 205, a second serial data wire 210 (for redun
Various modifications to the preferred embodiment and the dancy), an isolated power wire 215, an isolated ground wire
generic principles and features described herein will be 220, and a fault wire 225. Applications not requiring fault
readily apparent to those skilled in the art. Thus, the present tolerance and redundant transmission methods use a mini
invention is not intended to be limited to the embodiment mum of three wires: power, ground, and serial data. Thus four
shown but is to be accorded the widest scope consistent with 25 logical wires connect each client (actually five wires are used
the principles and features described herein. because of the serial data redundancy). Host 105 and clients
There are many different sources and causes of electrical 110, reliably transmit data over these wires in the presence of
noise in most every operating environment. It is not always substantial EMI with each client powered by its associated
the case that the electrical noise interferes significantly with battery module. Each battery module is part of a larger poten
communications within that operating environment. Embodi 30 tial stack and has a different local ground than other battery
ments of the present invention are configured and imple modules. In the EV there is significant electrical switching
mented to provide robust communications in electrically noise, such as from a driver inverter, that creates the substan
noisy environments. For purposes of this application, an elec tial EMI having three forms: switching transients, differential
trically noisy environment is one in which Voltages induced mode noise, and common mode noise.
or resulting from the electrical noise in the environment, as 35 Host 105 includes a digital signal processor (DSP) that is
measured between nodes or points-under-test, are on the able to act as a universal asynchronous receiver/transmitter
same order of the Voltage levels used for data signaling. In the (UART) master. This DSP also determines the behavior of the
specific context of an application including an electrical battery, calculates a state of charge, and other battery metrics
motor, such as those used for propulsion in an electric Vehicle and conditions. Clients 110, and the communications bus are
(EV), there are significant time-varying magnetic fields 40 some of the peripherals that the DSP employs to determine
present in regions of the EV that can generate significant the correct behavior.
noise (as Voltages and/or currents). In the discussion herein a reference is made to a number of
FIG. 1 illustrates a data flow schematic for a battery elec wires or wire count. Reduced wire count is not just desirable
tronics system 100. Battery electronics system 100 includes a because of reduced component cost and decreased manufac
host 105 and a number N clients 110, i=1 to N. There are 45 turing costs, but also because of reliability. While FIG. 2
many different possible implementations and arrangements illustrates battery electronics system 100 having wire loops,
of host 105 and clients 110, all within the scope of the present these loops are actually collections of series of wire segments
invention. To simplify the discussion and as an aid in under and connections that extend between host 105 and client
standing, the following discussion focuses on a specific 110, between each client 110, and client 110, and
implementation in the context of an electric vehicle (EV) 50 between client 110 and host 105. These wires have at least
having a battery management system (BMS) and N=8 battery two points of connection per wire segment, if not more.
modules, each battery module including a battery module Connections, whether using a connector or some joining tech
board (BMB). The BMS includes host 105 and each battery nique (e.g., crimping), introduces points of potential failure
module board includes one client 110, i=1 to 8. having a greater risk of failure as compared to the possibility
Each client 110, is implemented using commodity proces 55 that the wire itself may fail. Each wire that is eliminated
sors (e.g., 8-bit microcontrollers) and operates within an therefore can potentially increase reliability by a significant
architecture designed with a minimal wire count to achieve amount. Any wire that is added must be carefully considered.
the described features. Full functionality of battery electron FIG. 3 illustrates a general Schematic of components
ics system 100 is maintained in the event of a single wire included with each client 110. Client 110, includes a printed
break or disconnect, with the system operating satisfactorily 60 circuit board (PCB) 305 having a processor 310 (e.g., a com
in the presence of EMI having relatively high slew rates. modity 8-bit microcontroller, or a microprocessor, or the
For data transmissions, host 105 is connected to each client like), an ASIC 315, and a set of isolators 320 that decouple
110, in a unidirectional daisy-chain loop 115that begins, and on-board and off-board signals. PCB 305 includes a number
ends, at host 105. Clients 110 are numbered in order that they of wire/connection traces that interconnect the components.
are connected on daisy-chain loop 115. Host 105 transmits all 65 The interconnections are taken to be reliable in this applica
commands to a first client on daisy-chain loop 115 (i.e., client tion so that the redundancy of the serial data wires is not
110 in FIG.1). The general protocol provides that each client replicated on PCB 3.05. Incoming first serial data wire 205
 US 8,861,337 B2
5 6
and second serial data wire 210 are joined together on PCB present invention, the semiconductor die or dies used for
305 for processing. Outgoing first serial data wire 205 and isolator 320 are embedded into the substrate and package of
second serial data wire 210 are separated on board PCB 305 ASIC 315 to further reduce use of external components while
and then routed out to a downstream device (e.g., host 105 or achieving desired levels of noise immunity.
another client 110). Each PCB 305 is associated with, and As noted above, the general transmission protocol is for
part of a battery module. Electronics on-board PCB 305 are host 105 to initiate all communications by sending commands
powered by energy available from the associated battery over the unidirectional daisy-chained serial data loops. Fur
module. Some interface elements that are part of PCB305 are ther, each client 110, re-transmits every received command as
powered from host 105 as further described herein. well as all data responses to those commands that have been
Processor 310 manages communications for client 110. 10 transmitted from downstream clients 110 -. Each client
ASIC 315 includes an analog-digital converter (ADC) that may also have a response of its own to transmit as well.
measures Voltages, temperatures, and other values for each Battery electronics system 100 requires a scheme to identify
battery module, and it turns on a bleed switch when com data packets as the UART does not have a built-in mechanism
manded. It also contains secondary hardware overVoltage/ to frame a beginning and end of data packets.
undervoltage protection. This protection directly triggers a 15 Each client 110 implements the UART to receive and
local fault indication/signal with no interaction with proces transmit these commands and responses. The responses, just
Sor 310. like the commands, are streams of response data that will
Processor 310 includes a universal asynchronous receiver/ periodically include a series of bytes that could be interpreted
transmitter (UART) and is used to implement serial data as a command. Battery electronics system 100 must imple
communications with host 105 and clients 110. UART is ment an easy, low-resource structure and method to detect
broadly adopted in commodity microcontrollers and does not beginnings and ends of a packet.
require a separate clock signal which helps further maintain a A simple mechanism that may be used in the present con
reduced wire count and reduced costs. text is to use a Sustained period of complete silence as a mark
Each client 110, includes a set of isolators 320 that for the beginning of a packet. Isolators 320 are designed to
decouple information transfer between client-client transfers 25 inhibit spurious bytes from being induced on a data wire due
and client-host transfers without a common ground reference. to electrical noise. Therefore when host 105 is not transmit
PCB 305 includes four isolators 320, one for each of inbound ting and all clients 110 have re-transmitted all commands
serial data (both 205 and 210 are merged and coupled to and responses, the data wire is dependably completely silent.
a data-in signal trace 325 on PCB 305), outbound serial data The length of time that is required for a command to be
(both 205, and 210 are merged and coupled to a data 30 circulated from host 105throughall clients 110, is a reference
out signal trace 330 on PCB 305), power wire 215, and fault period used for this period of silence. Host 105 easily frames
wire 225. Some embodiments may reduce this wire count commands by simply waiting for a previous command to
further, Such as by modulating the data signal or the fault complete before sending a Subsequent command.
signal on top of the power on power wire 215. Some tech Clients 110, also use the period of silence. FIG. 4 illustrates
niques such as, for example, data whitening, permit toggling 35 a flowchart of a client response process 400 to received serial
of the serial data line at a constant enough rate to Supply data. Process 400 includes steps 405-435. Process 400 begins
power to communications side 335 of isolators 320. with a test at step 405 to determine whether any data is being
Isolators 320 as implemented are digital isolators that received. Without receiving data, process 400 loops and
modulate a signal at a very high frequency (>100 MHz) to repeats the test at step 405 while assessing a length of time for
produce a high frequency AC signal. The digital isolator 40 which no data has been received. However, when the test at
passes this AC signal over a capacitor or an inductor and step 405 is true (and there is received data), process 400
achieves the desired isolated communication. Optical isola advances to a step 410 to retransmit the received data. After
tors are used in some embodiments when the design is not as step 410, process 400 performs a test at step 415 to determine
sensitive to cost and power concerns. whether the measured silence period for data receipt met the
Isolators 320 thus isolate a communications side 335 from 45 predetermined length of time threshold. When the test at step
a local side 340. Communications side 335 of every client 415 is negative, process 400 returns to step 405 and waits for
110, are all referenced to the same ground using ground wire received data.
220. Local side 340 is referenced to a ground of the associated However when the test at step 415 is true, process 400
battery module supporting PCB305. Isolators 320 thus trans decodes the first byte at step 420. A subsequent testatstep 425
fer information between two different voltage domains (a 50 determines whether the decoded first byte, which will be an
communications domain including other devices of battery address when the received data is a properly formed com
electronics system 100 coupled to communications side 335) mand, matches the stored address associated with the client.
and a local domain including devices of PCB 305 coupled to That is, does the first byte suggest that the received data is a
local side 340). Isolators 320 have a characteristic of being command for this specific client. When the test at step 425 is
tolerant of these domains moving (electrically) relative to 55 negative, process 400 returns to step 405 to wait for received
each other. An amount of common-mode Voltage slew that data. When the testatstep 425 is true, process 400 decodes the
isolators 320 must withstand varies by application. In this next byte or two at step 430 to decode the command. There
case, isolators 320 are able to withstand ~20 kV/LS of com after process 400 performs step 435 to process the command,
mon-mode slew before data transfer between the domains is which may require additional bytes of data and may result in
at risk of corruption. 60 the client adding a response to the received data. After step
One way that isolators 320 achieve the desired voltage 435, process 400 returns to step 405 and waits for additional
isolation is that they are built using multi-chip-module data.
(MCM) manufacturing techniques which embed multiple There are other mechanisms that battery electronics system
semiconductor dies into one Substrate and package. Physical 100 could implement for packet framing, including byte
differences between the multiple dies of isolator 320 promote 65 stuffing to mark a specific byte as a start-of-frame delimiter
the voltage isolation. ASIC 315 can be built using MCM and prevent that particular byte from appearing in real data.
manufacturing techniques. In some embodiments of the Byte stuffing would be advantageous in allowing commands
 US 8,861,337 B2
7 8
to be pipelined on the communications bus and increase bus first serial data wire 205. Enumeration packet 705 includes an
utilization. However doing so requires more processing by address of (000000) with the illegal address bit and read/write
the processors of host 105 and clients 110. bits both set to (0). (This is represented in hexadecimal as
In communications systems that have a host issuing com (0x00).) Also illustrated in FIG. 7 are a “before” address
mands to clients over a bus, it is common to introduce a register BAR and an “after address' register AAR. These
signaling system so the host can determine whether the cli show the value of an internal memory that each client 110,
ents have properly detected and decoded the commands that uses to determine its address.
have been issued. One mechanism to do this includes use of In response to receipt of a packet (e.g., enumeration packet
acknowledge/not acknowledge (ACK/NAK) responses that 705) from host 105, each client operates using process 400 of
the clients provide after receiving a command. In the present 10 FIG. 4. A first client 110, that has an address matching
context that includes a host sending broadcast messages for (000000) decodes the remaining bytes which are used to set
all clients, it becomes difficult to manage multiple clients all the desired unique address for client 110. In this case, host
transmitting ACK/NAK at the same time. 105 is changing the address of client 110, from (000000) to
Battery electronics system 100 implements a simple loop (000011) which is also represented as 0x03. The BAR for
back error detection mechanism. The protocol that is used has 15 client 110, is shown as 0x00 and the AAR is 0x03 reflecting
each client re-transmit received commands and responses this change.
allowing the host to confirm that all clients have properly Normally client 110 would retransmit the received packet
detected and decoded the commands. In response to a com to client 110, but doing so would result in client 110, also
mand, all the clients sequentially re-transmit that command having an address of 0x03. To prevent this, in this special case
until the final client re-transmits the command back to the client 110 retransmits a modified enumeration packet 710.
host. Host 105 compares the received command to the com Modified enumeration packet 710 is exactly like enumeration
mand it transmitted. When there is a byte-by-byte match, host packet 705 except that the illegal address bit is set high. Thus
105 concludes that every client 110, saw the command as it address byte 500 is changed from (00000000) to (10000000)
was sent. No ACK/NAK handshaking is used. which is also shown as a change from 0x00 to 0x80. Client
Battery electronics system 100 requires that each and every 25 110, will decode the address of modified enumeration
client 110, have a unique address so host 105 can unambigu packet 710 as (000000) which matches its address, but
ously reference it with a command. Manufacturing an EV because the illegal address bit is set, client 110, ignores this
having multiple modules as part of an energy storage system packet transmission and does not change its address. Client
is simplified when battery modules may be physically 110, simply retransmits modified enumeration packet 710
installed with as few requirements and constraints as pos 30 exactly as it was received. BAR and AAR for client 110, are
sible. Therefore it is preferred that manufacturing not prede both shown as 0x00.
termine and set addresses as the modules are installed or that This enumeration process is repeated for each client 110,
manufacturing not worry about module connection order. with addresses assigned in the order of their connection on the
Therefore the host and clients determine the addresses at daisy-chain loop. Host 105 eventually receives a loopback in
runtime. This can be a challenge as host 105 does not have any 35 response to the transmitted enumeration packet 705. As long
specific addresses to use when assigning addresses. as host 105 receives modified enumeration packet 710 in
Battery electronics system 100 provides a solution that response, host 105 confirms that a client 110, acted upon the
includes having each client 110 start with an address “O'” enumeration packet 705.
when powered on. Battery electronics system 100 considers Battery electronics system 100, configured in this way,
any client 110, with an address of "0" as being "unaddressed.” 40 operates with a latency that is a potential limitation for the
The first byte (of 8 bits) of any packet is an address byte. Two number N clients 110. Every client 110, receives a full byte
bits of the address byte (e.g., the first and second bits) are before transmission, therefore there is a minimum of one
reserved. One reserved bit is a read/write bit and the other byte-time (time to transmit one byte at a chosenbaud rate) of
reserved bit is an illegal address bit. The remaining bits pro latency per client. For a read command that is three bytes, host
vide for a maximum of 62 different useable addresses and 45 105 must wait N+3 byte-times before receiving a first byte of
thus 62 uniquely addressable clients 110. The following the response. Some applications may be limited by this
enumeration process (assigning non-illegal addresses to all latency as N increases.
clients 110) uses the general operational transmission rules FIG. 8 illustrates a detailed general schematic of a signal
with one exception. That exception not requiring, under a transmission portion of a fault signaling Subsystem for bat
very special set of conditions, that client 110, exactly retrans 50 tery electronics system 100. As noted above, battery electron
mit received data. ics system 100 includes fault wire 225 to achieve high safety
FIG. 5 illustrates an address byte 500 used in battery elec system reliability. Each battery module is provided with a
tronics system 100. A first bit 505 is the reserved illegal mechanism, through its battery module board, to generate a
address bit and a second bit 510 is the reserved read/write bit. fault signal. This fault signal provides a redundant hardware
Six low-order bits 515 are the address bits of address byte 55 path with respect to data transmission to cause the EV to
500. The six bits (000000)-(111111) represent 63 different respond appropriately in the case of a detected fault of the
addresses, with the address (000000) reserved for enumera energy storage system or one of its components. Fault wire
tion leaving 62 operational addresses (000001)-(111111). 225 is a shared fault wire distributing the on-board fault signal
FIG. 6 illustrates a packet 600 having 4 bytes used in to battery electronics system 100. Fault wire 225 uses the
battery electronics system 100 during enumeration. (Packets 60 circular topology of the daisy-chain bus to provide a dual
may have differing arrangements and numbers of bytes in redundant fault path from each client 110, to host 105.
other embodiments.) Packet 600 includes a first byte 605 that Each of the N clients 110 must be able to transmit its fault
is an address byte (e.g., address byte 500 shown in FIG. 5), a signal to host 105, and do so reliably. In this example any
register byte 610, a payload byte 615, and a CRC byte 620. individual fault signal generated by any client 110, is a Suf
FIG. 7 illustrates a sequence 700 of address enumeration 65 ficient condition to alert host 105 of a fault state, therefore the
transmissions initiated by host 105. Host 105 initially sends signaling medium must allow for a “wired OR summation of
an enumeration packet 705, and it arrives at a client 110 over all the individual fault signals from all clients 110. To
 US 8,861,337 B2
10
improve robustness in case of physical damage, the signaling ing the fault signal. A break at any one point in fault wire 225
medium provides two independent paths to host 105 from creates two portions and interrupts only one of the signal
each client 110. paths, a second signal path to one of the fault receivers of host
In actual implementation, fault wire 225 is installed in a 105 always exists. Each fault receiver is provided with pull-up
connector and that connector is used to physically attach to resistor 810 to ensure that each portion of fault wire 225
the battery module board hosting a client 110. Wires are assumes the correct IDLE potential when none of the con
joined to the connector using a crimp terminal. It is some nected fault signal transmitters 805 are active. When there is
times the case that desired levels of reliability and costs are no break, the pair of pull-up resistors 810 exist in parallel on
not achieved by using a single crimp terminal to join two or fault wire 225 and are accounted for during operation.
more conductors/wires. To improve reliability and reduce 10
The design constraint described herein concerning
costs, there is a limitation that no more than a single conduc mechanical joins using crimp terminals means that a single
tor/wire is associated with any crimp terminal which means wire cannot be literally extended in a complete circuit and
that each connector circuit cannot be associated with more
than one signal conductor. make the necessary connections. Thus, fault wire 225 is per
To meet all these requirements and connect multiple fault 15 haps more properly described as a fault path and is created
signals to a fault wire 225, battery electronics system 100 uses using numerous single wire segments 915. Each PCB 305
“open collector” signaling for a fault signal transmitter 805 supporting client 110, includes a daisy-chain connector 920
(shown as a transmitter channel in isolator 320). With open and the wire segments 915 span that part of the daisy-chain
collector signaling, each fault signal transmitter 805 is which runs between adjacent daisy-chain connectors 920.
capable of sinking current from a signal conductor (e.g., fault Each daisy-chain connector 920 includes a pair of crimp
wire 225) to ground, but is incapable of sourcing current into terminals 925, each joins to an end of a wire segment 915. For
the signal conductor. In an IDLE state (no fault signals are client 110, one crimp terminal joins to wire segment 915
active), fault wire 225 is maintained at a positive power Sup extending to client 110, and one crimp terminal joins to
ply potential. Such as by using one or more pull-up resistors wire segment 915 extending to client 110. These segments
810. 25 are each joined together using metal traces of PCB 305
For example, these resistors 810 would be chosen to have a coupled to daisy-chain connector 920. Without this built-in
value Such that the current flowing through them when a redundancy, the mechanical connector design constraints
potential equal to the daisy-chain Supply Voltage is applied to could be problematic as a fault signal originating at any client
them is close to but less than the minimum guaranteed output 110 must enter and exit all intermediate clients 110, to get to
current of fault signal transmitters 805. This allows fault 30
host 105. Given that mechanical connectors are a common
signal transmitters 805 to reliably drive fault wire 225 but point of failure for electrical systems, the use of multiple wire
provides as much margin for noise current rejection as pos segments 915 could subject the fault signal to multiple
sible: the larger the current necessary to cause a given Voltage mechanical connections in series. The implemented redun
drop across resistors 810, the smaller the voltage induced by dancy reduces the attendant risks in this implementation.
a given noise current. For battery electronics system 100, the 35
parallel combination of the pull-up resistors is 2.375 kOhms, The aforementioned redundancy does not protect against
which causes approximately 2 mA of current to flow when the progressive degradation of the mechanical connections in the
supply voltage potential of 5V is applied across resistor 810. battery pack which may lead to multipoint failure of the
The maximum rated output current of fault signal transmitters harness, so host 105 must have a mechanism for detecting a
805 is 4 m.A, leaving enough margin to ensure that fault signal 40 single point failure of the fault signaling path and responding
transmitters 805 reach their intended output voltage under all appropriately (e.g., preventing continued operation of the
conditions. vehicle) if the fault signaling redundancy is broken. Since
Care must be taken in order to guarantee proper digital host 105 includes two separate fault receivers (receiver 905
signaling margins under all conditions so as to not generate and receiver 910), each of which should be able to detect a
false fault indications while being responsive to any actual 45 fault signal from any of the clients 110, host 105 may execute
fault signal to reliably signal the fault state using fault wire a self-test sequence to Verify the signaling redundancy. Since
225. For example, fault signal transmitter 805 may not be an the clients 110, may becommanded to activate the fault signal
open collector transmitter. One way to convert it for open manually via the daisy-chain data signals, host 105 can acti
collector operation is to use a diode 815 in series with an vate each fault signal of each client 110, in turn and verify that
output of fault signal transmitter 805. Having a cathode of 50 both of the fault receivers detect the fault signal. Only one
diode 815 coupled to this output and an anode coupled to fault client 110, need be activated to ensure the integrity of the
wire 225, low voltage on the output of fault signal transmitter redundant fault signaling wire all the way around its circular
805 tends to pull fault wire 225 towards ground, signaling a path, but activating each of the clients 110 will further test
fault to host 105. A sum of a maximum diode forward voltage each of the fault signal transmitters 805, and guarantee that
at the worst case pull-up resistor current plus the maximum 55 the fault signaling path is intact from each fault signal trans
guaranteed output voltage of fault signal transmitter 805 at mitter 805 to both receiver 905 and receiver 910.
the same current is less than a maximum input low Voltage of All the signal paths (i.e., serial data, power, and fault) are
receivers at host 105 which are intended to receive the fault routed through an environment having large changes in cur
signal. rent in very short periods of time as is common for a high
FIG. 9 illustrates a detailed general schematic of a redun 60 Voltage battery. Such an environment requires care when that
dancy portion of a fault signaling Subsystem for battery elec route includes a circular signal path as is implemented in
tronics system 100. Conceptually fault wire 225 achieves battery electronics system 100. The rapid current changes
redundancy using a circular topology, following the topology with respect to time create changing magnetic fields that
of a daisy-chain loop from the host to all the clients and back induce electromotive forces (EMFs) in any conductor that
to the host. The daisy-chain loop begins and ends at host 105 65 encloses a finite area. The EMF, without proper care, can
with fault wire 225 doing the same. Host 105 includes a first cause undesired current to flow in signal conductors or disrupt
fault receiver 905 and a second fault receiver 910 for receiv signals which are encoded as Voltages. A conventional solu
 US 8,861,337 B2
11 12
tion for EMF environments provides for use of differential necessary or desirable. Other filter types for filter 1105 may
signals for communication as they are unaffected by induced include some form of Pi filter to help address any high fre
EMF. quency signals appearing on fault wire 225 via capacitive
FIG. 10 illustrates a detailed general schematic of an inter coupling.
ference rejection portion of a fault signaling Subsystem for 5 FIG. 10 also illustrates power distribution for battery elec
battery electronics system 100. Signaling in battery electron tronics system 100. The disclosed daisy-chain bus uses active
ics system 100 does not use true differential signaling as that digital circuitry at each client 110, for voltage isolation. PCB
term is commonly understood. Fault in battery electronics 305 of each client 110 of the disclosed embodiment includes
system 100 is transmitted reliably using a single circularly isolators 320 that are implemented as a packaged digital
routed conductor in spite of induced EMF by making the fault 10 isolator semiconductor device solution (e.g., “chips' or inte
signal differential with respect to the power and ground con grated devices and the like). Battery electronics system 100
ductors. Isolated power wire 215 and isolated ground wire must distribute power to each client 110 in order to operate
220 follow the same path through the battery environment as isolators 320. Battery electronics system 100 implements a
fault wire 225. This means that these signal paths experience simple 5V DC distribution bus.
the same added EMF as fault wire 225. 15 The daisy-chain bus uses galvanic isolation between the
Battery electronics system 100 includes a daisy-chain iso data transmission medium and nodes originating the data
lator 1005 that defines and decouples a first end 1010 of the (i.e., host 105 and clients 110) therefore a mechanism must
daisy-chain loop from a second end 1015 of the daisy-chain be provided to power the “floating portions of each isolator
loop. Daisy-chain isolator 1005 is a high frequency isolator 320. In FIG. 3, isolator 320 includes a communications por
(e.g., a pair of inductors, chokes, or the like) that allows tion 335 (this is the floating portion) and a local portion 340.
induced EMFs to create a potential difference between first The local portion is powered by local power sources available
end 1010 and second end 1015. That potential difference does to each battery module or host. Communications portion 335
not cause disruptive current to flow in the daisy-chain loop needs to be powered by a “floating power source. A conve
because of the high-frequency isolation. nient form for such a power source is isolated DC-DC con
This potential difference without due consideration could 25 verter 1020. As shown, one isolated DC-DC converter 1020 is
be disruptive of digital signaling. In battery electronics sys used to power all nodes which requires that conductors be
tem 100, digital transmitters and digital receivers used at first used to distribute the requisite power to all nodes. An alter
end 1010 and second end 1015 are referenced to only power native would be to installa DC-DC converter at each node and
and ground potentials present at their respective ends, both power each node separately.
ends powered by an isolated power source (e.g., an isolated 30 Using the single isolated DC-DC converter 1020 requires
DC-DC converter 1020) as further described below. Further, installation and routing of power wire 215 and ground wire
the digital transmitters and receivers have no connection to 220 in a daisy-chain loop to each node. These wires are
the other end of the daisy-chain loop. For example, a digital Subject to the same mechanical design constraints, and poten
receiver 1025 for first end 1010 is electrically separated from tial EMI issues as described herein in the context of installa
a digital receiver 1025 for second end 1015. The signaling 35 tion and routing of fault wire 225. Similarly to the distribution
circuits of battery electronics system 100 all include a signal of fault wire 225, each wire is actually implemented as a
wire (e.g., fault wire 225) and a reference potential derived for single path rather than a single conductor. There is a power
a reference circuit. In this context, a reference circuit means path and a ground path, each path made up of spanning wire
those power and ground circuits Supplying the relevant trans segments joined to daisy-chain connectors 920 using crimp
mitter and receiver. Such signaling circuits of battery elec 40 terminals 925. Conductive traces on PCB 305 split and route
tronics system 100 do not experience any disruptive potential power and ground to each isolator 320.
from the EMF's present because the induced EMFs cause any The daisy-chain topology for the power and ground paths
potential to be added equally to a potential of the signal wire provides redundancy and EMI robustness similarly to the
and a potential of the reference circuit. discussion of the fault path of the daisy-chain loop. A single
In battery electronics system 100, each end of the daisy 45 break does not disable power and ground connections for the
chain loop is connected to the remainder of the host 105 nodes. Daisy-chain isolator 1005 alleviates any concerns
circuitry by a separate digital isolator, whose receivers and regarding EMF-induced current flow.
transmitters are allowed to assume the same reference poten However, in certain circumstances, adding daisy-chain iso
tial as their respective ends of the daisy-chain, and which lator 1005 can result in unwanted behavior. Specifically, the
serve to translate the received and transmitted signals of the 50 daisy-chain bus as a whole and the power conductors in
daisy-chain loop to and from the common reference potential particular can act as a single-ended transmission line with
of the remainder of host 105 circuitry. The daisy-chain ends of respect to the surrounding metallic elements of the battery
these digital isolators are powered by the daisy-chain power and battery enclosure. Terminating first end 1010 and second
and ground signals, and the other ends are powered by the end 1015 of this transmission line into a high impedance
common host power and ground signals used by the remain 55 element such as an daisy-chain isolator 1005 changes the
der of the host circuitry. modal structure of the transmission line, and opens up a
FIG. 11 illustrates an alternate configuration for host 105 lowest-order standing wave resonant mode at half of the
from that shown in FIG. 10 which adds a filter 1105 at each frequency of that experienced by a transmission line whose
end of the daisy-chain loop. In FIG. 10, under some condi ends are terminated to each other. Specifically, the lowest
tions it is possible for spurious potentials to appear on fault 60 order Standing wave mode that can exist on a circular trans
wire 225 with respect to the reference circuit. Such spurious mission line consists of a sine wave of current (or potential)
potentials can be attributed to many different causes but is which exhibits one complete period of spatial oscillation
possibly some type of capacitive coupling. Filter 1105 helps around the complete circuit of the transmission line: this wave
to reject such spurious potentials and is preferably imple will have a temporal frequency equal to the single ended
mented as Some type of low pass filter. Some implementa 65 frequency-dependent propagation Velocity of the transmis
tions may find that a simple RC low pass filter is sufficient, sion line at the frequency of resonance divided by the length
while for other implementations, a different filter may be of the line. A linear unterminated transmission line, on the
 US 8,861,337 B2
13 14
other hand, can experience a standing wave mode where FIG. 13 illustrates a detail schematic diagram of a wake
current (or potential) exhibits a half-period of spatial oscilla portion of client 110. As discussed herein, isolator 320
tion over the length of the line. This mode has a temporal addresses electrical noise and communication between
frequency equal to the frequency dependent propagation potential deltas in battery electronics system 100. Isolator 320
velocity of the single-ended mode of the line at the resonant has a drawback in the present application in that it, when
frequency divided by twice the length of the line. active, consumes power even when no data is actively being
If the mutual inductance of the data transmission conduc transmitted. To reduce power consumption, and improve bat
tors of the daisy-chain bus with respect to the power conduc tery standby life, local side of client 110, switches "OFF" the
tors considered as a whole were equal to the self-inductance 10
power it provides to isolator 320 when no data is being trans
of the power conductors, then the potential gradients experi acted. Consequently host 105 must have a mechanism to
enced by the power conductors during undriven oscillations command client 110 to restore local power when communi
of the daisy-chain terminated with high impedance in the cations are desired. That mechanism for determining a status
above described mode would be matched by identical poten of a host-provided power request signal is referred to herein
tial gradients along the data conductors, and no interfering 15 as “WAKE...” Client 110, periodically restores power so dedi
potentials would be introduced into the data signaling circuit. cated logic circuitry on the client can poll the power request
Unfortunately, since this is not the case, the data conductors signal to determine whether host 105 desires to initiate com
will experience Smaller potential gradients, and those data munications. Local power is restored for short intervals. This
signaling circuits closest to the current maximum of the reso ON/OFF cycle for isolator 320 is chosen to reduce an average
nance (the potential gradient maximum, which occurs in the power consumption to as low as possible without sacrificing
middle of the linear transmission line's lowest mode) will required performance.
experience induced potentials at the rate of the modal oscil Client 110, includes a pulse generator 1305 that provides a
lation. These potentials, if large enough, could disrupt digital polling signal. When communication with host 105 is not
signaling. Since the lower frequency rate of oscillation of the active, the polling signal determines a status of local power to
linear transmission line's 1st order mode will be closer to the 25 isolator 320. Periodically pulse generator 1305 asserts the
signal frequency and hence harder to reject via filtering than polling signal (e.g., signal is turned “ON”). When asserted,
the 1st order mode of the circular transmission line's reso the polling signal restores power to local side 340 of isolator
nance, it may be necessary to add damping to the above 320, enabling all transmitters and receivers. When not
described resonant mode of the daisy-chain if inductors are asserted (e.g., signal is turned "OFF"), local power is inter
added to reduce EMF-induced current flow. This can be 30 rupted which disables all transmitters and receivers.
accomplished by inserting resistors in parallel with the induc A two-input logic-OR device 1310 (e.g., an “OR” gate) has
tors or chokes, connecting one end of the daisy-chain to the a first input coupled to the polling signal of pulse generator
other and hence bleeding energy from the 1st (and all other 1305 and an output coupled to the power-enabling input of
odd order) resonant mode(s) when the potential difference is isolator 320. When the output of device 1310 is asserted,
at its maximum. This damping effect could also be had by 35 isolator 320 is enabled and when the output of device 1310 is
adding distributed or bulk series resistance at other points not asserted, isolator 320 is disabled. Whenever the polling
along the power conductors of the daisy-chain: but since the signal from pulse generator 1305 is asserted, the output of
object of the power conductors is to distribute DC power device 1310 is asserted.
across a distance, added series resistance would interfere with Isolator 320 includes a wake receiver channel 1315 that is
their function. In practice, the signaling rate of battery elec 40 coupled to a WAKE signal from host 105. (In the preferred
tronics system 100 is low enough that added damping is not embodiment, power wire 215 is coupled to an input of wake
necessary, since the lowpass filters that battery electronics receiver channel 1315 with the signal level of power wire 215
system 100 insert between each daisy-chain data conductor serving as the WAKE signal.) An output of wake receiver
and its associated data receiver are sufficient to reject the channel 1315 is provided to a second input of device 1310.
oscillatory potentials associated with the resonance mode 45 Whenever the output of wake receiver channel 1315 is
described above. However, for longer daisy-chains or sys asserted, the output of device 1310 is asserted. Two condi
tems requiring higher signaling rates. Such damping may tions must be true for the output of wake receiver channel
prove advantageous. 1315 to be asserted: 1) the WAKE signal must be asserted by
FIG. 12 illustrates a detailed schematic diagram of an host 105, and 2) wake receiver channel 1315 must be enabled.
oscillation damping portion of the power distribution imple 50 When wake receiver channel 1315 is disabled, the only way to
mentation for client 110. This oscillation damping mecha assert the output of device 1310 is for the polling signal to be
nism addresses a different type of parasitic oscillation which asserted. When wake receiver channel 1315 is enabled, asser
may arise in a power bus, namely differential oscillation of tion of either the polling signal or assertion of the WAKE
the two power conductors with respect to each other. In some signal from host 105 enables wake receiver channel 1315.
cases, a distributed reactance in the transmission lines (e.g., 55 Enabling wake receiver channel 1315 enables all channels of
power wire 215 and ground wire 220, here modeled as L.) isolator 320, and once enabled, host 105 maintains power to
may transmit differential voltage oscillations between power isolator 320 for as long as it asserts the WAKE signal. Deas
wire 215 and ground wire 220. Such oscillations involve sertion of the WAKE signal returns control of the status of
current flowing between many decoupling capacitors (repre powerfor isolators 320 to individual clients 110, which main
sented as C) associated with isolators 320. A damping 60 tain isolators 320 active for brief periods to maintain power
resistance (R) 1205 is added in series between each digital consumption at a minimum while periodically powering up
isolator 320 and power wire 215. Damping resistance 1205 isolator 320 to check on the status of the WAKE signal. By
dampens the oscillatory current associated with any parasitic knowing the maximum OFF period of the polling signal, host
transmission lines. An added benefit of damping resistance 105 need only maintain the WAKE signal active for this
1205 is that it prevents brief induced transients from reaching 65 duration to ensure that all isolators 320 in battery electronics
isolators 320 which protects them from potential sources of system 100 are enabled and ready to transmit and receive
damage. data.
 US 8,861,337 B2
15 16
Fault cannot operate at all if the WAKE signal is not dancy before both paths have succumbed to the failure, bat
asserted by host 105. The reason that this is acceptable it that tery electronics system 100 is able to prevent further opera
host 105, in this application, has only one response measure tion of the vehicle or signal to the driver that a repair is
that it can take when the fault signal is asserted: (e.g., it can necessary before a dangerous spontaneous loss of function
open the HV switches and disconnect the HV battery chain event can occur. Since battery electronics system 100 relies
from the outside environment). The programming of the hard on dual conduction paths for a signal or power current in order
ware and software of host 105 guarantees that it cannot close to achieve redundancy, implemented methods of wire break
these HV switches in the first place unless it can communicate detection (which here includes failure of mechanical connec
with the battery modules, and it can’t do that unless the tor terminals as well) rely on a pre-existent or additional
WAKE signal has been successfully asserted. So in short, 10 auxiliary test current flowing through the circuit to be moni
when the WAKE signal is de-asserted, battery host 105 has no tored to detect increases in the circuit resistance, caused by
access to the fault signals of the individual modules: but the broken or degraded conduction paths. These increases mani
host has then already placed the battery in the safest state that fest as a Voltage change, which can be easily detected. The
it can attain, so the presence of that fault signal would not circuit topologies used by battery electronics system 100
allow the battery to exhibit any useful safety behavior that it 15 feature low component count and implementation cost.
does not already exhibit. As an alternate implementation, the There are three types of conductors that battery electronics
fault signal could be combined with the polling signal to turn system 100 monitors for redundancy failure: a) data signals
on the local-side of isolator 320 whenever fault is asserted. (e.g., first serial data wire 205), b) FAULT signal conductor
This would lower the latency of host 105 receiving the fault (i.e., fault wire 225), and c) power conductors (e.g., POWER
signal when it turns on daisy-chain power. However, it would wire 215).
increase power consumption of the module in a fault state. The basic dual-redundant data signaling path consists of
Since undervoltage is one potential fault state, this could lead two electrically parallel wires running from a transmitter to a
to quicker overdischarge of battery modules. Furthermore, receiver. Because these signals contain information over a
the fault state would still not be present at host 105 until the moderately large range of frequencies (data is transmitted at
host turns on daisy-chain power, applying power to the com 25 ~1 Mbps), they need to present a relatively controlled imped
munication-side of the isolators. ance to the transmitter and receiver circuits for proper opera
The WAKE signal from host 105 may be more generally tion. Even though each data signal path itself is a single wire,
used to control other circuitry of client 110, For example, a battery electronics system 100 forms a differential data signal
regulator 1320 is coupled to the output of wake receiver path by reference to a parallel power conductor. The differ
channel 1315. When regulator 1320 has a particular state (for 30 ential data signal paths formed by each data conductor and its
instance, when an Enable input contained by that regulator associated power conductor should be minimally linked by
and connected to wake receiver channel 1315 is driven to a any changing magnetic fields present in the battery, to avoid
logically true state), processor 310 is powered on, and when introduction of spurious potentials into the signaling path.
regulator 1320 does not have the particular state, processor FIG. 14 illustrates ageneral schematic diagram of a portion
310 is powered off. In this way, the wake signal has complete 35 of a differential data signal implementation 1400 of battery
control over the power state of processor 310. Host 105 can electronics system 100. Differential data signal implementa
immediately power down processor 310 by de-asserting the tion 1400 includes a data signal transmitter 1405 generating a
WAKE signal. Power to processor 310 is restored whenever data signal that is divided on PCB 305 into a pair of redundant
isolator 320 is enabled and the WAKE signal is asserted. In data lines (first serial data wire 205 and second serial data
Some embodiments, wake functionality is integrated into 40 wire 210). These signals, with power wire 215 and ground
other components, such as for example, into isolator 320. wire 220 are configured into differential data signal imple
Battery electronics system 100 includes features for mentation 1440 where the data is transmitted to a receiver
increased reliability in the high energy Switching environ 1410 on downstream device.
ment of an EV. One of those features is strategic and effective De-linking the differential data signal paths is accom
redundancy of signal and power connections. Detection of 45 plished by twisting one of the signal conductors (e.g., first
failure of a redundant path is desirable. Battery electronics serial data wire 205) with positive power wire 215, and twist
system 100 performs wire break detection on the FAULT ing the other signaling conductor (second serial data wire
signal only by self-testing fault wire 225 at vehicle startup. 210) with negative power wire 220. Additionally, it is desir
Some embodiments will implement continuous monitoring able to reduce the amount of magnetic flux linked with the
of some or all broken wire failures. 50 loop formed by the two data conductors or the two power
Adding a redundant signal or power conduction path can conductors, and so it may be desirable to twist the two twisted
increase the reliability of a system. In a naive analysis, replac pairs with respect to each other.
ing a connection with a failure rate of Ti with a parallel FIG. 14 does not include any break detection circuitry.
combination of two identical connections with the same fail FIG. 15 illustrates a schematic diagram for a data conductor
ure rate will result in a total failure rate of m. However, this 55 break detection circuit topology 1500 that includes a mecha
analysis is based on the assumption of Zero correlation nism for data signal break detection (i.e., a “break detector”).
between failure events, and Poissonian occurrence. In reality, To achieve break detection, battery electronics system 100
failure events are not uncorrelated, and often arise from com uses the fact that the implemented data transmission protocol
mon causes at certain points in time. Such causes might guarantees a certain minimum duty cycle of the transmitted
include increased humidity, condensation, coolant leaks, 60 digital signal. The UART protocol includes a STOP bit for
sealing failure, periods of excessive vibration, clustered each transmitted byte, which means that there is at least some
manufacturing process failures, and the like. Many of these positive voltage present on the data bus every byte interval.
failure causes could lead to both halves of a dual redundant This means that the detection circuit does not need to work
system failing within a short time interval of each other, with the bus in both states: it can be designed to work with the
leading to a combined failure rate much closer tom than to m. 65 bus in the IDLE (STOP bit) state only. Also, because the
However, it is still likely that the failure events will not occur STOP and IDLE states are the same, the data bus is guaran
at exactly the same time. By detecting failure of the redun teed to spend most of its time in this STOP state, increasing
 US 8,861,337 B2
17 18
the chances that the break detection circuitry will detect any damped: this could cause activation of transistor 1505. Inser
connection failure, including transient failures. tion of a resistance in series with the redundant signaling line
The break detector of data conductor break detection cir could solve the problem.
cuit topology 1500 is based on the base-emitter junction of a FIG. 16 illustrates a schematic diagram for a conductor
single BJT transistor 1505, with a PN diode 1510 connected 5 break detection circuit topology 1600 as compared to topol
to the base-emitter junction in anti-parallel to allow signal ogy 1500 shown in FIG. 15. Topology 1600 includes addi
currents of both polarities to pass through the break detector. tional mechanisms for the break detector as well as three
Transistor 1505 exhibits predictable V values for a given level fault signaling to host 105. Additionally, FIG. 16
temperature range and test current, and likewise diode 1510 10 damping addition
includes
resistor
of an AC decoupling capacitor 1605 and a
1610 to the base-emitter junction of transis
exhibits predictable forward voltage (V) values for the same tor 1505. The fault signaling polarity of FIG.16 is opposite of
temperature range and current. Battery electronics system the fault signaling polarity shown in FIG.8. Use of a simple
100 guarantees that Small Voltage drops caused by a test inverter (e.g., another transistor or
current (I) through a good conductor will not cause false makes either scheme compatible withdigital other.
IC or the like)
failure signals by sizing test current I such that the Voltage 15 Topology 1600 includes the redundancy data and redun
drop incurred by expected resistances is much less than the dancy failure signal implementations described herein with a
minimum expected V. Moreover, because the maximum continuous fault break detection signal that allows host 105 to
Valand maximum V, are small compared to digital signaling centrally detect any failure of a data or signaling wire any
Voltages, the Voltage lost across the base-emitter junction where in battery electronics system 100.
should it carry the signaling current is Small. 2O Topology 1600 includes an emitter-follower transistor
The following discussion relates to transmitter 1405 gen 1615 in client 110, transistor 1615 having an emitter coupled
erating a high Voltage, which is guaranteed to occur at least to power wire 215, a base coupled to the collector of transistor
Some of the time as explained above. Under normal condi 1505, and a collector coupled to fault signal transmitter 805.
tions (no breaks in either data signaling conductor (i.e., first Host 105 includes a resistive divider 1620 (e.g., three series
serial data wire 205 or second serial data wire 210)), a circuit 25 resistors Rs-49 kS2, RS-5 kS2, and Rs-1 kS2), a window
formed by the two signaling conductors keeps the base-emit comparator 1625, and a fault detector 1630 all coupled to both
ter voltage of the transistor 1505 equal to zero. In the event ends of fault wire 225.
that the signaling circuit is broken at either a first position Transistor 1615 applies a voltage to fault wire 225 when
1515 in first serial data wire 205 or a second position 1520 in ever any data wire fails. This Voltage is approximately one
second serial data wire 210, the current I, which normally 30 diode drop (e.g., -0.6V). When a fault wire 225 fails, resistive
flows from an output of transmitter 1405 through the signal divider 1620 (which also acts as pull-down resistor R) gen
ing circuit to ground, will be re-routed so that it flows through erates a similar voltage level at a test node 1635. Window
the base-emitter junction of transistor 1505. As long as the comparator 1625 monitors test node 1635 and when the volt
DC current gain of transistor 1505 is sufficiently high, this age is at level that indicates a break, window comparator 1625
base-emitter current causes transistor 1505 to conduct. The 35 asserts a broken wire signal. (In this case, window comparator
conduction current produces a Voltage across a pull-down 1625 asserts the broken wire signal when the voltage at test
resistor R, that is available at an output node (OUT). Nor node 1635 is not between 0.1 V and 0.25V.) Assertion of the
mally resistor R, is chosen to have a large enough value that broken wire signal is a warning signal that data or fault wire
the voltage across it will rise until transistor 1505 enters redundancy has been lost somewhere in battery electronics
saturation, at which point the Voltage at the OUT node equals 40 system 100 and is available at host 105.
a transmitter output Voltage minus a saturation Voltage of Window comparator 1625 has the additional function of
transistor 1505. The presence of voltage at the OUT node is an monitoring the fault wire for short circuits to one of the two
indication that the signaling circuit has failed, and that redun power conductors. Any accidental connection, or “short of
dancy is lost. OUT may be routed to a digital input of a the fault wire, can impede its normal function. Since the fault
microcontroller or other integrated circuit, where it may be 45 wire signals potentially dangerous conditions by changing its
monitored. Alternatively OUT may be connected to the fault potential (from a low potential to a high potential, in the case
signaling line in a three-level signaling scheme, discussed of topology 1600), any short that connects the fault wire
herein. Host 105 is able to monitor all data signaling wire electrically to a potential that is the same as that potential
paths at a central location by monitoring the Voltage on which an operable fault wire normally uses to signal the
FAULT wire 225. 50 absence of dangerous conditions can mask the true presence
It should be noted that the details of the implementation of of dangerous conditions by preventing the fault wire from
FIG. 15 are general in nature with exact implementation attaining that potential which is normally used to signal them.
details depending on the application requirements. For In the embodiment described in topology 1600, connection of
instance, although the DC voltage drop across the intact sig the fault wire to the ground conductor of the daisy-chain, or to
naling conductors in this topology will never be enough to 55 any metallic object which is at or below the potential of the
trigger conduction of the B-E junction, transient AC Voltages ground conductor, can cause the potentially harmful condi
may develop across the signaling conductors when transmit tion described above. It can be seen that the resistive divider
ter 1405 changes its digital output state. Specifically, an 1620 will cause the fault signal to normally attain a potential
inductance in the circuit formed by the two data conductors that is equal to neither the power conductor nor the ground
on longer cable runs can allow this Voltage to develop. In 60 conductor, but is somewhere in between. In the described
order to address this issue, a capacitor may be installed in topology, the resistive divider 1620 is designed so that the
parallel with the B-E junction. This will provide a conduction fault wire will normally attain a potential which is between
path for AC transients, while still allowing the DC component the two thresholds of the window comparator, and preferably
oft to activate transistor 1505 in the event a signaling path equidistant from them. In topology 1600, this potential that
interruption occurs. Care should be taken that any resonant 65 the fault wire normally attains when no faults or broken wires
circuit formed by Such a capacitor and the inductance of the are signaled is 0.175V. By implementing a window compara
circuit comprising the two data conductors is not under tor 1625 that can detect when the potential on the fault wire
 US 8,861,337 B2
19 20
falls below a lower threshold, here depicted as 0.1V, the FIG. 18 illustrates a detailed general schematic of an inter
window comparator may signal not only when the fault wire ference rejection portion of a signaling Subsystem for a bat
has been broken as described above, but also when the fault tery communications system similar to FIG. 10 with addi
wire has short-circuited to ground, and is incapable of signal tional optional details. Explicitly included in FIG. 18 is use of
ing a fault. This condition of “shorted to ground may be a first digital isolator 1805 at first location 1010 and a second
considered potentially more dangerous than a broken fault digital isolator 1805 at second location 1015 for redundant
wire, since in the first case no fault at all may be signaled multistate signaling (e.g., FAULT) and data communications
while in the latter case its probable that a fault signal would with respect to the communications master of host 105. First
still reach one of the two intended redundant receivers. There digital isolator 1805, supports FAULT signaling and trans
fore, an implementation may desire to replace the window 10 mission of data (DATA(OUT)) to clients 110 and second
comparator 1625 depicted herein with two separate level digital isolator 1805, supports FAULT signaling and receipt
comparators, one of which signals passage of the fault signal of data (DATA(IN)) from clients 110. As noted, in some
through an upper threshold, and the other through a lower implementations it is desired to have two or more daisy-chain
threshold. These two thresholds described correspond to the loops for data communications but to simplify FIG. 18, one
thresholds of 0.1V and 0.25V depicted in topology 1600 and 15 data daisy-chain loop is illustrated. Also illustrated is a pro
associated with window comparator 1625. The upper thresh cessor 1810 for each client (similar to processor 310) receiv
old comparator would continue to generate a “BROKEN ing host-initiated communications from an upstream commu
WIRE signal as is generated by the window comparator in nications device and transmitting to a downstream
topology 1600, while the lower comparator would now gen communications device over the daisy-chain loop and ending
erate a “SHORTED FAULT WIRE” signal: battery host 105 back at host 105.
would then be able to react appropriately to these two differ FIG. 19 illustrates an alternate configuration for host 105
ent conditions. from that shown in FIG. 11 which includes a first host isolated
Should any client 110 generate a true FAULT signal from power supply 1905 at first location 1010 and adds a second
fault signal transmitter 805, voltage on fault wire 225 rises to host isolated power supply 1910 at second location 1015.
a greater level and the voltage attest node 1635 also rises. The 25 Each client 110 is able to receive power from both power
voltage at test node 1635 is monitored by fault detector 1630 Supplies, and a single break in one of the conductors does not
and when it rises above a second threshold (e.g., 0.25V), fault remove operating power as one of the power Supplies will
detector 1630 asserts a FAULT signal. The FAULT signal at always remain coupled. This powers redundant multistate
host 105 is an alert that one of the N clients 110, has asserted signaling (e.g., FAULT) at both locations as well.
a true FAULT signal. 30 FIG. 20 illustrates an alternate configuration for host 105
If necessary or desirable, it is possible to incorporate wire from that shown in FIG. 19. Included in this implementation
break detection on the power supply conductors. FIG. 17 is use of the simplified fault receiver mechanism of FIG.9 for
illustrates a schematic diagram for a power Supply conductor the redundant second fault receiver function. This simplified
break detection circuit topology 1700. One way to achieve fault receiver arrangement uses a single power Supply 1020
Such wire break detection is by completing the redundant 35 and one ground-referenced fault receiver (e.g., receiver 910)
power supply path with a pair of diodes (a first diode 1705 and eliminates daisy-chain isolator 1005.
connecting the two ends of the power connections, and a The system and methods above has been described in gen
second diode 1710 connecting the two ends of the ground eral terms as an aid to understanding details of preferred
connections). These diodes will normally have no voltage embodiments of the present invention. In the description
across them, because the main conduction path (the path from 40 herein, numerous specific details are provided, such as
DC-DC converter through daisy-chain isolator 1005 and examples of components and/or methods, to provide a thor
around the loop) will Supply current to the entire daisy-chain ough understanding of embodiments of the present invention.
with little voltage drop. If either power conductor is broken, For example, in the application the term “processor is used to
its associated diode will conduct current, and the forward not only refer to microprocessors, microcontrollers, and other
Voltage across this diode may be measured by a comparison 45 similar organizations of electronic circuitry, but includes for
circuit 1715. A single differential comparator 1720 would be purposes of this application an electronic circuit capable of
Sufficient to make the measurements of both diode Voltages. A executing instructions accessed from a memory. Data pro
few resistors (e.g., R and R, R slightly greater than R for cessing system is sometimes used hereinto explicitly connote
example R 50 kS2 and R 49 kS2) and capacitors (e.g., a this broader context, but absent specific context to the con
pair of diode bypass transistors C and a pair offilter capaci 50 trary, uses of “processor and similar are not limited to these
tors C) would be necessary to suppress momentary AC volt particular arrangements of electronic circuitry. Some features
ages which could be caused by reactive impedance of the and benefits of the present invention are realized in such
power supply conductor loop or induced voltage from EMFs. modes and are not required in every case. One skilled in the
Generally, a resonant circuit formed between the two diode relevant art will recognize, however, that an embodiment of
bypass capacitors and the power conductor loop will be found 55 the invention can be practiced without one or more of the
to be strongly under-damped. A series C or RC circuit may specific details, or with other apparatus, Systems, assemblies,
need to be added between the cathode of the diode on the methods, components, materials, parts, and/or the like. In
power-loop and the anode of the ground-loop diode. This pair other instances, well-known structures, materials, or opera
of diodes could be replaced by base-emitter junctions of tions are not specifically shown or described in detail to avoid
bipolar junction transistors, as was done for the data break 60 obscuring aspects of embodiments of the present invention.
detection discussed herein. It will likely be found that BJTs Reference throughout this specification to “one embodi
whose BE junctions are rated for the necessary current to ment”, “an embodiment, or “a specific embodiment’ means
Supply the multiple digital isolators required by the daisy that a particular feature, structure, or characteristic described
chain loop are hard to come by, and therefor unlikely to be in connection with the embodiment is included in at least one
commodity items, and hence a more expensive Solution that 65 embodiment of the present invention and not necessarily in all
typically renders it unsuitable for battery electronics system embodiments. Thus, respective appearances of the phrases
100 of an EV. “in one embodiment”, “in an embodiment’, or “in a specific
 US 8,861,337 B2
21 22
embodiment in various places throughout this specification single data conductor daisy-chain loop originates and
are not necessarily referring to the same embodiment. Fur terminates at said host and wherein said first single data
thermore, the particular features, structures, or characteristics conductor daisy chain-loop comprises said number N+1
of any specific embodiment of the present invention may be of conductor segments, each particular one conductor
combined in any Suitable manner with one or more other 5 segment of said first single data conductor daisy-chain
embodiments. It is to be understood that other variations and loop communicating an upstream communications
modifications of the embodiments of the present invention device to a downstream communications device;
described and illustrated herein are possible in light of the wherein said first single data conductor daisy-chain loop is
teachings herein and are to be considered as part of the spirit routed through a region of the electrically noisy envi
and scope of the present invention. 10 ronment having a time-varying magnetic field capable of
It will also be appreciated that one or more of the elements generating a noise induced signal having a peak magni
depicted in the drawings/figures can also be implemented in a tude on an order of a threshold magnitude of data signals
more separated or integrated manner, or even removed or transmitted over said first single data conductor daisy
rendered as inoperable in certain cases, as is useful in accor chain loop, said first single data conductor daisy-chain
dance with a particular application. 15 loop communicating said communications devices in a
Additionally, any signal arrows in the drawings/Figures first communications order.
should be considered only as exemplary, and not limiting, 2. The data communications system of claim 1 further
unless otherwise specifically noted. Furthermore, the term comprising a second single data conductor daisy-chain loop
“or as used herein is generally intended to mean “and/or wherein said second single data conductor daisy-chain loop
unless otherwise indicated. Combinations of components or originates and terminates at said host and wherein said second
steps will also be considered as being noted, where terminol single data conductor daisy chain-loop comprises said num
ogy is foreseen as rendering the ability to separate or combine ber N+1 of conductor segments, each particular one conduc
is unclear. tor segment of said second single data conductor daisy-chain
As used in the description herein and throughout the claims loop communicating an upstream communications device to
that follow, “a”, “an', and “the includes plural references 25 a downstream communications device.
unless the context clearly dictates otherwise. Also, as used in 3. The data communications system of claim 2 wherein
the description herein and throughout the claims that follow, said first and second single data conductor daisy-chain loops
the meaning of “in” includes “in” and “on” unless the context are co-routed through the region of the electrically noisy
clearly dictates otherwise. environment, and wherein the first communications order
The foregoing description of illustrated embodiments of 30 matches a second communications order of said second
the present invention, including what is described in the single data conductor daisy-chain loop.
Abstract, is not intended to be exhaustive or to limit the 4. The data communications system of claim 1 wherein
invention to the precise forms disclosed herein. While spe each communications device includes a printed circuit board
cific embodiments of, and examples for, the invention are (PCB) having a connector with a plurality of electrical cou
described herein for illustrative purposes only, various 35 plers, a plurality of PCB components, and a plurality of traces
equivalent modifications are possible within the spirit and communicating said plurality of electrical couplers to one or
scope of the present invention, as those skilled in the relevant more of said plurality of PCB components, and wherein a
art will recognize and appreciate. As indicated, these modi particular one conductor segment of said first single data
fications may be made to the present invention in light of the conductor daisy-chain loop joins a first particular one coupler
foregoing description of illustrated embodiments of the 40 of said connector of said upstream communications device to
present invention and are to be included within the spirit and a first particular one coupler of said connector of said down
Scope of the present invention. stream communications device.
Thus, while the present invention has been described 5. The data communications system of claim 4 wherein
herein with reference to particular embodiments thereof, a said plurality of PCB components includes a data processing
latitude of modification, various changes and Substitutions 45 system and wherein each said PCB includes an isolator elec
are intended in the foregoing disclosures, and it will be appre trically disposed between said connector and said data pro
ciated that in Some instances some features of embodiments cessing system and wherein for each particular PCB said
of the invention will be employed without a corresponding isolator includes a plurality of isolator channels, one isolator
use of other features without departing from the scope and channel associated with each coupler of said plurality of
spirit of the invention as set forth. Therefore, many modifi 50 couplers of said connector.
cations may be made to adapta particular situation or material 6. The data communications system of claim 5 wherein the
to the essential scope and spirit of the present invention. It is electrically noisy environment includes an electric Vehicle
intended that the invention not be limited to the particular including an electric propulsion motor generating a time
terms used in following claims and/or to the particular varying magnetic field, said electric Vehicle having an energy
embodiment disclosed as the best mode contemplated for 55 storage system that includes a management system and a
carrying out this invention, but that the invention will include battery pack comprised of said number N of inter-coupled
any and all embodiments and equivalents falling within the battery modules with said host associated with said manage
Scope of the appended claims. Thus, the scope of the inven ment system and each said client associated with one of said
tion is to be determined solely by the appended claims. inter-coupled battery modules and wherein each said PCB
What is claimed as new and desired to be protected by 60 includes an electrical interface, said electrical interface elec
Letters Patent of the United States is: trically communicating said PCB to said associated battery
1. A data communications system in an electrically noisy module.
environment, comprising: 7. The data communication system of claim 6 further com
a plurality of communication devices, said communication prising a multi-chip module having a plurality of semicon
devices including a host and a number N of clients, N 65 ductor dies packaged into a single semiconductor package
greater than 1, communicated to said host using a first wherein said isolator is implemented on one or more separate
single data conductor daisy-chain loop wherein said first distinct semiconductor dies disposed within said single semi
 US 8,861,337 B2
23 24
conductor package and wherein at least a portion of said frequency-dependent impedance coupling said first location
electrical interface is implemented on one or more separate to said second location, said frequency-dependent impedance
distinct semiconductor dies disposed within said single semi passing said direct current from said first location to said
conductor package. second location Sufficient to continue to operate said function
8. The data communications system of claim 6 wherein 5 of said clients from said second location while isolating said
said electrical interface includes said data processing system. alternating current noise signals at one said location from the
9. The data communications system of claim 6 wherein other said location.
said electrical interface is coupled to said data processing 17. The data communications of claim 16 wherein a serial
system. data transmission on said first single data conductor daisy
10. The data communications system of claim 2 wherein 10 chain loop is referenced to a first particular one power daisy
each communications device includes a printed circuit board chain loop producing a pseudo-differential serial data trans
(PCB) having a connector with a plurality of electrical cou mission.
plers, a plurality of PCB components, and a plurality of traces 18. The data communications of claim 17 wherein said
communicating said plurality of electrical couplers to one or particular one power daisy-chain loop is co-routed with said
more of said plurality of PCB components, wherein a particu 15 first single data conductor daisy-chain loop along a transmis
lar one conductor segment of said first single data conductor sion path through a region of the electrically noisy environ
daisy-chain loop joins a first particular one downstream cou ment having a time-varying magnetic field capable of gener
pler of said connector of said upstream communications ating an induced noise signal having a peak magnitude on an
device to a first particular one upstream coupler of said con order of a threshold magnitude of data signals transmitted
nector of said downstream communications device and over said first single data conductor daisy-chain loop wherein
wherein a particular one conductor segment of said second said first single data conductor daisy-chain loop and said
single data conductor daisy-chain loop joins a second particu particular one power daisy-chain loop are twisted together at
lar one downstream coupler of said connector of said least over a portion of said transmission path.
upstream communications device to a second particular one 19. The data communications system of claim 2 further
upstream coupler of said connector of said downstream com 25 comprising a single conductor first Voltage power daisy-chain
munications device. loop and a single conductor second Voltage power daisy
11. The data communications system of claim 10 wherein, chain loop, each said power daisy-chain loop extending from
for each said PCB, said plurality of couplers include said first a first location on said host to a second location on said host
upstream coupler, said second upstream coupler, said first with each client coupled to each power daisy-chain loop
downstream coupler, and said second downstream coupler, 30 between said locations.
and wherein said plurality of traces include an upstream data 20. The data communications system of claim 19 wherein
trace coupled to said first and second upstream couplers and said host includes a power supply coupled to said first loca
a downstream data trace coupled to said first and second tions of each said power daisy-chain loops.
downstream couplers. 21. The data communications system of claim 20 wherein
12. The data communications system of claim 11 wherein 35 said power Supply includes an isolated direct current to direct
said plurality of PCB components includes a data processing current power converter (DC-DC converter).
system and wherein each said PCB includes an isolator hav 22. The data communications system of claim 20 wherein
ing a first isolator channel and a second isolator channel and the electrically noisy environment induces alternating current
each said isolator channel enabling a transmission from a noise signals between said locations, wherein said power
channel input port to a channel output port when active and 40 Supply provides a direct current to each said client using said
disabling said transmission when inactive with said channel single conductor power daisy-chain loops to operate a func
input port of said first isolator channel coupled to said tion of each said client, and wherein said host includes a
upstream data trace, said channel output port of said first frequency-dependent impedance coupling said first location
isolator channel coupled to said data processing system, said to said second location, said frequency-dependent impedance
channel input port of said second isolator channel coupled to 45 passing said direct current from said first location to said
said data processing system, and said channel output port of second location Sufficient to continue to operate said function
said second isolator channel coupled to said downstream data of said clients from said second location while isolating said
trace. alternating current noise signals at one said location from the
13. The data communications system of claim 1 further other said location.
comprising a single conductor first Voltage power daisy-chain 50 23. The data communications of claim 22 wherein a first
loop and a single conductor second Voltage power daisy serial data transmission on said first single data conductor
chain loop, each said power daisy-chain loop extending from daisy-chain loop is referenced to a first particular one power
a first location on said host to a second location on said host daisy-chain loop producing a first pseudo-differential serial
with each client coupled to each power daisy-chain loop data transmission and wherein a second serial data transmis
between said locations. 55 sion on said second single data conductor daisy-chain loop is
14. The data communications system of claim 13 wherein referenced to a second particular one power daisy-chain loop
said host includes a power Supply coupled to said first loca producing a second pseudo-differential serial data transmis
tions of each said power daisy-chain loops. Sion.
15. The data communications system of claim 14 wherein 24. The data communications of claim 23 wherein said first
said power Supply includes an isolated direct current to direct 60 particular one power daisy-chain loop is co-routed with said
current power converter (DC-DC converter). first single data conductor daisy-chain loop along a first trans
16. The data communications system of claim 14 wherein mission path through the region of the electrically noisy envi
the electrically noisy environment induces alternating current ronment, wherein said first single data conductor daisy-chain
noise signals between said locations, wherein said power loop and said first particular one power daisy-chain loop are
Supply provides a direct current to each said client using said 65 twisted together at least over a portion of said first transmis
single conductor power daisy-chain loops to operate a func sion path forming a first twisted conductor pair and wherein
tion of each said client, and wherein said host includes a said second particular one power daisy-chain loop is co
 US 8,861,337 B2
25 26
routed with said second single data conductor daisy-chain originates at said first location and terminates at said second
loop along a second transmission path through another region location and wherein said second single data conductor daisy
of the electrically noisy environment having another time chain-loop comprises a first conductor segment communicat
varying magnetic field capable of generating another noise ing said first location to said client and a second conductor
induced signal having another noise magnitude on an order of 5 segment communicating said client to said second location.
a data magnitude of data signals over said second single data 29. A data communications method for a plurality of com
conductor daisy-chain loop wherein said second single data
conductor daisy-chain loop and said second particular one munication devices including a host and a number N, N>=1,
power daisy-chain loop are twisted together at least over a of clients in an electrically noisy environment, comprising:
portion of said second transmission path forming a second 10 a) transmitting a data packet using a first serial data trans
twisted conductor pair. mission through the electrically noisy environment over
25. The data communications of claim 24 wherein said first a first single data conductor daisy-chain loop referenced
transmission path and said second transmission path are at to a single conductor first Voltage power daisy-chain
least partially co-routed through the electrically noisy envi loop as a first pseudo-differential signal with said loop
ronmentata co-route and wherein said first twisted conductor 15 extending from the host to each client and back to the
pair is twisted with said second twisted conductor pair along host, wherein said first single data conductor daisy
a portion of said co-route. chain loop is routed through a region of the electrically
26. The data communications system of claim 19 wherein noisy environment having a time-varying magnetic field
said client includes a power Supply coupled to each of said capable of generating a noise induced signal having a
power daisy-chain loops. peak magnitude on an order of a threshold magnitude of
27. A data communications system in an electrically noisy data signals transmitted over said first single data con
environment, comprising: ductor daisy-chain loop, said first single data conductor
a host, and a client communicated to said host using a first daisy-chain loop communicating said communications
single data conductor daisy-chain loop wherein said first devices in a first communications order,
single data conductor daisy-chain loop originates at a 25 b) receiving, at each client, said data packet over said first
first location at said host and terminates at a second
single data conductor daisy-chain loop; and
location at said host and wherein said first single data
conductor daisy chain-loop comprises a first conductor c) transmitting, from each client, said data packet over said
segment communicating said first location to said client first single data conductor daisy-chain loop.
and a second conductor segment communicating said 30 30. The data communications method of claim 29 further
client to said second location; comprising:
wherein said first single data conductor daisy-chain loop is d) receiving said data packet using a second serial data
routed through a region of the electrically noisy envi transmission through the electrically noisy environment
ronment having a time-varying magnetic field capable of over a second single data conductor daisy-chain loop
generating a noise induced signal having a peak magni 35 referenced to a single conductor second Voltage power
tude on an order of a threshold magnitude of data signals daisy-chain loop as a second pseudo-differential signal
transmitted over said first single data conductor daisy with said second single data conductor daisy-chain loop
chain loop, said first single data conductor daisy-chain extending from the host to each client and back to the
loop communicating said host and client in a first com host; and
munications order. 40
28. The data communications system of claim 27 further e) transmitting, at each client, said data packet over said
comprising a second single data conductor daisy-chain loop second single data conductor daisy-chain loop.
wherein said second single data conductor daisy-chain loop k k k k k