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Lab 3 - Tutorial

This document provides instructions for a lab tutorial on combinational digital devices. The goal is to investigate multiplexers, adders, subtractors, and demultiplexers in LTspice. The objectives are to build circuits for a 4:1 multiplexer, various half and full adders, half and full subtractors, and a 1:4 demultiplexer. Templates are provided for building logic gates in LTspice, including defining voltage sources as inputs and labeling the output. Students are tasked with constructing the block diagrams for these problems and obtaining the results as graphs. References for further information are also included.

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Omar Kadirov
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41 views8 pages

Lab 3 - Tutorial

This document provides instructions for a lab tutorial on combinational digital devices. The goal is to investigate multiplexers, adders, subtractors, and demultiplexers in LTspice. The objectives are to build circuits for a 4:1 multiplexer, various half and full adders, half and full subtractors, and a 1:4 demultiplexer. Templates are provided for building logic gates in LTspice, including defining voltage sources as inputs and labeling the output. Students are tasked with constructing the block diagrams for these problems and obtaining the results as graphs. References for further information are also included.

Uploaded by

Omar Kadirov
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lab tutorials by Dana Utebayeva

OLP3206 - Fundamentals of Logic Design


Lab Work 3
Title: “Combinational digital devices: Multiplexers, Adders, Subtractors,
and Demultiplexers”.

Goal of the work: this work aims to investigate the Combinational digital
devices: Multiplexers, Adders, Subtractors, and Demultiplexers in LTspice.

Objectives:
1. Building combinational circuits of “4:1” MUX [2] in LTspice.
2. Building combinational circuits of 4 types of Half Adders and 2 types of
Full Adders [1, Chapter 4, pages 116-121 ] in LTspice.
3. Building combinational circuits of Half and Full Subtractors [1, pages 121-
123] in LTspice.
4. Building combinational circuits of “1:4” DEMUX [3] in LTspice.

Template for building digital devices in LTspice.

1) Please, open the program LTspice and new draft by clicking “New Schematic”as below and
save it as “Logic Gate AND”.

Figure 1a – Opening new Draft in LTSpice


Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design

Figure 1b – Opening components

2) Please, open components and type on searcher “Voltage” to obtain two sources. At the second
step click right side of voltage source to give their “Parameters” through the button called
“Advanced”.

Figure 2a – Opening Voltage Sources


Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design

Figure 2b – Voltage source Parameters

3) Please, give the Parameters for Voltage Source “V1” as in Figure 3 and rename it as your
Logic Gate’s input name, for example “S”.

Figure 3a – Voltage Parameters for first Input of Logic Gate.

Please, give the Parameters for Voltage 2 as in figure 3b.


Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design

Figure 3b – Voltage Parameters for second Input of Logic Gate.

4) Please, open “Components” again and choose the LOGIC GATEW AND, Figure 4.

Figure 4 – Logic Gate AND


Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design
5) Please, open OUTPUT from“Label Net” as in Figure 5a, give its parameters as in Figure 5b.

Figure 5a – Label Net

Figure 5a – Label Net Parameters


Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design

Figure 5c

6) Please, rename all components and compile the scheme as in Figure 6.

Figure 6 - Logic Gate “AND” and its results in LTSpice


Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design

Tasks:

Please, build the combinational circuits for the following Problems below.
Please, construct the block diagrams in LTspice for the given Problems and obtain
their results in the form of graphs

1. “4:1” MUX [2] in LTspice.

2. 4 types of Half Adders and 2 types of Full Adders [1, Chapter 4, pages 116-
121 ] in LTspice.

3. Half and Full Subtractors [1, pages 121-123] in LTspice.

4. “1:4” DEMUX [3] in LTspice.

This is the end of the Lab work 3 Please, do not forget to write a conclusion after completing
the report. Your Report’s quality decides your Grade points.
Lab tutorials by Dana Utebayeva
OLP3206 - Fundamentals of Logic Design
References:

1. Tutorial book for Practice and SIS classes.pdf


https://dl.iitu.edu.kz/mod/folder/view.php?id=255562
2. Lecture 6 Dana Utebayeva
3. Lecture 7 Dana Utebayeva

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