Class 1
Class 1
UNIT-I
Introduction:
The holes are majority charge carriers and electrons are minority charge carriers in P-Type and
electrons are majority and holes are minority charge carriers in case of N-Type Semiconductor.
Construction: +
Starting with a piece of intrinsic semiconductor and divide it into two halves, one half is
doped with any tri-valent element such as Boron, Aluminum etc., to form P-Type semiconductor,
in which the holes are majority charge carriers and electrons are minority charge carriers. Other
half is doped with any penta-valent element such as phosphorus, arsenic etc., to form N-Type
Semiconductor, in which the electrons are majority charge carriers and holes are minority charge
carriers.
The Junction or a line dividing the P-Type and N-Type is called P-N Junction. Metallic
contact is connected to P-Type and N-Type material to get terminals for the device called
Electrodes such as Anode and Cathode, this device is called P-N Junction Diode or Semiconductor
diode or simply Diode as shown in figure(1).
Working:
The working principle can be studied in three different operations or Biasing arrangements
as follows.
occupies holes from the P side. Similarly holes in the P side attract electrons in the N side. This
results forming a thin layer near the P-N Junction due to loosing electrons near the junction from
the N side and holes near the junction from the P side. This layer or region is called depletion layer
and it acts as an intrinsic semiconductor as shown in figure (2).
V-I Characteristics:
Figure (5) shows the V-I Characteristics of P-N Junction diode, VS is the biasing voltage,
ID is the Diode Current and VBD is the Break down voltage. The leakage current flows through the
device under reverse biasing due to minority charge carriers. Under forward biasing and biasing
voltage is greater than or equal to the threshold voltage, the device then acts as a conducting
material.
Or
𝐓
𝑽𝑻 =
𝟏𝟏𝟔𝟎𝟎
Equivalent Circuit of diode:
1. DC Equivalent Circuit.
The DC equivalent circuit of a diode under reverse biasing is an open circuit or Reverse
Resistance Rr(typically in terms of MΩ) shown in figure (6a), and under forward biasing as shown
in figure (6). Where Rf is the forward resistance of the diode, VON is the voltage drop across the
diode under Conduction State (VON=0.7V for Silicon diodes and VON=0.3V for Germanium
Diodes).
2. AC Equivalent Circuit.
The AC equivalent circuit of a diode under reverse biasing and for forward biasing is the
parallel connection of a Resistor and a Capacitor as shown in figure (7a) and figure (7b)
respectively.
Under reverse biasing the depletion layer width increases and acts as a parallel plate
capacitor with dielectric, hence the diode will be considered as a capacitor called Transition
Capacitance/ Junction Capacitance/ Space charge Capacitance.
The reverse saturation current doubles for every 10oC rise in Temperature.
𝒕𝟐 −𝒕𝟏
i.e., 𝑰’𝑶 = 𝑰𝑶 𝒙 𝟐( 𝟏𝟎
)
;
where,
IO’ is the reverse saturation current at temperature t2 and
IO is the reverse saturation current at temperature t1.
The forward voltage drop across the diode reduces 2.56mV for every 1oC rise in
temperature.
i.e., 𝑽′𝑭 = VF − 𝟐. 𝟓𝟔𝒎(𝒕𝟐 − 𝒕𝟏 ).
Where,
VF’ is the voltage drop across the diode at t2 and
VF is the voltage drop across the diode at t1
Rectifiers:
Rectifiers are the electronics circuits that convert AC quantity into to DC quantity. This
can be achieved by using unidirectional conduction devices like diode.
Depending on the conduction angle the rectifier circuits are classified into two types, they
are,
1. Half wave Rectifier and
2. Full wave Rectifier.
The Full wave Rectifiers are further classified (based on number of diodes using) into two
types, they are,
a. Center Tap Transformer (Two Diodes) full wave rectifier and
b. Bridge Type (Four Diodes) full wave rectifier.
Circuit Diagram:
Figure (8) shows the circuit diagram of a half wave rectifier, where D is a diode (Assume Diode
is ideal), RL is the load resistor, input is an AC signal and output is the Pulsating DC Signal.
Explanation:
During every Positive half cycle diode D conducts and acts as a short circuit, hence the
current flows through the Load resistor and is proportional to the input voltage according to Ohm’s
law, therefore the voltage across RL is same as input signal.
i.e., 𝑽𝒐 = 𝑽𝒊
During every negative half cycle diode D does not conducts and acts as an open circuit and
no current flows through the load element, hence the voltage across RL is zero.
i.e., 𝑽𝒐 = 𝟎
Waveforms:
Figure (9) shows the waveforms of an half wave rectifier circuit, and it can be observed that the
output is only half cycle for every complete cycle input and also pulsating DC (Ripples/ some AC
Components also present), i.e., not a pure DC.
Figure (9): Input and Output Waveforms of a Half wave Rectifier circuit.
Mathematical expressions:
The output of half wave rectifier circuit is irregular in nature and hence, need to analyze the circuit
for average DC and AC voltage or current along with the efficiency and ripple factor.
Transformer voltage and current is given by,
𝒗(𝒕) = 𝒗𝒎 𝒔𝒊𝒏𝝎𝒕.
𝒊(𝒕) = 𝒊𝒎 𝒔𝒊𝒏𝝎𝒕
Therefore
1. Average DC Voltage.
𝟏 𝑻
𝑽𝒅𝒄 = ∫ 𝒗(𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑽𝒅𝒄 = ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑽𝒅𝒄 = ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 .
𝟐𝝅 𝟎 𝒎 𝟐𝝅 𝝅 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑽𝒅𝒄 = ∫ 𝒗𝒎 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝟎 𝒅𝝎𝒕 .
𝟐𝝅 𝟎 𝟐𝝅 𝝅
𝒗𝒎
𝑽𝒅𝒄 = [−𝒄𝒐𝒔𝝎𝒕]𝝅𝟎
𝟐𝝅
𝒗𝒎
𝑽𝒅𝒄 = 𝒙𝟐
𝟐𝝅
𝒗𝒎
𝑽𝒅𝒄 =
𝝅
2. Average DC Current.
𝟏 𝑻
𝑰𝒅𝒄 = ∫ 𝑰(𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑰𝒅𝒄 = ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝑑𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑰𝒅𝒄 = ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 .
𝟐𝝅 𝟎 𝒎 𝟐𝝅 𝝅 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑰𝒅𝒄 = ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝟎 𝒅𝝎𝒕 .
𝟐𝝅 𝟎 𝒎 𝟐𝝅 𝝅
𝒊𝒎
𝑰𝒅𝒄 = [−𝒄𝒐𝒔𝝎𝒕]𝝅𝟎
𝟐𝝅
𝒊𝒎
𝑰𝒅𝒄 = 𝒙𝟐
𝟐𝝅
𝒊𝒎
𝑰𝒅𝒄 =
𝝅
Or
𝑽𝒅𝒄
𝑰𝒅𝒄 =
𝑹𝑳
𝟏 𝑻
𝑽𝒓𝒎𝒔 = √ ∫ 𝒗𝟐 (𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝝅
𝑽𝒓𝒎𝒔 = √ ∫ (𝒗𝒎 𝒔𝒊𝒏𝝎𝒕)𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎
𝟏 𝝅 𝟐
𝑽𝒓𝒎𝒔 = √ ∫ 𝒗𝒎 𝒔𝒊𝒏𝟐 𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎
𝟏 𝝅 𝟐
𝑽𝒓𝒎𝒔 = √ ∫ 𝒗 (𝟏 − 𝒄𝒐𝒔 𝟐𝝎𝒕)/𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝒗𝒎
𝑽𝒓𝒎𝒔 =
𝟐
4. Root mean square value of the output current.
𝟏 𝑻𝟐
𝑰𝒓𝒎𝒔 = √ ∫ 𝒊 (𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑰𝒓𝒎𝒔 = √ ∫ (𝒊𝒎 𝒔𝒊𝒏𝝎𝒕)𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎
𝟏 𝟐𝝅 𝟐
𝑰𝒓𝒎𝒔 = √ ∫ 𝒊𝒎 𝒔𝒊𝒏𝟐 𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎
𝟏 𝝅𝟐
𝑰𝒓𝒎𝒔 = √ ∫ 𝒊 (𝟏 − 𝒄𝒐𝒔 𝟐𝝎𝒕)/𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝒊𝒎
𝑰𝒓𝒎𝒔 =
𝟐
Or
𝑽𝒓𝒎𝒔
𝑰𝒓𝒎𝒔 =
𝑹𝑳
5. Ripple factor.
Ripple factor is the ratio of rms value of the ac component to the dc value of the component.
𝑽𝒓𝒓𝒎𝒔
𝒓𝒊𝒑𝒑𝒍𝒆 𝒇𝒂𝒄𝒕𝒐𝒓 (𝜸) =
𝑽𝒅𝒄
√𝑽𝟐𝒓𝒎𝒔 − 𝑽𝟐𝒅𝒄
𝜸=
𝑽𝒅𝒄
𝟐 𝟐
√(𝑽𝒎 ) − (𝑽𝒎 )
𝟐 𝝅
𝜸=
𝑽𝒎
𝝅
𝜸 = 𝟏. 𝟐𝟏𝟏𝟒.
6. Efficiency.
It is the ratio of dc output power present in the output to the ac power input.
𝑷𝒅𝒄
𝜼= 𝒙𝟏𝟎𝟎
𝑷𝒂𝒄
𝑽𝟐𝒅𝒄
𝑹
𝜼 = 𝟐 𝑳 𝒙𝟏𝟎𝟎
𝑽𝒓𝒎𝒔
𝑹𝑳
𝜼 = 𝟎. 𝟒𝟎𝟔𝒙𝟏𝟎𝟎
𝜼 = 𝟒𝟎. 𝟔%.
𝑉𝐷𝐶 = 𝐼𝐷𝐶 𝑋 𝑅𝐿
𝐼𝑚
𝐼𝑟𝑚𝑠 =
2
𝑉𝑟𝑚𝑠 = 𝐼𝑟𝑚𝑠 𝑋 𝑅𝐿
2 2
√𝐼𝑟𝑚𝑠 − 𝐼𝐷𝐶
𝛾=
𝐼𝐷𝐶
2
𝐼𝐷𝐶 𝑅𝐿
%𝜂 = 2 𝑥100
𝐼𝑟𝑚𝑠 (𝑅𝑓 + 𝑅𝐿 )
𝑉𝐷𝐶 = 𝐼𝐷𝐶 𝑋 𝑅𝐿
𝐼𝑚
𝐼𝑟𝑚𝑠 =
2
𝑉𝑟𝑚𝑠 = 𝐼𝑟𝑚𝑠 𝑋 𝑅𝐿
2 2
√𝐼𝑟𝑚𝑠 − 𝐼𝐷𝐶
𝛾=
𝐼𝐷𝐶
2
𝐼𝐷𝐶 𝑅𝐿
%𝜂 = 2 (𝑅 + 𝑅 + 𝑅 )
𝑥100
𝐼𝑟𝑚𝑠 𝑓 𝑠 𝐿
Figure (10), shows the circuit diagram of an half-wave rectifier with capacitor filter, i.e., a
capacitor is connected across the load resistor RL. When AC voltage is applied, during the positive
half cycle, the diode D is forward biased and allows electric current through it and capacitor starts
charging instantly to its maximum level. During negative half cycle diode does not conducts and
no current flow through the capacitor and hence starts discharging slowly. The discharging time
constant is given by,
𝑻𝒅 = 𝑪𝑹𝑳
Note: If C or RL or both increases the discharging time also increases and we will get pure dc. For
very high Td the capacitor never discharges and it acts as a voltage source of value is equal to load
voltage.
As we already know that, the capacitor provides high resistive path to dc components (low-
frequency signal) and low resistive path to ac components (high-frequency signal).
Electric current always prefers to flow through a low resistance path. So when the electric
current reaches the filter, the dc components experience a high resistance from the capacitor and
ac components experience a low resistance from the capacitor.
The dc component does not like to flow through the capacitor (high resistance path). So
they find an alternative path (low resistance path) and flows to the load resistor (RL) through that
path shown in figure (11).
Electric current always prefers to flow through a low resistance path. So the AC
components will flow through the capacitor whereas the DC components are blocked by the
capacitor. Therefore, they find an alternate path and reach the output load resistor R L. The flow of
AC components through the capacitor is nothing but the charging of a capacitor.
Waveforms:
Figure (12) shows the waveform of a half-wave rectifier filtered output. If discharging time
increases then the output become pure dc.
1
𝛾=
2√3𝑓𝑅𝐿 𝐶
Advantage:
Simple and easy to construct.
PIV is only Vm.
Disadvantages:
Conducts only half cycle, due to this more power will be wasted.
More ripples occur in the output.
As shown in the figure (13), the full wave rectifier converts both positive and negative half cycles
of the input AC signal into output pulsating DC signal.
Note: The center tapped transformer shown in figure (14), works almost similar to a normal
transformer. Like a normal transformer, the center tapped transformer also increases or reduces
the AC voltage. However, a center tapped transformer has another important feature. That is the
secondary winding of the center tapped transformer divides the input AC current or AC signal (VP)
into two parts.
The upper part of the secondary winding produces a positive voltage V1 and the lower part of the
secondary winding produces a negative voltage V2. When we combine these two voltages at output
load, we get a complete AC signal.
i.e. 𝑽𝑻𝒐𝒕𝒂𝒍 = 𝑽𝟏 + 𝑽𝟐
The voltages V1 and V2 are equal in magnitude but opposite in direction. That is the voltages
(V1 and V2) produced by the upper part and lower part of the secondary winding are 180 degrees
out of phase with each other. However, by using a full wave rectifier with center tapped
transformer, we can produce the voltages that are in phase with each other. In simple words, by
using a full wave rectifier with center tapped transformer, we can produce a current that flows only
in single direction.
The AC source is connected to the primary winding of the center tapped transformer. A
center tap (additional wire) connected at the exact middle of the the secondary winding divides the
input voltage into two parts.
The upper part of the secondary winding is connected to the diode D1 and the lower part of the
secondary winding is connected to the diode D2. Both diode D1 and diode D2 are connected to a
common load RL with the help of a center tap transformer. The center tap is generally considered
as the ground point or the zero voltage reference point.
Explanation:
The center tapped full wave rectifier uses a center tapped transformer and two diodes to
convert the input AC voltage into output DC voltage.
When input AC voltage is applied, the secondary winding of the center tapped transformer
divides this input AC voltage into two parts: positive and negative.
During every positive half cycle of the input AC signal, terminal A become positive,
terminal B become negative and center tap is grounded (zero volts). The positive terminal A is
connected to the p-side of the diode D1 and the negative terminal B is connected to the n-side of
the diode D1. So the diode D1 is forward biased during the positive half cycle and allows electric
current through it.
Figure (15): Full-wave rectifier circuit during every positive half cycle.
On the other hand, the negative terminal B is connected to the p-side of the diode D2 and
the positive terminal A is connected to the n-side of the diode D2. So the diode D2 is reverse biased
during every positive half cycle and does not allow electric current through it.
The diode D1 supplies DC current to the load RL. The DC current produced at the load RL will
return to the secondary winding through a center tap.
i.e., 𝑽𝒐 = 𝑽𝒊
During the positive half cycle, current flows only in the upper part of the circuit while the
lower part of the circuit carry no current to the load because the diode D2 is reverse biased. Thus,
during the positive half cycle of the input AC signal, only diode D1 allows electric current while
diode D2 does not allow electric current as shown in figure (15).
During every negative half cycle of the input AC signal, terminal A become negative,
terminal B become positive and center tap is grounded (zero volts). The negative terminal A is
connected to the p-side of the diode D1 and the positive terminal B is connected to the n-side of
the diode D1. So the diode D1 is reverse biased during the negative half cycle and does not allow
electric current through it.
The diodes D1 and D2 are commonly connected to the load RL. So the load current is the sum of
individual diode currents.
We know that a diode allows electric current in only one direction. From the figure (17), we can
see that both the diodes D1 and D2 are allowing current in the same direction.
We know that a current that flows in only single direction is called a direct current. So the
resultant current at the output (load) is a direct current (DC). However, the direct current appeared
at the output is not a pure direct current but a pulsating direct current.
The value of the pulsating direct current changes with respect to time. This is due to the
ripples in the output signal. These ripples can be reduced by using filters such as capacitor and
inductor.
The average output DC voltage across the load resistor is double that of the single half wave
rectifier circuit.
Waveforms:
The output waveforms of the full wave rectifier is shown in figure (18).
Mathematical Expressions:
The output of half wave rectifier circuit is irregular in nature and output would be equal to the
average voltage or current.
Transformer voltage and current is given by,
𝒗(𝒕) = 𝒗𝒎 𝒔𝒊𝒏𝝎𝒕.
𝒊(𝒕) = 𝒊𝒎 𝒔𝒊𝒏𝝎𝒕
Therefore
1. Average or DC Voltage.
𝟏 𝑻
𝑽𝒅𝒄 𝒐𝒓 𝑽𝒂𝒗𝒈 = ∫ 𝒗(𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑽𝒅𝒄 = ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑽𝒅𝒄 = ∫ 𝒗𝒎 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝒗 𝒔𝒊𝒏𝝎𝝎𝒕 𝒅𝒕 .
𝟐𝝅 𝟎 𝟐𝝅 𝝅 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑽𝒅𝒄 = ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 .
𝟐𝝅 𝟎 𝒎 𝟐𝝅 𝝅 𝒎
Component Between π to 2𝝅 is same as the 0 to π component.
Therefore,
𝟏 𝝅
𝑽𝒅𝒄 = 𝟐𝒙 ∫ 𝒗 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝒗𝒎
𝑽𝒅𝒄 = 𝟐𝒙 [−𝒄𝒐𝒔𝝎𝒕]𝝅𝟎
𝟐𝝅
𝒗𝒎
𝑽𝒅𝒄 = 𝟐𝒙 𝒙𝟐
𝟐𝝅
𝟐𝒗𝒎
𝑽𝒅𝒄 =
𝝅
2. Average or DC Current.
𝟏 𝑻
𝑰𝒅𝒄 𝒐𝒓 𝑰𝒂𝒗𝒈 = ∫ 𝑰(𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑰𝒅𝒄 = ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝟏 𝝅 𝟏 𝟐𝝅
𝑰𝒅𝒄 = ∫ 𝒊𝒎 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 + ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕 .
𝟐𝝅 𝟎 𝟐𝝅 𝝅 𝒎
𝟏 𝝅
𝑰𝒅𝒄 = 𝟐𝒙 ∫ 𝒊 𝒔𝒊𝒏𝝎𝒕 𝒅𝝎𝒕
𝟐𝝅 𝟎 𝒎
𝒊𝒎
𝑰𝒅𝒄 = 𝟐𝒙 [−𝒄𝒐𝒔𝝎𝒕]𝝅𝟎
𝟐𝝅
𝒊𝒎
𝑰𝒅𝒄 = 𝟐𝒙 𝒙𝟐
𝟐𝝅
𝟐𝒊𝒎
𝑰𝒅𝒄 =
𝝅
Or
𝑽𝒅𝒄
𝑰𝒅𝒄 =
𝑹𝑳
3. Root Mean Square value of the output voltage.
𝟏 𝑻 𝟐
𝑽𝒓𝒎𝒔 = √ ∫ 𝒗 (𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑽𝒓𝒎𝒔 = √ ∫ (𝒗𝒎 𝒔𝒊𝒏𝝎𝒕)𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎
𝟏 𝟐𝝅 𝟐
𝑽𝒓𝒎𝒔 = √ ∫ 𝒗 𝒔𝒊𝒏𝟐 𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝟏 𝝅 𝟐
𝑽𝒓𝒎𝒔 = √𝟐𝒙 ∫ 𝒗 (𝟏 − 𝒄𝒐𝒔 𝟐𝝎𝒕)/𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝒗𝒎
𝑽𝒓𝒎𝒔 =
√𝟐
4. Root mean square value of the output current.
𝟏 𝑻𝟐
𝑰𝒓𝒎𝒔 = √ ∫ 𝒊 (𝒕)𝒅𝝎𝒕.
𝑻 𝟎
𝟏 𝟐𝝅
𝑰𝒓𝒎𝒔 = √ ∫ (𝒊𝒎 𝒔𝒊𝒏𝝎𝒕)𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎
𝟏 𝝅𝟐
𝑰𝒓𝒎𝒔 = √𝟐𝒙 ∫ 𝒊 𝒔𝒊𝒏𝟐 𝝎𝒕 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝟏 𝟐𝝅 𝟐
𝑰𝒓𝒎𝒔 = √𝟐𝒙 ∫ 𝒊 (𝟏 − 𝒄𝒐𝒔 𝟐𝝎𝒕)/𝟐 𝒅𝝎𝒕.
𝟐𝝅 𝟎 𝒎
𝒊𝒎
𝑰𝒓𝒎𝒔 =
√𝟐
Or
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 15
Basic Electronics [18EC14/24]
𝑽𝒓𝒎𝒔
𝑰𝒓𝒎𝒔 =
𝑹𝑳
5. Ripple factor.
Ripple factor is the ratio of rms value of the ac component to the dc value of the component.
𝐕𝐫𝐫𝐦𝐬
𝐫𝐢𝐩𝐩𝐥𝐞 𝐟𝐚𝐜𝐭𝐨𝐫 (𝛄) =
𝐕𝐝𝐜
𝟐 − 𝐕𝟐
√𝐕𝐫𝐦𝐬 𝐝𝐜
𝛄=
𝐕𝐝𝐜
𝟐 𝟐
√(𝐕𝐦 ) − (𝟐𝐕𝐦 )
√𝟐 𝛑
𝛄=
𝟐𝐕𝐦
𝛑
𝛄 = 𝟎. 𝟒𝟖.
6. Efficiency.
It is the ratio of dc output power present in the output to the ac power input.
𝐏𝐝𝐜
𝛈= 𝐱𝟏𝟎𝟎
𝐏𝐫𝐦𝐬
𝟐
𝐕𝐝𝐜
𝐑
𝛈 = 𝟐𝐋 𝐱𝟏𝟎𝟎
𝐕𝐫𝐦𝐬
𝐑𝐋
𝛈 = 𝟎. 𝟖𝟏𝟐𝐱𝟏𝟎𝟎
𝛈 = 𝟖𝟏. 𝟐%.
Note: The above expressions holds good only for the ideal diode (Rf=0 and VON=0) and ideal
transformer (Rs=0).
Case (i): For a diode with Rf.
𝑉𝑚
𝐼𝑚 =
𝑅𝑓 + 𝑅𝐿
2𝐼𝑚
𝐼𝐷𝐶 =
𝜋
𝑉𝐷𝐶 = 𝐼𝐷𝐶 𝑋 𝑅𝐿
𝐼𝑚
𝐼𝑟𝑚𝑠 =
√2
𝑉𝑟𝑚𝑠 = 𝐼𝑟𝑚𝑠 𝑋 𝑅𝐿
2 2
√𝐼𝑟𝑚𝑠 − 𝐼𝐷𝐶
𝛾=
𝐼𝐷𝐶
2
𝐼𝐷𝐶 𝑅𝐿
%𝜂 = 2 𝑥100
𝐼𝑟𝑚𝑠 (𝑅𝑓 + 𝑅𝐿 )
𝑉𝐷𝐶 = 𝐼𝐷𝐶 𝑋 𝑅𝐿
𝐼𝑚
𝐼𝑟𝑚𝑠 =
√2
𝑉𝑟𝑚𝑠 = 𝐼𝑟𝑚𝑠 𝑋 𝑅𝐿
2 2
√𝐼𝑟𝑚𝑠 − 𝐼𝐷𝐶
𝛾=
𝐼𝐷𝐶
2
𝐼𝐷𝐶 𝑅𝐿
%𝜂 = 2 (𝑅 + 𝑅 + 𝑅 )
𝑥100
𝐼𝑟𝑚𝑠 𝑓 𝑠 𝐿
The filter is an electronic device that converts the pulsating Direct Current into pure Direct
Current.
In the circuit diagram, the capacitor C is placed across the load resistor RL.
Note: The working of the full-wave rectifier with filter is almost similar to that of the half wave
rectifier with filter. The only difference is that in the half wave rectifier only one half cycles (either
positive or negative) of the input AC current will charge the capacitor but the remaining half cycle
will not charge the capacitor. But in full wave rectifier, both positive and negative half cycles of
the input AC current will charge the capacitor.
The main duty of the capacitor filter is to short the ripples to the ground and blocks the
pure DC (DC components), so that it flows through the alternate path and reaches output load
resistor RL.
Figure (19) shows the circuit diagram of a full-wave rectifier with Capacitor filter, when input AC
voltage is applied, during the positive half cycle, the diode D1 is forward biased and allows electric
current whereas the diode D2 is reverse biased and blocks electric current. On the other hand,
during the negative half cycle the diode D2 is forward biased (allows electric current) and the diode
D1 is reverse biased (blocks electric current).
During the positive half cycle, the diode (D1) current reaches the filter and charges the
capacitor. However, the charging of the capacitor happens only when the applied AC voltage is
greater than the capacitor voltage.
Initially, the capacitor is uncharged. That means no voltage exists between the plates of the
capacitor. So when the voltage is turned on, the charging of the capacitor happens immediately.
During this conduction period, the capacitor charges to the maximum value of the input
supply voltage. The capacitor stores a maximum charge exactly at the quarter positive half cycle
in the waveform. At this point, the supply voltage is equal to the capacitor voltage.
When the AC voltage starts decreasing and becomes less than the capacitor voltage, then
the capacitor starts slowly discharging as shown in figure (20).
The discharging of the capacitor is very slow as compared to the charging of the capacitor.
So the capacitor does not get enough time to completely discharge. Before the complete discharge
of the capacitor happens, the charging again takes place. So only half or more than half of the
capacitor charge get discharged.
When the input AC supply voltage reaches the negative half cycle, the diode D1 is reverse
biased (blocks electric current) whereas the diode D2 is forward biased (allows electric current).
During the negative half cycle, the diode (D2) current reaches the filter and charges the capacitor.
However, the charging of the capacitor happens only when the applied AC voltage is greater than
the capacitor voltage.
The capacitor is not completely uncharged, so the charging of the capacitor does not happen
immediately. When the supply voltage becomes greater than the capacitor voltage, the capacitor
again starts charging.
In both positive and negative half cycles, the current flows in the same direction across the
load resistor RL. So we get either complete positive half cycles or negative half cycles. In our case,
they are complete positive half cycles.
1
𝛾=
4√3𝑓𝑅𝐿 𝐶
Advantages:
Conducts both the half cycles.
Efficiency is improved
Ripples factor is reduced.
Disadvantages:
Center tapped transformer more expensive and bulky.
PIV is 2Vm.
Circuit Diagram:
The Circuit diagram of a bridge rectifier is shown in figure (21). The bridge rectifier is
made up of four diodes namely D1, D2, D3, D4 and load resistor RL. The four diodes are connected
in a closed loop (Bridge) configuration to efficiently convert the Alternating Current (AC) into
Direct Current (DC).
Explanation:
The input AC signal is applied across two terminals A and B and the output DC signal is
obtained across the load resistor RL which is connected between the terminals C and D.
The four diodes D1, D2, D3, D4 are arranged in series with only two diodes allowing electric
current during each half cycle. For example, diodes D1 and D2 are considered as one pair which
allows electric current during the positive half cycle whereas diodes D3 and D4 are considered as
another pair which allows electric current during the negative half cycle of the input AC signal.
When input AC signal is applied across the bridge rectifier, during the positive half cycle
diodes D1 and D2 are forward biased and allows electric current while the diodes D3 and D4 are
reverse biased and blocks electric current. On the other hand, during the negative half cycle diodes
D3 and D4 are forward biased and allow electric current while diodes D1 and D2 are reverse biased
and blocks electric current.
During the positive half cycle, the terminal A becomes positive while the terminal B becomes
negative. This causes the diodes D1 and D2 forward biased and at the same time, it causes the
diodes D3 and D4 reverse biased.
The current flow direction during the positive half cycle is shown in the figure (22) (i.e. A to D to
C to B).
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 19
Basic Electronics [18EC14/24]
During the negative half cycle, the terminal B becomes positive while the terminal A becomes
negative. This causes the diodes D3 and D4 forward biased and at the same time, it causes the
diodes D1 and D2reverse biased.
The current flow direction during negative half cycle is shown in figure (23) (I.e. B to D to C to
A).
From the two figures (22 and 23), we can observe that the direction of current flow across
load resistor RL is same during the positive half cycle and negative half cycle. Therefore, the
polarity of the output DC signal is same for both positive and negative half cycles. The output DC
signal polarity may be either completely positive or negative. In our case, it is completely
positive. If the direction of diodes is reversed then we get a complete negative DC voltage.
Thus, a bridge rectifier allows electric current during both positive and negative half cycles of the
input AC signal.
The output waveforms of the bridge rectifier is shown in figure (24).
Waveforms:
Mathematical Expressions:
Same as Full wave Rectifier except PIV.
PIV of Bridge type full wave rectifier is only Vm.
i.e., 𝑷𝑰𝑽 = 𝑽𝒎
Note: The above expressions holds good only for the ideal diode (Rf=0 and VON=0) and ideal
transformer (Rs=0).
Case (i): For a diode with Rf.
𝑉𝑚
𝐼𝑚 =
2𝑅𝑓 + 𝑅𝐿
2𝐼𝑚
𝐼𝐷𝐶 =
𝜋
𝑉𝐷𝐶 = 𝐼𝐷𝐶 𝑋 𝑅𝐿
𝐼𝑚
𝐼𝑟𝑚𝑠 =
√2
𝑉𝑟𝑚𝑠 = 𝐼𝑟𝑚𝑠 𝑋 𝑅𝐿
2 2
√𝐼𝑟𝑚𝑠 − 𝐼𝐷𝐶
𝛾=
𝐼𝐷𝐶
2
𝐼𝐷𝐶 𝑅𝐿
%𝜂 = 2 𝑥100
𝐼𝑟𝑚𝑠 (2𝑅𝑓 + 𝑅𝐿 )
𝑉𝐷𝐶 = 𝐼𝐷𝐶 𝑋 𝑅𝐿
𝐼𝑚
𝐼𝑟𝑚𝑠 =
√2
𝑉𝑟𝑚𝑠 = 𝐼𝑟𝑚𝑠 𝑋 𝑅𝐿
2 2
√𝐼𝑟𝑚𝑠 − 𝐼𝐷𝐶
𝛾=
𝐼𝐷𝐶
2
𝐼𝐷𝐶 𝑅𝐿
%𝜂 = 2 (2𝑅 + 𝑅 + 𝑅 )
𝑥100
𝐼𝑟𝑚𝑠 𝑓 𝑠 𝐿
Advantages:
Center tapped Transformer is not necessary hence circuit becomes simple and cheap.
PIV is only Vm.
Disadvantages:
Requires four diodes.
Choke Filter:
Choke filter is a circuit consists of an inductor connected in series with load and capacitor
connected across the load. The choke filter is also called L-section filter as shown in figure (25).
1.19
𝛾=
𝐿𝐶
Zener Diode:
The reverse current through the normal diode is in terms of microamperes and it is almost
constant until the reverse voltage is less than break down voltage, if the reverse voltage is greater
than or equal to the break down voltage the junction breaks and high current will flow through the
device and more power will be dissipated then the device may be destroyed or damaged.
If we limit the current through the device by means of connecting a resistor in series with
the device, the power dissipation reduces and the device may not be destroyed even under
breakdown region. By using this principle the special type of diode is designed by Clearance Zener
called as Zener diode.
There are two types of breakdown occurs in Zener diode depending on the break down
voltage levels.
i) Zener Break down:
This type of breakdown occurs in the device if the breakdown voltage is less than or equal
to 6V(typically), this strong electric field at the junction becomes very large and breaks the
covalent bonds to release free electrons, due to this very high current will flow through the device.
This mechanism or process is called ionization by Electric field.
From the above figure, the input unregulated power supply Vi, Positive terminal is
connected to the cathode terminal and negative terminal is connected to the anode terminal, hence
the Zener diode is operating in the reverse biasing mode.
And the above circuit provides a constant voltage even by varying the input voltage and
varying load, i.e., provides regulation for both line and load.
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 23
Basic Electronics [18EC14/24]
If the input voltage Vi is less than the Zener Voltage VZ ( Zener Break Down Voltage), the
output voltage is same as the input voltage Vi, because the Zener diode is in off state, if the input
voltage is greater than the Zener voltage VZ, the diode in ON state and hence it acts as a voltage
source of VZ Volts.
If Vi increases, the input current I also increases, and IZ increases to maintain IL constant,
but IZ should be between IZmin to IZmax.
If Vi decreases, the input current I also decreases, and IZ decreases to maintain IL constant,
but IZ should be between IZmin to IZmax.
Therefore the voltage across the load resistor constant and is given by
Vo=VZ
If RL increases, IL decreases and to keep input current I constant IZ increases, but IZ should
be between IZmin to IZmax.
If RL decreases, IL increases and to keep input current I constant IZ decreases, but
IZ should be between IZmin to IZmax.
Therefore the voltage across the load resistor constant and is given by
Vo=VZ
The PN junctions with additional features are called special types of diodes, which have
special form of PN junction compared to normal diodes. Most of the special diodes converts one
form of energy into another form, few of them are discussed in the following section.
1. Photodiodes:
Photo diodes are special type of diode or special form of PN junction, which conducts or
produces current when the junction is exposed to light radiation under reverse biasing condition.
I.e., photo diodes converts light radiation into electrical energy. If the radiation increases, the
current produced by the device also increases.
The pair of inward arrow indicates that, the device starts conducting, when the device receives
light radiation.
Figure shows the internal structure of the photodiode, these types of diodes are surrounded by a
glass surface to allow the radiation into the junction. V is the voltage supply for biasing the device
in reverse biasing mode. Ammeter connected in series with the device to read the current produced
by the device. Photo diodes will work in two modes
i) Photovoltaic (Solar cells) : Under un-biasing condition, when the junction exposed to radiation,
the device will produces current is called photovoltaic mode of operation of photodiode. Example:
Solar cells.
ii) Photoconductive (Photo diode): The device is under reverse biasing and the junction exposed
to radiation, produces current. This mode of operation is called photoconductive mode.
Working principle:
Under reverse biasing the depletion region increases and immobile ions accumulates near
the junction on both sides, which acts as a barrier and avoids further movement of charge carriers
from one region to another region. When the junction is exposed to light radiation, the junction
takes sufficient energy to break the covalent bonds. The covalent bonds breaks and generates free
electrons, due to the movement of these free electrons, current will be flowing through the device.
VI Characteristics:
Applications:
• Theft detection
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 25
Basic Electronics [18EC14/24]
Light emitting diode is a special type of diode or special form of PN junction, which converts
electrical energy into light energy under forward biasing. The reverse bias operation of LEDs is
avoided due to very low breakdown voltage.
The pair of outward arrows, indicates when the device conducts, which emits visible light.
Figure, shows the internal structure and biasing arrangement of light emitting diode, these
types of diodes are surrounded by a transparent plastic hard epoxy hemisphere cell to protect the
device from the external shock and to emit the visible light in different colors.
V is the voltage supply for biasing the device in forward biasing mode. Energy gap must be greater
than 1.8eV in order to emit the visible light. The device needs some energy to move the free
electrons from valence band to conduction band and during the recombination, electrons releases
approximately same amount of energy, if the released energy in the form of photon.
Energy of photon is the product of plank’s constant and frequency of radiated electromagnetic
wave.
i.e., 𝐸𝑔 = ℎ𝑓 − − − (1)
𝑐
𝑤. 𝑘. 𝑡. , 𝑓 = − − − (2)
𝜆
Where, c is the velocity of light and 𝜆 is the wavelength of electromagnetic wave.
If the energy gap is less than 1.8eV, electrons releases energy in the form of infra-red radiation,
which is not visible to human eyes. If the energy gap is greater than or equal to 1.8eV, during the
recombination process, which releases energy in the form of light, which are visible to human eye.
Ge and Si are not suitable elements to produce visible light signals, so compounded semiconductor
materials like gallium arsenide, gallium phosphide, gallium nitride, gallium arsenide phosphide
etc…are used to develop light emitting diodes. The cut-in voltage of LEDs ranges from 1.2V to
4V.
VI Characteristics:
Figure shows the VI characteristics of an LED, which is a plot of forward voltage vs current
through the device.
Applications:
• Traffic signal lamps
• Medical devices
• Camera flash lights etc.
3. Photocoupler:
Also called as optocoupler or optoisolator, acts as an interface between two different circuits
with different voltage levels. These devices supplies electrical isolation between input and output
source.
Photocouplers are composed of two semiconductor devices, namely light emitting diode and
photo-transistor. The photocouplers receives electrical signal as an input from the source and
emits light, photo-transistor receives the light signal and converts back into electrical signal.
Figure shows the working principle of optocouplers.
Circuit symbol:
Applications:
• Switching the DC circuits
• PC communication
• AC power control
• Microprocessor input/output switching etc.
•
4. Voltage Regulators (78XX series)
78XX series regulators are linear voltage regulators, which provide stabilized output
voltage from a potentially unstable power supply source. These regulators comes in IC package
and these are most commonly used voltage regulators to provide a stable output.
7805 5
7806 6
7808 8
7809 9
7810 10
7812 12
7815 15
7818 18
7824 24
Advantages:
• Very easy to use - just select the required 78XX series regulator and place it in circuit for
it to work.
• Very few additional electronic components are required - using the basic circuit only
capacitors are required for the input and output.
• Low cost - these linear voltage regulators can be obtained for a very low cost.
NOTE: 79XX series voltage regulators are similar to 78XX series regulators, but 79XX series
regulators provides negative voltage.
******
Transistor
Transfer of Resistor
The first transistor was demonstrated on 23rd Dec 1947, by Dr. Willian Shockley and his
team at the Bell Telephone Laboratories, USA
The important features of transistors compared to vacuum tubes are listed as follows.
1. Three terminal solid-state device
2. Smaller and lightweight
3. Rugged construction
4. No heater requirement
5. Requires less power
6. Lower operating voltage and
7. More efficient.
With these advantages, transistors are developed and used in all electronic systems as a
switch and/or amplifier.
Classification:
Figure (1) shows the classification of transistors.
Transistor
BJT FET
P- Enhancement
N-Channel Depletion mode
Channel mode
P-
N-Channel N-Channel P-Channel
Channel
Figure 1: Classification of transistors.
Figure (3) shows the structure and circuit symbol of NPN and PNP transistors.
The arrow in the circuit symbols indicates the direction of the current flow. In the NPN
transistor, current will flow from collector to emitter terminal and in the PNP transistor current
will flow from emitter to collector.
Construction:
In the following section, the step-by-step process of constructing NPN – BJT is explained,
the following specifications are to be considered for constructing BJTs.
Doping
High Low Moderate
Concentration
Step1: start with a piece of intrinsic semiconductor and divided it into three regions
Doping with pentavalent element gives N-type material and doping with trivalent element gives
P-type semiconductor material.
Step3: Metallic contacts are deposited at each layer to connect the electrodes to form terminals
The emitter terminal emits more electrons and hence, the emitter region is doped heavily,
Collector terminal collects the emitted electrons, hence the width of the collector region is high.
The base terminal is a lightly doped and thin region, which controls the electrons flow from
emitter to collector.
Working Principle:
The BJTs are working under three different modes, such as cut-off, saturation and active modes
and the working principle of NPN-BJT is explained with these three modes.
Case (i): Cut-off mode
• Both Emitter-Base and Collector-Base junctions are reverse biased
• The depletion region widens at both the junctions and no current will flow through the
device.
• Acts as an OFF switch
Bipolar junction transistor is a three-terminal device and BJTs are need to be modeled as
a two-port network. A pair of terminals is called a port, the two-port network means, the network
has two pairs of terminals. One pair of terminals used to apply the input and another pair of
terminals is used to take the corresponding output. Figure (9) shows the block diagram of two-
port model.
One terminal of BJT can be connected to the ground or made common to both input and
output to form a two-port model, which leads to three different configurations they are.
Each of these configurations is having its advantages and disadvantages. To study the behavior of
these configurations, VI characteristics need to be obtained, VI Characteristics of BJTs are divided
into two types they are.
Input Characteristics:
Mathematical Expressions:
𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 − − − (1)
𝐼𝐶 = 𝛼𝐼𝐸 + 𝐼𝐶𝐵𝑂 − − − (2)
𝛼𝐼𝐸 ≫ 𝐼𝐶𝐵𝑂
𝐼𝐶 = 𝛼𝐼𝐸
Where,
𝑰𝑪
𝜶=
𝑰𝑬
𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑎𝑚𝑙𝑖𝑓𝑖𝑐𝑎𝑡𝑖𝑜𝑛 𝑓𝑎𝑐𝑡𝑜𝑟 𝑜𝑓 𝐶𝐵 𝑐𝑜𝑛𝑓𝑖𝑔𝑢𝑟𝑎𝑡𝑖𝑜𝑛
Typically
𝛼 = 0.95 𝑡𝑜 0.98 ;
𝑰𝑪 ≈ 𝑰𝑬
• IC - Collector current
• VBE – Base to Emitter voltage
• VCE - collector to Emitter voltage
Figure (15) shows the circuit arrangement for obtaining the VI Characteristics
Input characteristics
Output characteristics
• VCE vs IC with zero or constant IB
• If IB is zero, and CB junction reverse-biased, a small current will flow through the device.
This current is called reverse leakage current, denoted as ICEO.
• 𝐼𝐶 = 𝛽𝐼𝐵 + (1 + 𝛽)𝐼𝐶𝐵𝑂 − − − (1)
• 𝐼𝐶 ≈ 𝛽𝐼𝐵 − − − (2); β is the current amplification factor in CE configuration
• If IB increases IC also increases.
• Effect of VCE: If VCE increases base current decreases and collector current increases
due to early effect.
Mathematical Expressions:
𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 − − − (1)
𝐼𝐶 = 𝛼𝐼𝐸 + 𝐼𝐶𝐵𝑂 − −(2)
𝐼𝐶 = 𝛼(𝐼𝐶 + 𝐼𝐵 ) + 𝐼𝐶𝐵𝑂
𝐼𝐶 = 𝛼𝐼𝐶 + 𝛼𝐼𝐵 + 𝐼𝐶𝐵𝑂
(1 − 𝛼)𝐼𝐶 = 𝛼𝐼𝐵 + 𝐼𝐶𝐵𝑂
Divide (1 − 𝛼) on both sides
𝛼 1
𝐼𝐶 = 𝐼𝐵 + 𝐼
(1 − 𝛼) (1 − 𝛼) 𝐶𝐵𝑂
𝛼 1
𝐿𝑒𝑡 𝛽 = ; (1 + 𝛽) =
(1 − 𝛼) (1 − 𝛼)
(1
𝐼𝐶 = 𝛽𝐼𝐵 + + 𝛽)𝐼𝐶𝐵𝑂
𝐼𝐶 = 𝛽𝐼𝐵 + 𝐼𝐶𝐸𝑂 − − − (3);
Where,
𝐼𝐶𝐸𝑂 = (1 + 𝛽)𝐼𝐶𝐵𝑂
𝑰𝑪
𝜷= = 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑔𝑎𝑖𝑛 𝑜𝑟 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑎𝑚𝑝𝑙𝑖𝑓𝑖𝑐𝑎𝑡𝑖𝑜𝑛 𝑓𝑎𝑐𝑡𝑜𝑟 𝑜𝑓 𝐶𝐸
𝑰𝑩
• IE – Emitter current
• VBC – Base to Collector voltage
• VEC - Emitter to collector voltage.
Input characteristics
• VBC vs IB with zero or constant VEC
• Initially, the emitter to collector voltage VEC is kept at zero.
• If VCB increases the CB junction depletion region increases and the width of the base
region decreases, thereby decreasing the base current shown in figure.
• Effect of VEC: If VEC is increased, the depletion region of CB junction increases and
depletion region penetrates deeper into the base region, which leads to further decrease
in the width of the base region, so emitter current increases and base current further
decreases.
Output characteristics
• VEC vs IE with zero or constant IB
• If IB is zero, and CB junction reverse-biased, a small current will flow through the device.
This current is called reverse leakage current, denoted as ICBO.
• 𝐼𝐸 = 𝛾𝐼𝐵 + 𝛾𝐼𝐶𝐵𝑂 − −(1);
𝛾 𝑖𝑠 𝑡ℎ𝑒 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑎𝑚𝑝𝑙𝑖𝑓𝑖𝑐𝑎𝑡𝑖𝑜𝑛 𝑓𝑎𝑐𝑡𝑜𝑟 𝑖𝑛 𝐶𝐶 𝑐𝑜𝑛𝑓𝑖𝑔𝑢𝑟𝑎𝑡𝑖𝑜𝑛.
• The emitter current is proportional to the input current (Base current), the
proportionality constant is the current amplification factor
Mathematical Expressions:
Β in terms of α
1 1
=1+
𝛼 𝛽
1 1
−1=
𝛼 𝛽
1−𝛼 1
=
𝛼 𝛽
𝛼
𝛽=
1−𝛼
Applying DC voltage of proper magnitude and polarity at the two junctions without AC
signal is called DC biasing. When the BJT is biased, it will establish certain current and voltage
conditions, these conditions are called operating conditions of the transistor.
In Common emitter configuration, collector to emitter voltage (VCE) and collector current(IC)
are Operating conditions, these operating conditions are also called as DC operating point or
quiescent point or simply Q-point. This operating point must be stable for the proper operation
of the transistor.
The value of the collector current and emitter current at any time will satisfy
𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 − − − (1)
If 𝑉𝐶𝐸 = 0,
𝐕
𝐈𝐂(𝐦𝐚𝐱) = 𝐑𝐂𝐂 − − − (𝟐)
𝐂
i.e., the collector current is maximum at zero collector-emitter voltage, denote this point as A.
If 𝐼𝐶 = 0,
𝐕𝐂𝐄(𝐦𝐚𝐱) = 𝐕𝐂𝐂 − − − (𝟑)
i.e., the voltage across collector and emitter terminals is maximum, if collector current is zero,
denote this point as B.
By locating the points A and B on output characteristics of common emitter configuration BJT,
and joining the points gives DC load line. The intersection of the output characteristic curve and
DC load line gives the operating point of the transistor. As shown in figure (23).
The Q point must be at the middle of the active region for perfect amplification if the Q point
moves towards the x-axis, the transistor will operate in cur-off mode and if the Q point moves
towards the Y-axis, then the transistor will operate in saturation mode. The slope of the DC load
1
line is𝑅 .
𝐶
NOTE:
1. The leakage current, ICBO greatly affected by temperature variations. The collector to base
leakage current doubles for every 10oC rise in temperature.
𝑡2 −𝑡1
𝐼𝐶𝐵𝑂 𝑎𝑡 𝑡2 = 𝐼𝐶𝐵𝑂 𝑎𝑡 𝑡1 ∗ 2 10 − − − (4)
Also,
𝐼𝐶𝐸𝑂 = (1 + 𝛽)𝐼𝐶𝐵𝑂 − − − (5)
And,
𝐼𝐶𝐶𝑂 = 𝛾𝐼𝐶𝐵𝑂 − − − (6)
Collector current depends on ICBO which is the temperature-dependent quantity and hence, the Q
point may shift towards saturation or cut-off region, leads to unexpected behavior and response
from the system. This process is termed as a thermal run-away, i.e., destruction of Q point due
to temperature variations is called thermal run-away. So, proper biasing is necessary to maintain
the location of the Q point constantly.
Also, VBE is a temperature-dependent variable, which decreases by 2.5mV for every 1oC rise in
temperature.
2. The Q point also depends on the value of β, β is a highly sensitive factor, and small changes in
the input current lead to very high changes at the output (Collector current and collector to emitter
voltage). So, proper biasing is necessary to maintain the location of Q point constantly.
i.e.,
∆𝐼𝐶 = 𝛽∆𝐼𝐵 − − − (7)
Transistor as an amplifier:
Amplifier is an electronic circuit, which increases the strength of the weak signal, in
otherward amplifier is an electronic circuit, which increases the amplitude of the input (current
or voltage or both) signal.
Common emitter configuration of BJT is best suitable for amplification purpose, because
common collector configuration can amplify both voltage as wells as current.
Consider a common emitter configured BJT with simple biasing method, shown in figure
(27). RB is the base resistor and RC is the collector resistor which is to be properly chosen to
maintain the location of the Q point in the middle of the active region for zero signal.
When an ac signal is applied across the base to emitter terminal, that signal superimposed
with the DC base current. The small change in base current ∆𝐼𝑏 provides a very high change in
collector current∆𝐼𝑐 , because of large𝛽.
i.e.,
∆𝑰𝒃
= 𝜷 − − − (𝟏)
∆𝑰𝒄
Current amplification
Assume, 𝑟𝑒 is the internal emitter resistance of the PN junction (EB Junction) and
𝑉𝑏 = 𝐼𝑏𝑅𝐵 − − − (2)
The output voltage is measured across Rl.
𝑉𝑐 = 𝐼𝑐 𝑅𝐿 − − − (3)
𝑤𝑒 𝑘𝑛𝑜𝑤 𝑡ℎ𝑎𝑡, 𝐼𝑐 ≈ 𝐼𝑒
𝑽𝒄 𝑹
𝑽
= 𝑹 𝑳 𝜷 − − − (𝟒)
𝒃 𝑩
Voltage amplification
Transistor as a switch:
Figure shows the circuit arrangement to utilize the transistor as a switch. Collector
terminal is biased with VCC through RC and base terminal is biased with VBB through RB. RB and
RC decides the transistor to work in saturation and cu-off region with respect to VBB. The switching
action of transistor is discussed as follows.
If IB = 10μA, VCE = 4V
If IB = 20μA, VCE = 3V
} (Active region)
If IB = 30μA, VCE = 2V
If IB = 40μA, VCE = 1V
𝐼𝐵 𝑚𝑎𝑥 = 50𝜇𝐴
Assume 𝑉𝐵𝐵 = 5𝑉
𝑉𝐵𝐵 − 𝑉𝐵𝐸
𝑅𝐵 = − − − (1)
𝐼𝐵
5 − 0.7
𝑅𝐵 𝑚𝑖𝑛 = => 86𝐾Ω
50𝜇
5 − 0.7
𝑅𝐵 𝑚𝑎𝑥 = => 430𝐾Ω
10𝜇
𝐑 𝐁 𝐬𝐡𝐨𝐮𝐥𝐝 𝐛𝐞 𝐜𝐡𝐨𝐨𝐬𝐞𝐧 𝐛𝐞𝐭𝐰𝐞𝐞𝐧 𝟖𝟔 𝐊 𝐭𝐨 𝟒𝟑𝟎𝐊
Verification:
If 𝑅𝐵 = 80𝐾Ω; 𝐼𝐵 = 53.75𝜇𝐴, 𝐼𝐶 = 5.375𝑚
𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 𝑹𝑪 => 𝟎𝑽𝒐𝒍𝒕𝒔(𝑺𝒂𝒕𝒖𝒓𝒂𝒕𝒊𝒐𝒏)
******
Figure (1) shows the canonical form representation of a feedback system, block AOL is the
amplifier with gain A or AOL and block β is the feedback network with gain β.
Based on the way of combining the signals at input, feedback systems are classified into:
• Positive feedback
• Negative feedback
Positive Feedback:
• Positive feedback is a process of adding the portion of the output with the input and
amplifying. This process is continuous and regenerative action takes place shown in
figure (2).
Though the positive feedback increases the gain of the amplifier, it has the disadvantages such
as
• Increasing distortion
• Instability
Negative Feedback:
Negative feedback is a process of subtracting the portion of the output with the input and
amplifying. This process is continuous and degenerative action takes place shown in figure (3).
Disadvantage:
Decreases the gain
Figure (4) shows the basic structure of a feedback system, which consisting of input unit,
output unit, summing network, sampling network, basic amplifier and feedback network. The
function each of these blocks are explained as follows.
1. Input signal:
• It is a source wither modelled by a practical voltage source or practical current source.
• An ideal voltage source in series with a resistor is called practical voltage source
• An ideal current source in parallel with a resistor is called practical current source.
Practical voltage source Practical Current source
2. Output signal:
• The output of the system is either voltage across the load or current through the load.
• The output of the feedback amplifiers must be independent of the load variations and parameter
variations in the amplifier.
3. Sampling Network :
• A network is used to mesure and sending the output signal to the feedback network is called
sampling network.
• For measuring the voltage a parallel(shunt) connection is required
• For measuring the current a series connection is required
5. Amplifier:
• Amplifies the compared or combined signal
• Electronic circuits
6. Feedback network:
• Combination of electronic/electrical/both elements
• Provides the feedback signal in proportional to the output signal.
Based on the type of summing network and sampling network, feedback systems are classified
into four types, they are.
1. Voltage - Series negative feedback
2. Voltage - Shunt negative feedback
3. Current - Series negative feedback and
4. Current - Shunt negative feedback
Example:
P1: If gain of the amplifier is 105, what is the overall gain after introducing the feedback with
feedback gain 0.01? Also compare the overall gain if the gain of the amplifier is changed by ±50%
Given data:
𝐴 = 105 𝑎𝑛𝑑 ± 50%
𝛽 = 0.01
To find:
𝐴𝐶𝐿 𝑓𝑜𝑟 𝐴 𝑎𝑛𝑑 𝐴 ± 50%
Solution:
𝐴 105
𝐴𝐶𝐿1 = ⇒ ⇒ 99.9
1 + 𝐴𝛽 1 + 105 ∗ 0.01
𝐴 + 50% 150000
𝐴𝐶𝐿2 = ⇒ ⇒ 99.93
1 + 𝐴𝛽 1 + 150000 ∗ 0.01
𝐴 − 50% 50000
𝐴𝐶𝐿3 = ⇒ ⇒ 99.8
1 + 𝐴𝛽 1 + 50000 ∗ 0.01
Proof:
𝑍𝑜𝑢𝑡 = 𝑜𝑢𝑡𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒 𝑤𝑖𝑡ℎ𝑜𝑢𝑡 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘
𝑉𝑜
𝑍𝑜𝑓 = 𝑜𝑢𝑡𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒 𝑤𝑖𝑡ℎ 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 =
𝐼𝑜
𝐴𝑉𝑓 + 𝑉𝑜 = 𝐼𝑜 𝑍𝑜𝑢𝑡
𝐴[𝛽]𝑉𝑜 + 𝑉𝑜 = 𝑍𝑜𝑢𝑡 𝐼𝑜
𝑉𝑜 [1 + 𝐴𝛽] = 𝐼𝑜 𝑍𝑜𝑢𝑡
𝑽𝒐 𝒁𝒐𝒖𝒕
𝒁𝒐𝒇 = ⇒ − − − (𝟏)
𝑰𝒐 [𝟏 + 𝑨𝜷]
Property-4: Bandwidth increases
𝑩𝑾 = 𝒇𝟐 − 𝒇𝟏 − − − (𝟏)
𝒇𝟏
𝒇𝟏𝒇 =
(𝟏 + 𝑨𝜷)
𝒇𝟐𝒇 = 𝒇𝟐 (𝟏 + 𝑨𝜷)
𝑫
𝑫𝒇 =
(𝟏 + 𝑨𝜷)
𝑵
𝑵𝒇 =
(𝟏 + 𝑨𝜷)
Summary:
Bandwidth Increases
distortion Decreases
Noise Decreases
Properties
Block diagram Voltage Gain Decreases and
stabilizes the gain
Bandwidth Increases
Output Decreases
resistance
distortion Decreases
Noise Decreases
3. Current series negative feedback
Properties
Voltage Gain Decreases and
Block diagram stabilizes the gain
Bandwidth Increases
Output Increases
resistance
distortion Decreases
Noise Decreases
5. Current shunt negative feedback system
Properties
Voltage Gain Decreases and
Block diagram stabilizes the gain
Bandwidth Increases
Output Increases
resistance
distortion Decreases
Noise Decreases
By comparing the properties of all the four topologies of negative feedback systems,
voltage series negative feedback has more advantages, and hence, voltage series negative feedback
will be used for the design of amplifiers.
******
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 53
Basic Electronics [18EC14/24]
• Oscillators can generate the AC signal of frequency from few Hz to hundreds of GHz.
• An oscillator is an amplifier with positive feedback
𝑉𝑜 = 𝐴(𝑉𝑖 )
𝑉𝑜 = 𝐴(𝑉𝑠 + 𝑉𝑓 )
𝑉𝑜 = 𝐴(𝑉𝑠 + 𝛽𝑉𝑜
𝑉𝑜 = 𝐴𝑉𝑠 + 𝐴𝛽𝑉𝑜
𝑽𝒐 𝑨
=
𝑽𝒔 𝟏 − 𝑨𝜷
NOTE: The feedback signal is in phase with the input and hence, the feedback signal gets added
with the input – positive feedback.
Case (iii): 𝑨𝜷 = 𝟏
Barkhausen’s Criterion
Classification
Based on frequency
1. Audio frequency(20Hz to 20KHz)
2. Radiofrequency(20KHz-30MHz)
3. Very high frequency(30MHz to 300MHz)
4. UHF Oscillators (300MHz to 3GHz)
5. Microwave Frequency Oscillators(3GHz to 30GHz)
6. Millimeter-wave frequency oscillators (30GHz to 300GHz)
Circuit diagram
Figure (5) shows the circuit diagram of the RC phase shift oscillator. BJT CE configuration
is biased with voltage divider biasing technique using the resistors R 1 and R2. RC and RE are
collector and emitter resistors. CC is a coupling capacitor that isolates the DC biasing settings and
CE is the bypass capacitor to avoid decreasing the output voltage by acting low resistance path
across RE under ac signal.
Further, three stages of the RC network are connected between the output terminal to the
input terminal as a feedback circuit and this feedback circuit acts as a frequency selective network.
Three stages of RC networks provide a constant attenuation factor of 1/29 (β) and an amplifier
circuit should be designed to provide an amplification factor of 29(A), which satisfies the first
condition of Barkhausen’s criterion. Also, each RC stage is designed to provide a 60 o phase shift,
so three stages of the RC network provide a 180o phase shift and the BJT amplifier produces a
180o phase shift. Hence, the total phase shift around a loop is 360o or 0o, which is the second
condition of Barkhausen’s criterion. Equation (1) is the expression of frequency of generated
sinusoidal oscillations and figure (6) shows the waveform of generated oscillations.
Output waveform
2. Capacitor starts discharging through the inductor and inductor starts charging.
4. L starts discharging and C starts charging, due to back emf across the inductor
6. Capacitor starts discharging through the inductor and inductor starts charging.
There are two types of LC oscillators, they are Colpitts and Hartley oscillators. These two
oscillators are discussed as follows.
2. Colpitts Oscillator
The Colpitts oscillator is an electronic circuit, which consisting of an amplifier circuit and an LC
circuit as a feedback circuit shown in figure (8).
Circuit diagram
Figure (8) shows the circuit diagram of the Colpitts oscillator. BJT CE configuration is
biased with voltage divider biasing technique using the resistors R1 and R2. RC and RE are collector
and emitter resistors. CC is a coupling capacitor that isolates the DC biasing settings and CE is the
bypass capacitor to avoid decreasing the output voltage by acting low resistance path across R E
under ac signal. The feedback circuit is a series combination of two capacitors (C1, C2) across an
inductor (L).
𝐶1
The amplifier gain is A and the feedback circuit gain β is 𝐶2, by properly designing the
circuits, Barkhausen’s criterion condition number one can be achieved. i.e., 𝐴𝛽 = 1
The amplifier produces 180o phase shift and the series connection of two capacitors
provides phase inversion or 180o phase shift, hence satisfies Barkhausen’s criterion condition
number two. i.e., ∠𝐴𝛽 = 0𝑜 𝑜𝑟 360𝑜
Equation (1) is the expression of frequency of generated sinusoidal oscillations and figure
(9) shows the waveform of generated oscillations.
𝟏 𝐂𝟏 𝐂𝟐
𝐟= − − − (𝟏), 𝐰𝐡𝐞𝐫𝐞, 𝐂𝐞𝐪 =
𝟐𝛑√𝐋𝐂𝐞𝐪 𝐂𝟏 + 𝐂𝟐
Output waveform
2. Hartley Oscillator
The Hartley oscillator is an electronic circuit, which consisting of an amplifier circuit and an LC
circuit as a feedback circuit shown in figure (8).
Circuit diagram
Figure (8) shows the circuit diagram of the Colpitts oscillator. BJT CE configuration is
biased with voltage divider biasing technique using the resistors R1 and R2. RC and RE are collector
and emitter resistors. CC is a coupling capacitor that isolates the DC biasing settings and CE is the
bypass capacitor to avoid decreasing the output voltage by acting low resistance path across R E
under ac signal. The feedback circuit is a series combination of two Inductors (L1, L2) across a
Capacitor(C).
𝐿2
The amplifier gain is A and the feedback circuit gain β is 𝐿1
, By properly designing the
circuits, Barkhausen’s criterion condition number one can be achieved. i.e., 𝐴𝛽 = 1
The amplifier produces 180o phase shift and the series connection of two inductors
provides phase inversion or 180o phase shift, hence satisfies Barkahusen’s criterion condition
number two. i.e., ∠𝐴𝛽 = 0𝑜 𝑜𝑟 360𝑜
Equation (1) is the expression of frequency of generated sinusoidal oscillations and figure
(11) shows the waveform of generated oscillations.
The frequency of the generated sinusoidal signal is given by
𝟏
𝐟= − − − (𝟏), 𝐰𝐡𝐞𝐫𝐞, 𝐋𝐞𝐪 = 𝑳𝟏 + 𝑳𝟐 + 𝟐𝑴,
𝟐𝛑√𝐋𝐞𝐪 𝐂
𝐰𝐡𝐞𝐫𝐞, 𝐌 𝐢𝐬 𝐭𝐡𝐞 𝐦𝐮𝐭𝐮𝐚𝐥 𝐢𝐧𝐝𝐮𝐜𝐭𝐚𝐧𝐜𝐞
Output waveform
******
1. FETs:
FET is an acronym for the field-effect transistor. The FETs are three-terminal unipolar
devices and conduction will be controlled by the electric field. Hence FETs are also called Field
controlled/Voltage controlled devices.
Sl.
BJTs FETs
No.
𝐼𝐶 = 𝑓(𝐼𝐵 ) 𝐼𝐷 = 𝑓(𝑉𝐺𝑆 )
3 𝑉𝐺𝑆 2
i.e., 𝐼𝐶 = 𝛽𝐼𝐵 i.e., 𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − )
𝑉𝑃
Current conduction takes place by both Current conduction takes place by only the
6 holes and electrons. Hence Called Bipolar majority charge carriers, either electrons or
Transistors. holes. Hence Called Unipolar Transistors.
FET
JFET MOSFET
Enhancement Depletion
N-Channel P-Channel Mode Mode
N-channel and P-channel JFETs, Construction, Working principles, and Characteristics are
discussed in the present context.
A spigot/tap will be the best analogous system for JFET. Consider a tap shown in figure 1.6.
Figure 1.6., shows a spigot/tap, in which the water will flow from the tank to the sink, and
it will be controlled by rotating the controlling knob. Similarly in JFETs, the electrons will move
from the source terminal to the drain terminal and will be controlled by the gate terminal. If the
volume of the water in the tank is more, water movement will be faster, and more could be
collected at the sink, similarly if the drain to source voltage increases, more electrons will drift
from the source terminal to the drain terminal and causes a conventional current from drain to
the source terminal, called as drain current.
Now consider a rotating knob of tap, that will be rotated to block the flow of water, but
assume that it does not block completely. And due to more pressure of water flow from the tank,
there should be a constant amount of water will flow. If the further increasing the pressure of
water flow from the tank, the controlling element in a tap is going to damage, and more current
will flow.
Similarly in JFET, if the pinch-off condition occurs, the constant current will flow from
drain to source, which is due to the increase in drifting of electrons towards the drain terminal or
due to high current density (conventional current will flow in opposite direction to the movement
of the electrons). This occurs at
VDS=VP (Pinch-off Voltage). If VDS>|VVBD|, Junction will break and the device will get damaged.
In the N-channel Junction field-effect transistor, N-type material is the major part and
the electrons are majority charge carriers, the current conduction takes place by these majority
charge carriers.
1.4.1. Construction:
Starting with a large piece of N-type semiconductor material, it acts as a channel and two
small pieces of P-type Semiconductor materials are embedded in the two sides of the N-type
material, forming two PN Junctions shown in figure 1.2. The Major portion in the structure is the
N-type semiconductor material and it is between the two P-type semiconductor materials that
create an N-channel, hence called as N-Channel JFET.
The metallic contacts are deposited on the sides of the structure to connect the electrodes.
The upper electrode is denoted as D and it is called as Drain terminal, the bottom electrode is
denoted as S and it is called as Source terminal, the other two sides are internally connected and
denoted as G and it is called as Gate terminal, shown in figure 1.2.
The N-Channel is having electrons that are majority charge carriers and holes are minority
charge carriers, similarly, P-type materials are having holes that are majority charge carriers and
electrons are minority charge carriers. Under normal room temperature, without bias, the
electrons from the channel tend to move from N-type to P-type and vice-versa creates a small
depletion region shown in figure 1.2.
The N-Channel JFET is Biased with a positive voltage between Drain to Source and Zero
Biasing between Gate to source as shown in figure 1.3.
Figure 1.3. Under Positive Drain voltage and zero gate voltage.
By increasing the Positive voltage VDD, the depletion region increases in the form of wedge
shape shown in figure 1.3., because the PN Junction near the Drain terminal is reverse biasing
and near the source terminal is forward biasing, hence the depletion region near the drain
terminal is more compared to near the source terminal.
The shape of the depletion region is further explained in detail with the following analogy.
The channel is like a resistor and considers there are five equal valued resistors are connected in
series between drain to source shown in figure 1.4., suppose the applied voltage is 5 Volts, the
voltage drop across each resistor is 1V.
With respect to A, the voltage is 1V, at B 2V, at C 3V, and at D 4V, i.e., the Positive voltage
at D is more positive than C, at C is more Positive than B, and so on. Hence the width of the
depletion region is more near the drain terminal compared to the Source.
If VDD is increasing, the area and width of the channel decreases, hence less drain current
will flow through the channel from drain to source, if VDD is further increased to a level, which
touches both the depletion regions(not overlapping) and it is called Pinch-Off. The
voltage(positive voltage applied between drain to source) at which, the depletion regions are going
to the Pinch-off condition, is called Pinch-off voltage shown in figure 1.5.
At Pinch-off condition, the constant current will flow from drain to source, because at
pinch-off the depletion regions will touch but it will not create a barrier to move electrons from
source to drain, and also due to high current density.
Figure 1.7. Output characteristics of N-channel JFET, with VGS=0 and VDS>0V.
Note: Students are informed to analyze the working principles of P-channel JFET.
2. SCRs:
The device which converts ac to dc or the device which conducts current only in the
forward direction is called rectifier/Diode.
If the diode is made up of silicon material, then the diode is called a silicon diode/silicon
rectifier. The silicon material is used instead of Germanium because of the requirement of
high temperature to handle high currents and power.
If the silicon diode is controllable, then the device is called a silicon-controlled
diode/silicon-controlled rectifier.
Hence, the SCRs are defined as the devices which conduct current in the forward direction and
also controllable and are made up of using silicon material. These devices have three junctions,
three terminals, and four layers.
The basic Structure of SCR is shown in figure 2.1, which consisting of four layers, its four
layers are arranged as PNPN. The outer layers are connected to terminals to form a positive
terminal called an Anode, a Negative terminal called a Cathode, and a terminal from P-Layer
nearer to the cathode called a Gate.
The circuit symbol of SCR is shown in figure 2.2, the terminals anode, cathode, and gate are
shown. IA is Anode Current, IG is the gate current, which is applying to control the anode current
during the forward bias.
Silicon Controlled Rectifiers begin their conduction during the forward bias, the forward
biasing arrangement shown in figure 2.3. That is Positive terminal of the battery is connected to
the anode terminal and the negative terminal of the battery is connected to the cathode terminal.
The working principle of SCRs can be analyzed using two cases.
When the SCR is under forward biasing and without the gate signal, as shown in figure
2.3. The junctions J1 and J3 are forward biased and J2 is reverse biased. Hence conduction path
does not exist. During this condition, the device acts as an open circuit even under forward
biasing.
When a gate signal(Generally positive Clock Pulse) is applied along with forward biasing
of SCR shown in figure 2.4. The gate current IG(sufficiently large enough to drive the device) flows
into the gate terminal and hence the junction J2 gets forward biased along with J1 and J2, then the
device goes to conduction mode and the current will flow from anode to cathode terminal. During
this condition, the device acts as a short circuit/ON switch.
The silicon-controlled rectifiers, forward current offers a very low resistance of 0.01 to 0.1Ω,
whereas it offers infinite resistance under non-conduction mode.
During forward biasing and with gate signal, all the junctions J1, J2, and J3 are forward
biased and regenerative action takes place. Because of regenerative action, even after removing
the gate current, the device will not be turned off. Hence, an External circuitry/Commutation
process is used to turn off the SCRs.
The two-transistor model of SCR is shown in figure 2.5. The four layers of SCR are divided
into two transistors by subdividing the middle N and P Layers. The cross-sectional view of SCR is
shown in figure 2.5(a) and the equivalent circuit using BJT symbols is shown in figure 2.5(b).
Figure 2.5(a): Cross sectional view. Figure 2.5(b): Transistor equivalent circuit.
From the above diagrams, it is observed that the four layers of SCR are comprised of two
transistors, one NPN and another PNP. As there is electrical continuity between the two
transistors, the base of the T1 is connected to the Collector of T2; and the collector of T1 is connected
to the base of T2 is shown in figure 2.5b.
Gate(C1/B2) and Cathode(E2) are connected to the ground terminal, i.e., the zero gate bias.
Let a positive voltage VAA be applied to the anode(E1). With VG=0, the VBE2=0 so, the CB junction
of T2 is reverse biased, and only leakage current(ICO) will be supplied to the base of T1. It is too
small to turn on the transistor T1. Thus both T1and T2 are in the off state. Refer to figure 2.6.
so anode current is given by, IA=IB1=ICO is of negligible quantity. That is SCR is in the turn-off
state. means SCR acts as an Open Circuit or Open Switch.
Let a Positive voltage VG be applied at the gate terminal(C1/B2). As VBE2=VG, and on making VG
sufficiently large, IB2 will cause T2 to turn on and the collector current IC2 becomes large. As IB1=IC2,
T1 turns on causing a large collector current IC1(IA=IC1) to flow. This in turn increases IB2 causing a
regenerative action to set in (this is indeed positive internal feedback). Refer to figure 2.7.
so anode current is given by, IA=IE1=IE2 is of maximum current. that is SCR is led to turn-on. i.e.,
SCR acts as a short circuit or closed switch.
2.4.2. Commutation.
As observed from the switching action of SCR, once the SCR is turned on, due to regenerative
action, the SCR always remains in ON condition, thus Commutation circuits/mechanisms are
required to turn off the SCR.
Commutation is a process of turn-off the SCR, there are two types of commutation
Natural Commutation
Forced Commutation.
The AC signal is fed to the SCR, when the signal passes through zero shown in figure 2.8, the
current becomes zero, in that situation the SCR turns off naturally. This type of turning off the
SCR is called natural commutation and also called line commutation.
Forced commutation is a process of turn-off the SCR, through an external circuit. In this
case, the current through the SCR is forced to become zero by passing a current through it in
opposite direction from the external circuit.
There are many types of forced commutation, in the present context, a simple series
combination of the transistor and a dc battery is discussed to turn off the SCR as shown in figure
2.9.
To turn off the SCR, a positive IB pulse of magnitude, large enough to drive the transistor
into the saturation level is applied at the transistor base. the transistor acts as a short circuit. This
causes the flow of very large Ioff through the SCR in opposite direction to its conduction current.
The total SCR current reduces to zero in a very short time causing SCR to turn off.
when the positive voltage VAK=VF is applied between Anode to the cathode. Without a gate
signal, a small leakage current will flow from anode to cathode due to minority charge carriers,
which is negligibly small and considered as an OFF state. The voltage drop across the SCR is the
same as the applied voltage, during the OFF state.
When a gate pulse is applied, the SCR will turn on, once the SCR turns on the voltage
across the SCR i.e., VAK drops to the threshold voltage level(Vt=0.7V, because Silicon controlled
rectifier) and current suddenly increases. Further increase in VF causes an increase in IA but
Voltage remains constant. The Plot of VAK vs IA is shown in figure 2.10 for different values of IG.
If the forward break-over voltage VF is small, more gate current is required to trigger the SCR.
The SCRs will trigger even without a gate signal if the voltage across the SCR exceeds VBD(Break
down voltage, practically very high voltage level).
Forward break-over voltage is the voltage at which for a given IG, the SCR enters into
conduction mode. This voltage reduces as IG increases.
b. Holding Current(IH)
Holding current is the value of the current below which SCR switches from conduction mode to
forward blocking mode(OFF mode).
Forward and Reverse blocking regions are those regions in which the SCR is open-circuited and
no current flows from anode to cathode.
d. Latching current(IL)
Latching current is the minimum anode current above which gate losses its control.
******
Basic Electronics
Subject Code: 18EC14/24
1.1. Introduction
The operational amplifier in short Op-Amp is a linear Integrated circuit, also called a differential
amplifier. Op-Amp is a linear and active device, which performs various operations like, signal
conditioning, filtering, addition, subtraction, integration, differentiation, etc...
Op-amps are voltage amplifiers designed to be used with feedback circuits, using the elements
Resistors or capacitors. The feedback elements determine the operation of the op-amps.
Op-Amps have three terminals, two input terminals named Inverting input terminal, Non-
Inverting input terminal, and one output terminal. The op-Amp performs the amplification of the difference
of the two input signals through +VCC and -VEE DC biasing power supply. Hence the name differential
amplifier, shown in figure(1).
Op-amps come with an Integrated circuit(IC) package, which is an eight-pin IC, IC number is
µA741.
No
Offset Null 1 8
Connection
Inverting
2 7 +VCC
Terminal (-)
µA741
Non-Inverting Output
3 6
Terminal(+) Terminal
PINs 1 and 5 are offset null terminals, used to calibrate the op-Amp. Pin 2 is inverting input
terminal, pin 3 is the non-inverting terminals, pin 6 is the output terminal, pin 4 and 7 are power supply
terminals -VEE and +VCC respectively, and Pin 8 is no connection(NC) reserved for future enhancement.
An op-amp has an infinite frequency response and can amplify the signal from DC to the highest
frequencies.
NOTE: Ideally ∞, typically few GHz.
dVout
i.e., Slew Rate =
dt
NOTE: The typical values given in the above characteristics are related to µA741.
Op-amp is a differential amplifier, which amplifies the difference between the two input signals.
i.e., Vout = A(V2 − V1 )
We know that, the ideally A=∞.
Therefore, Vnon−inv − Vinv = 0
or
Vnon−inv = Vinv
From the above equation, observed that the inverting terminal voltage is the same as the non-
inverting terminal voltage. i.e., if one of the input terminals is connected to ground(zero potential), the
other terminal voltage is also zero, which indicates that there are virtually short-circuited. In other words,
a node that has zero potential with respect to the ground but is not connected to the ground. This concept
is called virtual ground.
Iin = IB + IF − − − − − − − − − − − (1)
W.K.T., IB = 0, Therefore
Iin = IF − − − − − − − (2)
RF
Vout = −Vin ( ) − − − − − −(5)
Rin
From equation (5), it has been observed that the output signal is R F/Rin times that of the input signal with
a negative sign indicates phase reversal.
RF
i.e., Gain (Av ) = − − − − − (6)
Rin
IF = IB + Iin − − − − − − − − − − − (7)
W.K.T., IB = 0, Therefore
Iin = IF − − − − − − − (8)
RF
Vout = +Vin (1 + ) − − − − − −(11)
Rin
From equation (11), it has been observed that the output signal is 1+R F/Rin times that of the input signal
with a positive sign indicates the output is in-phase with the input signal.
RF
i.e., Gain (Av ) = 1 + − − − − − (12)
Rin
Input signals are applied to the inverting terminal through R1, R2, and R3, and the non-inverting
terminal is connected to the ground, RF is the feedback(Negative feedback) resistor connected from the
output terminal to the input terminal.
I1 + I2 + I3 = IB + IF − − − − − − − − − − − (13)
W.K.T., IB = 0, Therefore
I1 + I2 + I3 = IF − − − − − − − (14)
RF RF RF
Vout = −(V1 ( ) + V2 ( ) + V3 ( )) − − − − − −(17)
R1 R2 R3
if RF=R1=R2=R3,
Vout = −(V1 + V2 + V3 ) − − − − − −(18)
From equation (18), it has been observed that the output signal is the negative sum of the input
signals.
Input signals are applied to the inverting terminal through R1, and the non-inverting terminal
through R2, RF is the feedback(Negative feedback) resistor connected from the output terminal to the input
terminal.
At inverting node,
I1 = IF − − − − − − − (19)
V1 − Vinv (Vinv − Vout )
= − − − − − − − −(20)
R1 R3
if V2=0;
R3
Vout = −V1 ( ) − − − − − − − (23)
R1
if V1=0;
R4 R1 +R3
Vout = V2 ( )( ) − − − − − (24) (Since, Non-inverting amplifier)
R2 +R4 R1
R R4 R1 +R3
therefore, Vout == −V1 ( 3 ) + V2 ( )( ) − − − − − (25)
R1 R2 +R4 R1
if R1 = R2 = R3 = R4
Vout = −V1 + V2 − − − − − (26)
From equation (18), it has been observed that the output signal is the difference between the two input
signals.
Input signals are applied to the non-inverting terminal short-circuited the output terminal with the
inverting terminal(feedback).
Equation (30) shows that the output signal is equal to the input signal.
The input signal is applied to the inverting terminal through a resistor R and Capacitor C(Feedback
element) is connected from the output terminal to inverting input terminal.
1
Vout = − ∫Vin dt − − − − − − − −(36)
RC
Equation (36) shows that the output signal is equal to the integral of the input signal.
The input signal is applied to the inverting terminal through a resistor C and Resistor R (Feedback
element) is connected from the output terminal to inverting input terminal.
d
or Vout = −RC Vin − − − − − − − −(40)
dt
Equation (40) shows that the output signal is equal to the derivative of the input signal.
EXCERCISE
An electronic circuit that generates oscillations without oscillating input signal, such circuits are
called oscillators. Wein bridge oscillator is a low frequency and type of RC oscillator, the resistors are
connected in the form of Wein bridge, Hence the name Wein bridge oscillator. Figure (10) shows the circuit
diagram of the Wein bridge oscillator.
The output signal of the amplifier is fed back to the input through terminals 1 and 3 of the feedback
network. Input to the amplifier stage is supplied from terminals 2 and 4 of the feedback network. Hence
the amplifier output becomes the input voltage of the bridge whilst the output of the bridge becomes
the input voltage of the amplifier. When the bridge is balanced the input voltage to the amplifier
becomes zero, to produce the sustained oscillations input to the amplifier must be non-vanishing.
Therefore the bridge is unbalanced by adjusting the proper values of the resistors. The RC network is
responsible for determining the frequency of the oscillator.
𝟏
𝒇=
𝟐𝝅𝑹𝑪
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 82
Basic Electronics [18EC14/24]
References:
1. https://www.electronics-tutorials.ws/opamp/opamp_1.html
2. https://www.google.co.in/search?q=non-inverting+amplifier+circuit&tbm=img&ei=Wxl.
3. Circuitstoday.com
4. https://www.electronicshub.org/
5. David A. Bell, "Electronic Devices and Circuits", PHI, 4th Edition.
******
Basic Electronics
Subject Code: 18EC14/24
1.1. Introduction
An electronic circuit, which processes the data or signals in the form of 0's and 1's is called Digital
electronics. Digital signals or digital data are the groups of 0's and 1's, called binary number systems. Four
major number systems are used to study and processing the digital systems or digital circuits, they are,
Binary, Octal, Decimal, and Hexadecimal number systems. In the following section, the number systems
and their conversions are explained.
Every number has integer part and fractional part, for integer part successive division by two
method and for fractional part successive multiplication by two method will be used to convert decimal
number system into binary number system.
Example: (345.75)10=(?)2
Remainder Carry
2 345 0.75*2=1.5 -1 Not down
2 172 -1 0.5*2=1.0 -1 Top to bottom
2 86 -0 Note down 0.0*2=0.0 -0
2 43 -0 Bottom to top 0.0*2=0.0 -0
2 21 -1
2 10 -1
2 5 -0 i.e.,
2 2 -1
1 -0 (0.75)10=(1100)2
i.e.,
(345)10=(101011001)2
Therefore,
(345.75)10=(101011001. 1100..)2
Every number has integer part and fractional part, for integer part successive division by eight
method and for fractional part successive multiplication by eight method will be used to convert decimal
number system into octal number system.
Example: (3454.75)10=(?)8
Remainder Carry
8 3454 0.75*8=6.0 -6 Not down
8 431 -6 Note down 0.0*8=0.0 -0 Top to bottom
8 53 -7 Bottom to top 0.0*8=0.0 -0
6 -5 0.0*8=0.0 -0
i.e.,
i.e.,
(3454)10=(6576)8
(0.75)10=(60)8
Therefore,
(3454.75)10=(6576.60..)8
Every number has integer part and fractional part, for integer part successive division by 16 method
and for fractional part successive multiplication by 16 method will be used to convert decimal number
system into octal number system.
Example: (9554.85)10=(?)16
Remainder Carry
16 9554 0.85*16=13.6 -D Not down
16 597 -2 Note down 0.6*16=9.6 -9 Top to bottom
16 37 -5 Bottom to top 0.6*16=9.6 -9
2 -5 0.6*16=9.6 -9
i.e.,
i.e.,
(9554)10=(2552)16
(0.85)10=(D99)16
Therefore,
(9554.85)10=(2552. D99..)16
Multiplying sum of weighted binary numbers method is used to convert binary to decimal number
system. For integer part positive weights and for fractional part negative weights will be considered.
Bit position 8 7 6 5 4 3 2 1 0 -1 -2 -3
Bits 1 0 1 0 1 1 0 0 1 . 1 1 0
Sum =1*28+0*27+1*26+0*25+1*24+1*23+0*22+0*21+1*20+1*2-1+1*2-2+0*2-3
=345.75
Therefore,
(101011001. 1100)2=(345.75)10
Multiplying sum of weighted Octal numbers method is used to convert Octal to decimal number
system. For integer part positive weights and for fractional part negative weights will be considered.
Example: (6576.60)8=(?)10
Bit position 3 2 1 0 -1 -2 -3
Digits 6 5 7 6 . 6 0 0
Sum =6*83+5*82+7*81+6*80+6*8-1+0*8-2+0*8-3
=6576.75
Therefore,
(6576.60)8=(3454.75)10
Bit position 3 2 1 0 -1 -2 -3
Digits 2 5 5 2 . D 9 9
Sum =2*163+5*162+5*161+2*160+13*16-1+9*16-2+9*16-3
=9555.9
Therefore,
(2552. D99)8=(9555.9)10
Replacing the binary equivalent of each octal numbers to convert octal to binary. The following
table shows the binary equivalent of each octal symbol.
Octal Binary
0 000
1 001
2 010
3 011
4 100
5 101
6 110
7 111
Example: (67526.57)8=(?)2
(110111101010110.101111)2
Replacing the binary equivalent of each Hexadecimal numbers to convert Hexadecimal to binary.
The following table shows the binary equivalent of each Hexadecimal symbol.
Hexadecimal Binary
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
A 1010
B 1011
C 1100
D 1101
E 1110
F 1111
Example: (67AB26.5F)16=(?)2
(011001111010101100100110.01011111)2
Group the given binary number into three bits format, for integer part from right to left and for
fractional part left to right. Then replace 3 bits binary to its equivalent octal.
NOTE: If the number of bits are not enough to group, padding of zero's can be done.
([110][111][101][010][110]).[101][111])2=(67526.57)8
Group the given binary number into four bits format, for integer part from right to left and for
fractional part left to right. Then replace 4 bits binary to its equivalent Hexadecimal.
If the number of bits are not enough to group, padding of zero's can be done.
Example: (011001111010101100100110.01011111)2=(?)16
([0110][0111][1010][1011][0010][0110].[0101][1111])2=(67AB26.5F)16
Logic gates are the basic building blocks of any digital systems, it is an electronic circuits, which produces
one output by taking one or more inputs. The relation between output to input/s are based on certain logic,
the logic operations are named as AND, OR, NOT etc..
i. Basic Gates
The logic gates which performs the basic operations, such as AND, OR and NOT are called basic
gates.
a. AND gate
b. OR gate
c. NOT gate
these gates are explained as follows.
a. AND gate:
A logic gate, which performs logical AND operation is called AND gate. AND gates are having
multiple input and single output. These gates produces logical value one, if all the inputs are one's else
output is zero. Two inputs and single output gate is explained as follows.
Logic symbol:
Truth table:
Inputs Output
A B Y=A.B
0 0 0
0 1 0
1 0 0
1 1 1
The working principle of AND gate can be studies using it switching equivalent circuit, is as follows.
Circuit Diagram:
Explanation:
Figure shows the switching equivalent circuit of logical AND gate, which consisting of Voltage
supply and series connected of two switches along with a bulb. Switches are considered as inputs A and B.
case(i): If A=0 and B=0, i.e., two switches are in open state, the complete circuit is open circuit. Hence
current will not flow through the circuit and energy will not be supplied to bulb, so the bulb will not glow.
Hence, output Y=0.
case(ii): If A=0 and B=1, i.e., Switch A is open and Switch B is closed, the complete circuit is open circuited.
hence current will not flow through the circuit and energy will not be supplied to the bulb, so the bulb will
not glow. Hence, output Y=0.
case(iii): If A=1 and B=0, i.e., Switch A is Closed and Switch B is Open, the complete circuit is open circuited.
hence current will not flow through the circuit and energy will not be supplied to the bulb so the bulb will
not glow. Hence, output Y=0.
case(iv): If A=1 and B=1, i.e., two switches are in closed state, current will flow through the circuit and
energy will supply to the bulb, so the bulb will glow. Hence, output Y=1.
b. OR gate:
A logic gate, which performs logical OR operation is called OR gate. OR gates are having multiple
input and single output. These gates produces logical value one, if any one of the input is logical one, if all
the input are zero's then the output is zero. Two inputs and single output gate is explained as follows.
Logic symbol:
Truth table:
Inputs Output
A B Y=A+B
0 0 0
0 1 1
1 0 1
1 1 1
The working principle of AND gate can be studies using it switching equivalent circuit, is as follows.
Circuit Diagram:
Explanation:
Figure shows the switching equivalent circuit of logical NOT gate, which consisting of Voltage
supply and series connected of two switches along with a bulb. Switches are considered as inputs A and B.
case(i): If A=0 and B=0, i.e., two switches are in open state, the complete circuit is open circuit. Hence
current will not flow through the circuit and energy will not be supplied to bulb, so the bulb will not glow.
Hence, output Y=0.
case(ii): If A=0 and B=1, i.e., Switch A is open and Switch B is closed, the circuit is closed. hence current
will flow through the circuit and energy will be supplied to the bulb, so the bulb will glow. Hence, output
Y=1.
case(iii): If A=1 and B=0, i.e., Switch A is Closed and Switch B is Open, the circuit is closed. hence current
will flow through the circuit and energy will be supplied to the bulb so the bulb will glow. Hence, output
Y=1.
case(iv): If A=1 and B=1, i.e., two switches are in closed state, current will flow through the circuit and
energy will supply to the bulb, so the bulb will glow. Hence, output Y=1.
c. NOT gate:
A logic gate, which performs logical NOT operation is called NOT gate. NOT gates are single input
and single output gates. These gates produces logical value one, if the input is zero and output is zero if the
input is one. NOT gate is explained as follows.
Logic symbol:
Truth table:
Input Output
A Y=A̅
0 1
1 0
The working principle of AND gate can be studies using it switching equivalent circuit, is as follows.
Circuit Diagram:
Explanation:
Figure shows the switching equivalent circuit of logical NOT gate, which consisting of Voltage
supply and series connected of two switches along with a bulb. Switches are considered as inputs A and B.
case(i): If A=0, i.e., Switch A is open and the circuit is closed. hence current will flow through the circuit
and energy will be supplied to the bulb, so the bulb will glow. Hence, output Y=1.
case(ii): If A=1 i.e., two switch A is closed, the energy will not supply to the bulb, so bulb will not glow and
hence the output Y=0.
The gates are designed by using the basic gates are called derived gates. There are four types of
derived gates, they are.
a. NAND gate
b. NOR gate
c. EXOR gate
d. EXNOR gate.
The logic symbols and truth tables of all these gates are as follows.
a. NAND gate:
A logic gate, which performs logical NOT of AND operation is called NAND gate. NAND gates are
having multiple input and single output. These gates produces logical value zero, if all the inputs are one's
otherwise output is one. Two inputs and single output gate is explained as follows.
Logic Symbol:
Truth Table:
Inputs Output
A B ̅̅̅̅̅
Y=A. B
0 0 1
0 1 1
1 0 1
1 1 0
a. NOR gate:
A logic gate, which performs logical NOT of OR operation is called NOR gate. NOR gates are having
multiple input and single output. These gates produces logical value one, if all the inputs are zero's
otherwise output is zero. Two inputs and single output gate is explained as follows.
Logic Symbol:
Truth Table:
Inputs Output
A B ̅̅̅̅̅̅̅
Y=A +B
0 0 1
0 1 0
1 0 0
1 1 0
c. EXOR Gate:
A logic gate, which performs logical Exclusive OR operation is called EXOR gate. EXOR gates are
having multiple input and single output. These gates produces logical value zero, if all the inputs are 0's or
1's otherwise output is one. Two inputs and single output gate is explained as follows.
Logic Symbol:
Truth Table:
Inputs Output
A B ̅̅̅̅̅̅̅
Y=A +B
0 0 0
0 1 1
1 0 1
1 1 0
d. EXNOR gate:
A logic gate, which performs logical Exclusive NOT of OR operation is called EXNOR gate. EXNOR
gates are having multiple input and single output. These gates produces logical value one, if all the inputs
are 0's or 1's otherwise output is zero. Two inputs and single output gate is explained as follows.
Logic Symbol:
Truth Table:
Inputs Output
A B ̅̅̅̅̅̅̅
Y=A +B
0 0 1
0 1 0
1 0 0
1 1 1
NOTE: NAND and NOR gates are called UNIVERSAL gates, because all the basic gates can be
realized by using either NAND or NOR gates only.
Performing algebraic operations using truth values is called Boolean algebra. The truth values are
either true or false in other words binary logic levels either 0 or 1.
Boolean algebra helps to simplify the logical expressions and hence helps for designing the logical
circuits.
1. Commutative Law
(a) A + B = B + A
(b) A B = B A
2. Associate Law
(a) (A + B) + C = A + (B + C)
(b) (A B) C = A (B C)
3. Distributive Law
(a) A (B + C) = A B + A C
(b) A + (B C) = (A + B) (A + C)
4. Identity Law
(a) A + A = A
(b) A A = A
5.
̅=A
(a) AB + AB
̅) = A
(b) (A + B)(A + B
6. Redundance Law
(a) A + A B = A
(b) A (A + B) = A
7.
(a) 0 + A = A
(b) 0 A = 0
8.
(a) 1 + A = 1
(b) 1 A = A
9.
̅+A=1
(a) A
̅A = 0
(b) A
10.
̅B = A + B
(a) A + A
̅ + B) = AB
(b) A(A
Theorem-1: Complement of the sum of the two or more variables is equal to the product of the
complements of their variables.
Proof:
A B ̅
A ̅
B LHS=A̅̅̅̅̅̅̅
+B ̅ B̅
RHS=A
0 0 1 1 1 1
0 1 1 0 0 0
1 0 0 1 0 0
1 1 0 0 0 0
Theorem-2: Complement of the product of the two or more variables is equal to the sum of the
complements of their variables.
Proof:
A B ̅
A ̅
B ̅̅̅̅
LHS=AB ̅ + B̅
RHS=A
0 0 1 1 1 1
0 1 1 0 1 1
1 0 0 1 1 1
1 1 0 0 0 0
References:
1. http://www.ee.surrey.ac.uk/Projects/Labview/boolalgebra/#table2
2. https://www.tutorialspoint.com/computer_logical_organization/logic_gates.htm
******
Where, Io2 is the reverse saturation current at temperature t2oC and Io1 is the reverse
saturation current at t1oC.
𝒅𝑸 𝜺𝑨
𝑪𝑫 = 𝑪𝑱 =
𝒅𝑽 𝑾
NOTE: Dielectric Constant for Si diode is 11.9 and and for Geermanium
diode is 16.0
Solved Problems
P1. Find the diode current, if the voltage across the silicon diode is 500mV at
27oC with reverse saturation current 20nA.
Given Data:
V=500mV,
Io=20nA
t=27oC and
𝞰=2(Silicon diode)
To find:
IF
Solution:
T=27+273=300K
We know that
k=1.38x10-23J/K
q=1.6x10-19 C
Therefore
VT=25.875mV
P2. A silicon diode is forward biased with voltage drop across the diode is
0.7V and Reverse saturation current is 15μA at 26oC. Find the diode current
at 34oC.
Given data:
Io1=15μA at t1=26oC.
VF1=0.7V at t1.
t2=34oC and
𝞰=2(Silicon)
To find:
IF at t2
Solution:
We know that
t2−t1
Io = Io2 => Io1 x 2 10 − − − − − − − − − (1)
I02=26.11μA.
Also,
V = vF2 => vF1 − 2.5x10−3 x(t 2 − t1 ) − − − − − − − − − −(2)
V=0.68V
kT
VT = − − − − − − − − − (3)
q
VT=26.4787mV
Therefore,
v
IF = Io (eηVT − 1) − − − − − − − −(4)
0.68
IF = 26.11x10−6 (e2∗26.47x10−3 − 1)
IF=9.89A
P3. A Germanium diode forward current is 20mA with voltage drop across
the diode is 0.6V, find the reverse saturation current at 27oC.
Given data:
IF=20mA
V=0.6V
t=27oC
To find:
Io
Solution:
We know that,
v
IF = Io (eηVT − 1) − − − − − − − −(1)
IF
Io = v − − − − − − − −(2)
(eηVT − 1)
VT=25.875mV
Therefore
Io=1.699x10-12A
P4. Find the Voltage drop across and current through A and B for the diodes
connected in i) Series and ii) Parallel shown in figures. Assume the diode
currents are 25mA and voltage drop across each diode is 0.7V.
Given data:
IF1=IF2=25mA
V1=V2=0.7V.
To find:
VAB and IAB for the above cases.
Solution:
If the two conducting diodes are connected in series, acts as a two voltage sources are
connected in series,
If the two conducting diodes are connected in parallel, acts as two current sources in
parallel. Hence, Current gets added but voltage remains same.
i.e., VAB=0.7V and
IF=IF1+IF2=25m+25m=50mA.
P5. A silicon diode is reverse biased with a negative anode voltage of -2V,
what the voltage drop is across and current through the device.
Solution:
A reverse biased diode acts as an open circuit, so open circuit voltage is same as the
applied voltage, i.e., -2V and open circuit current is zero.
P6. The current through the diode is 10mA at 27oC, when the applied voltage is
700mV. Find the value of η. Assume the diode current is 10 4 times that of reveres
saturation current.
Given data:
𝐼𝐹
𝐼𝐹 = 10𝑚𝐴, 𝑡 = 27𝑜 𝐶, 𝑉 = 700𝑚𝑉 𝑎𝑛𝑑 𝐼𝑜 = 4 .
10
To find:
𝜂
Solution:
𝑘𝑇
𝑉𝑇 = ; 𝑇 = 𝟑𝟎𝟎𝒐 𝑲
𝑞
𝑽𝑻 = 𝟐𝟓. 𝟖𝟕𝟓𝒎𝑽
𝐼𝐹
𝐼𝑜 = 4 => 𝟎. 𝟎𝟎𝟏𝒎𝑨
10
W.k.t.,
𝑉
𝐼𝐹 = 𝐼𝑜 (𝑒 𝜂𝑉𝑇 − 1)
𝐼𝐹 𝑉
ln ( + 1)) =
𝐼𝑜 𝜂𝑉𝑇
𝑉
𝜂= => 𝟐. 𝟗𝟑
𝐼
ln (𝐼𝐹 + 1)) ∗ 𝑉𝑇
𝑜
P7. Calculate the forward current for the diode circuit shown in figure, by assuming
silicon diode with ideal, simplified and approximate model. Given forward
resistance of the diode = 20 Ohms, Voltage drop across the diode=0.7V.
Given data:
𝑆𝑖𝑙𝑖𝑐𝑜𝑛 𝑑𝑖𝑜𝑑𝑒, 𝑉 = 0.7𝑉, 𝑅𝑓 = 20 𝑂ℎ𝑚𝑠
To find:
The diode forward current for ideal model, simplified model and approximate model.
Solution:
Case (i): Ideal model- Diode forward resistance is zero and acts as a short circuit, equivalent
circuit is
3
𝐼𝐷 = => 0.03A
100
Case (ii): Simplified model- Diode is replace by a series connection of voltage sources of 0.7V
and forward resistance is zero. Equivalent circuit is
P8. The reverse saturation current and voltage drop across the diode at 27oC is given
as 10 μA and 0.7V respectively, what is their values at 35oC?
Given data:
𝐼𝑜 = 10𝜇𝐴 𝑎𝑛𝑑 𝑉𝐹 = 0.7𝑉 𝑎𝑡 𝑡1 = 27𝑜 𝐶, 𝑡2 = 35𝑜 𝐶.
To find:
𝐼𝑜 𝑎𝑛𝑑 𝑉𝐹 𝑎𝑡 𝑡2 = 35𝑜 𝐶.
Solution:
W.K.T.,
The reverse saturation current doubles for every 10oC rise in temperature and forward voltage
drop across the diode decreases by 2.5mV for every 1oC rise in temperature.
Hence,
𝑡2 −𝑡1
𝐼𝑜′ = 𝐼𝑜 ∗ 2 10
𝑰′𝒐 = 𝟏𝟕. 𝟒𝟏𝝁𝑨
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 99
Basic Electronics [18EC14/24]
P9. A silicon diode is working under reverse biasing with an AC supply, the
width of the depletion region increases to 20μm and area has been changed
to 10-4m2. Given relative permittivity of free space=11.9 and permittivity of
free space= 8.85 × 10-12 m-3kg-1s4A. Find the equivalent capacitor value.
Given data:
𝑊 = 20𝜇𝑚, 𝐴 = 10−4 𝑚2 , 𝜀𝑟 = 11.9 𝑎𝑛𝑑 𝜀𝑜 = 8.85𝑥10−12 𝑀−3 , 𝑘𝑔−1 𝑆 4 𝐴
To find:
𝐶𝐽
Solution:
We know that,
𝜀 = 𝜀𝑟 𝜀𝑜
Also,
𝜀𝐴
𝐶𝐽 =
𝑊
𝑪𝑱 = 𝟎. 𝟓𝟐𝟔𝟓𝒏𝑭
P10. A silicon diode is working under forward biasing with an AC supply, the
rate of charge carriers increases to 10nC with the applied voltage of 10V, find
the equivalent capacitor value.
Given data:
𝑄 = 10𝑛𝐶 𝑎𝑛𝑑 𝑉 = 20𝑉
To find:
𝐶𝐷
Solution:
𝑑𝑄
𝐶𝐷 =
𝑑𝑉
𝑪𝑫 = 𝟏𝒏𝑭
P11. A semiconductor diode has 10ns of reverse recovery time, find the fall
time required to overcome the reverse recovery time.
Given data:
𝑡𝑟𝑟 = 10𝑛𝑠
To find:
𝑡𝑓
Solution:
We know that,
𝑡𝑓 ≥ 10𝑡_𝑟𝑟
𝒕𝒇 ≥ 𝟏𝟎𝟎𝒏𝒔.
P12. The VI Characteristics of a Germanium diode is shown in figure, find the
equivalent forward and reverse resistance.
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 100
Basic Electronics [18EC14/24]
Given data:
𝐼𝐹 = 10𝑚𝐴, 𝐼𝑅 = 1𝜇𝐴, 𝑉𝐹 = 0.2𝑉 𝑎𝑛𝑑 𝑉𝑅 = 0.1𝑉
To Find:
𝑅𝑓 , 𝑅𝑟
Solution:
𝑉𝐹
𝑹𝒇 = => 𝟐𝟎 𝛀
𝐼𝐹
𝑉𝑅
𝑹𝒓 = => 𝟏𝟎𝟓 𝛀
𝐼𝑅
******
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 101
Basic Electronics [18EC14/24]
Problems on Rectifiers
Important mathematical expressions on rectifiers:
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 102
Basic Electronics [18EC14/24]
2
√Irms 2
− IDC
Ripple factor(γ) =
IDC
2
PDC IDC xR L
Efficiency (η) = x100 = 2 x100
PAC Irms (R s + R L )
PIV = Vm
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 103
Basic Electronics [18EC14/24]
2 − V2
√Vrms DC
Ripple factor(γ) = = 0.48(Ideally)
VDC
PDC
Efficiency (η) = x100 = 81.2% (Ideally)
PAC
PIV = 2Vm
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 104
Basic Electronics [18EC14/24]
2
PDC IDC xR L
Efficiency (η) = x100 = 2 x100
PAC Irms (R f + R s + R L )
PIV = 2Vm
3. Full wave rectifier (4 diodes, without center-tap transformer and bridge type
connection of diodes)
vi (t) = Vm sinωt
ii (t) = Im sinωt
Where, Vm and Im are instantaneous values or peak values of input voltage and current
respectively, ω is the input signal frequency in rad/sec.
ω = 2πf, f is the frequency of the input signal in Hz.
PIV = vm
Case(iii): non-zero rs and rf=0.
Given vm, find Im
Vm
Im = R +R
s L
2Im
IDC =
π
VDC = IDC x(R L + R s )
Im
Irms =
√2
Vrms = Irms x(R L + R s )
2
√Irms 2
− IDC
Ripple factor(γ) =
IDC
2
PDC IDC xR L
Efficiency (η) = x100 = 2 x100
PAC Irms (R s + R L )
PIV = Vm
Note:
1. If primary voltage of the transformer is given with turns ratio, calculate the
secondary voltage and then convert rms value into peak value (instantaneous
value).
Example:
vp=230V with turns ratio 12:1(Np:Ns)
w.k.t.
Vp Np
=
Vs Ns
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 106
Basic Electronics [18EC14/24]
N 1
Therefore, Vs = N s xVp => (12) x230 => 19.167 V
p
Vs is the rms value of the secondary of the transformer.
Hence, convert into peak value.
Vm = √2 x Vs
2. If the rms value of the secondary voltage of the transformer is given, then
convert into peak value.
Example:
If Vs is 200V-0V
Vs=200V and vm = √2 x Vs =>282.84V
Example 2:
If Vs is given as 200V-0V-200V
Vs=200V and vm = √2 x Vs =>282.84V
Example 3:
If Vs is given as 200V rms
NOTE: Vs is the total secondary voltage.
Vs
𝑉𝑚 = √2 x => 141.2𝑉
2
Example 4:
If Vs is given as 50V-0-50V peak value
Then, 𝑉𝑚 = 50𝑉
Example 5:
If Vs is given as 100 V peak value
𝑉 100
Then, 𝑉𝑚 = 𝑠 => => 50𝑉
2 2
Example 6:
If Vs is given as 100V peak to peak rms value
√2𝑉𝑠
Then, 𝑉𝑚 = 4
=> 25𝑉
Example 7:
If Vs is given as 100V peak to peak value
𝑉
Then, 𝑉𝑚 = 𝑠 => 25 𝑉
4
4. If the peak to peak rms value of the secondary voltage of the transformer is
given, then convert into peak value.
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 107
Basic Electronics [18EC14/24]
Example1:
If Vs is 300V peak to peak rms value
√2Vs
Vm = => 212.13V
2
Example2:
If Vs is 300V peak to peak instantaneous value is given
Vs
Vm = => 150 V
2
NOTE:
1. In half wave rectifier, there is only one pulse for every complete one cycle, hence, frequency
of the output signal is same as the frequency of the input signal.
2. In full wave rectifier, there are two pulses for every complete one cycle, hence, the
frequency of the output signal is two times that of the frequency of the input signal.
Solved Examples
P1. An ideal diode in an Half wave rectifier circuit energized by a 50V peak
sinusoidal signal. Find the DC current and voltage, rms current and voltage across
a load of 1 K ohms, also find efficiency and ripple factor.
Given data:
HWR, Vm = 50 V, R L = 1KΩ
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 50mA
RL
Im
IDC = => 15.92mA
π
Vm
VDC = => 15.92V
π
Im
Irms = => 25mA
2
Vrms = 25V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 253.44mW
2
Pac = Irms ∗ R L => 625mW
PDC
η= => 0.405 or 40.05%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 1.21
P2. A diode with forward resistance of 25 Ohms in an Half wave rectifier circuit
energized by a 50V peak sinusoidal signal. Find the DC current and voltage, rms
current and voltage across a load of 1 K ohms, also find efficiency and ripple factor.
Given data:
HWR, Vm = 50 V, R L = 1KΩ, R f = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 48.78mA
Rf + RL
Im
IDC = => 15.53mA
π
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 108
Basic Electronics [18EC14/24]
Given data:
HWR, Vm = 50 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 47.61mA
Rf + Rs + RL
Im
IDC = => 15.16mA
π
VDC = IDC ∗ R L => 15.16V
Im
Irms = => 23.58mA
2
Vrms = Irms (R f + R s + R L ) = 24.76V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 229.82mW
2
Pac = Irms ∗ (R L + R f + R s ) => 583.81mW
PDC
η= => 0.3936 or 39.36%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 1.19
P4. A diode with forward resistance of 25 Ohms in an Half wave rectifier circuit
energized by a secondary voltage of 35.35V rms sinusoidal signal. Find the DC
current and voltage, rms current and voltage across a load of 1 K ohms, also find
efficiency and ripple factor. Assume the internal resistance of the secondary of the
transformer is 25 Ohms.
Given data:
HWR, Vs(rms) = 35.35 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐕𝐦 = √𝟐𝐕𝐬 => 𝟓𝟎𝐕
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 109
Basic Electronics [18EC14/24]
Vm
Im = => 47.61mA
Rf + Rs + RL
Im
IDC = => 15.16mA
π
VDC = IDC ∗ R L => 15.16V
Im
Irms = => 23.58mA
2
Vrms = Irms (R f + R s + R L ) = 24.76V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 229.82mW
2
Pac = Irms ∗ (R L + R f + R s ) => 583.81mW
PDC
η= => 0.3936 or 39.36%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 1.19
P5. A diode with forward resistance of 25 Ohms in an Half wave rectifier circuit is
energized by a secondary voltage of 70.7V peak to peak rms sinusoidal signal. Find
the DC current and voltage, rms current and voltage across a load of 1 K ohms, also
find efficiency and ripple factor. Assume the internal resistance of the secondary of
the transformer is 25 Ohms.
Given data:
HWR, Vs(rms)P−P = 70.7 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
√𝟐𝐕𝐬
𝐕𝐦 = => 𝟓𝟎𝐕
𝟐
Vm
Im = => 𝟒𝟕. 𝟔𝟏𝐦𝐀
Rf + Rs + RL
Im
IDC = => 𝟏𝟓. 𝟏𝟔𝐦𝐀
π
VDC = IDC ∗ R L => 𝟏𝟓. 𝟏𝟔𝐕
Im
Irms = => 𝟐𝟑. 𝟓𝟖𝐦𝐀
2
Vrms = Irms (R f + R s + R L ) = 𝟐𝟒. 𝟕𝟔𝐕
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 𝟐𝟐𝟗. 𝟖𝟐𝐦𝐖
2
Pac = Irms ∗ (R L + R f + R s ) => 𝟓𝟖𝟑. 𝟖𝟏𝐦𝐖
PDC
η= => 𝟎. 𝟑𝟗𝟑𝟔 𝐨𝐫 𝟑𝟗. 𝟑𝟔%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
𝛄 = 𝟏. 𝟏𝟗
P6. A diode with forward resistance of 25 Ohms in an Half wave rectifier circuit is
energized by a transformer of turns ration 5:1 and primary voltage of 176.75V
sinusoidal signal. Find the DC current and voltage, rms current and voltage across
a load of 1 K ohms, also find efficiency and ripple factor. Assume the internal
resistance of the secondary of the transformer is 25 Ohms.
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 110
Basic Electronics [18EC14/24]
Given data:
HWR, VP (rms) = 176.75 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐕𝐏 𝐍𝟏 𝐕𝐏
𝐕𝐬(𝐫𝐦𝐬) = (𝐒𝐢𝐧𝐜𝐞 = )
𝟓 𝐍𝟐 𝐕𝐬
𝐕𝐬(𝐫𝐦𝐬) = 𝟑𝟓. 𝟑𝟓 𝐕𝐨𝐥𝐭𝐬
𝐕𝐦 = √𝟐𝐕𝐬 => 𝟓𝟎𝐕
Vm
Im = => 47.61mA
Rf + Rs + RL
Im
IDC = => 15.16mA
π
VDC = IDC ∗ R L => 15.16V
Im
Irms = => 23.58mA
2
Vrms = Irms (R f + R s + R L ) = 24.76V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 229.82mW
2
Pac = Irms ∗ (R L + R f + R s ) => 583.81mW
PDC
η= => 0.3936 or 39.36%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 1.19
P7. A diode with forward resistance of 25 Ohms in an Half wave rectifier circuit is
energized by a 50sin314t supply. Find the DC current and voltage, rms current and
voltage across a load of 1 K ohms, also find efficiency and ripple factor. Assume the
internal resistance of the secondary of the transformer is 25 Ohms. Also find the
frequency of the output signal and PIV.
Given data:
rad
HWR, vi = 50sinωt V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms, ω = 314 .
sec
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐯𝐢 = 𝐯𝐦 𝐬𝐢𝐧𝛚𝐭 => 𝟓𝟎𝐬𝐢𝐧𝛚𝐭
𝐕𝐦 = 𝟓𝟎𝐕
Vm
Im = => 47.61mA
Rf + Rs + RL
Im
IDC = => 15.16mA
π
VDC = IDC ∗ R L => 15.16V
Im
Irms = => 23.58mA
2
Vrms = Irms (R f + R s + R L ) = 24.76V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 229.82mW
2
Pac = Irms ∗ (R L + R f + R s ) => 583.81mW
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 111
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PDC
η= => 0.3936 or 39.36%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 1.19
ω = 2πfin
fin = 50Hz
fout = fin => 𝟓𝟎𝐇𝐳.
PIV = Vm => 50V
P9. Design an HWR circuit by using a transformer of turns ratio 10:1 to supply 5V
DC voltage to 1K Ohms load resistor, the diode has 25 ohms internal forward
resistance and 25 Ohms of transformer resistance. Given data:
N1 : N2 = 10: 1, VDC = 5V, R f = R s = 25Ω, R L = 1KΩ
To find:
Vac = VP
Solution:
VDC = IDC ∗ R L
Im
IDC =
π
Im
VDC = ∗ RL
π
Vm
Im =
Rf + RS + RL
RL
VDC = Vm ∗
R f + Rs + R L
Vm = √2Vs
VP N1 VP
Vs = (Since, = )
10 N2 VS
VP RL
VDC = √2 ( )
10 R f + R s + R L
VP 1000
5 = √2 ( )
10 25 + 25 + 1000
VP = 37.123V(rms)
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 112
Basic Electronics [18EC14/24]
Given data:
R L = 1KΩ, C = 100μF, f = 50Hz, Vp = 15V
To find:
Vr(p−p) , γ
Solution:
V
Vr(p−p) = => 3V
fR L C
1
Ripple factor(γ) = => 0.0577
2√3fR L C
P11. An ideal diode in a 2 diodes /center tapped transformer Full wave rectifier
circuit energized by a 50V peak sinusoidal signal. Find the DC current and voltage,
rms current and voltage across a load of 1 K ohms, also find efficiency and ripple
factor.
Given data:
CTT − FWR, Vm = 50 V, R L = 1KΩ
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 50mA
RL
2Im
IDC = => 31.84mA
π
2Vm
VDC = => 31.84V
π
Im
Irms = => 35.35mA
√2
Vm
Vrms =
√2
Vrms = 35.35V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 1.0137W
2
Pac = Irms ∗ R L => 1.249W
PDC
η= => 0.811 or 81.1%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4823
P12. A diode with forward resistance of 25 Ohms in a center tapped transformer full
wave rectifier circuit energized by a 50V peak sinusoidal signal. Find the DC current
and voltage, rms current and voltage across a load of 1 K ohms, also find efficiency
and ripple factor.
Given data:
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 113
Basic Electronics [18EC14/24]
P13. A diode with forward resistance of 25 Ohms in a center tapped transformer full
wave rectifier circuit energized by a 50V peak sinusoidal signal. Find the DC current
and voltage, rms current and voltage across a load of 1 K ohms, also find efficiency
and ripple factor. Assume the internal resistance of the secondary of the
transformer is 25 Ohms.
Given data:
FWR, Vm = 50 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 47.61mA
Rf + Rs + RL
2Im
IDC = => 30.32mA
π
VDC = IDC ∗ R L => 30.32V
Im
Irms = => 33.66mA
√2
Vrms = Irms (R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 919.3mW
2
Pac = Irms ∗ (R L + R f + R s ) => 1.189W
PDC
η= => 0.773 or 77.3%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.482
P14. A diode with forward resistance of 25 Ohms in a center tapped transformer full
wave rectifier circuit energized by a secondary voltage of each half of the
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 114
Basic Electronics [18EC14/24]
transformer is 35.35V rms sinusoidal signal. Find the DC current and voltage, rms
current and voltage across a load of 1 K ohms, also find efficiency and ripple factor.
Assume the internal resistance of the secondary of the transformer is 25 Ohms.
Given data:
FWR, Vs(rms) = 35.35 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐕𝐦 = √𝟐𝐕𝐬 => 𝟓𝟎𝐕
Vm
Im = => 47.61mA
Rf + Rs + RL
2Im
IDC = => 30.32mA
π
VDC = IDC ∗ R L => 30.32V
Im
Irms = => 33.66mA
√2
Vrms = Irms (R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 919.3mW
2
Pac = Irms ∗ (R L + R f + R s ) => 1.189W
PDC
η= => 0.773 or 77.3%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.482
P15. A diode with forward resistance of 25 Ohms in a center tapped transformer full
wave rectifier circuit is energized by a secondary voltage of each half of the
transformer is 70.7V peak to peak rms sinusoidal signal. Find the DC current and
voltage, rms current and voltage across a load of 1 K ohms, also find efficiency and
ripple factor. Assume the internal resistance of the secondary of the transformer is
25 Ohms.
Given data:
HWR, Vs(rms)P−P = 70.7 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
√𝟐𝐕𝐬
𝐕𝐦 = => 𝟓𝟎𝐕
𝟐
Vm
Im = => 47.61mA
Rf + Rs + RL
2Im
IDC = => 30.32mA
π
VDC = IDC ∗ R L => 30.32V
Im
Irms = => 33.66mA
√2
Vrms = Irms (R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 919.3mW
2
Pac = Irms ∗ (R L + R f + R s ) => 1.189W
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 115
Basic Electronics [18EC14/24]
PDC
η= => 0.773 or 77.3%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.482
P16. A diode with forward resistance of 25 Ohms in a center tapped transformer full
wave rectifier circuit is energized by a transformer of turns ration 5:1 and primary
voltage of 353.5V sinusoidal signal. Find the DC current and voltage, rms current
and voltage across a load of 1 K ohms, also find efficiency and ripple factor. Assume
the internal resistance of the secondary of the transformer is 25 Ohms.
Given data:
HWR, VP (rms) = 176.75 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐕𝐏 𝐍𝟏 𝐕𝐏
𝐕𝐬(𝐫𝐦𝐬) = (𝐒𝐢𝐧𝐜𝐞 = )
𝟓 𝐍𝟐 𝐕𝐬
𝐕𝐬(𝐫𝐦𝐬) = 𝟕𝟎. 𝟕 𝐕𝐨𝐥𝐭𝐬 (𝐭𝐨𝐭𝐚𝐥 𝐬𝐞𝐜𝐨𝐧𝐝𝐚𝐫𝐲 𝐯𝐨𝐥𝐭𝐚𝐠𝐞)
𝐕𝐬(𝐫𝐦𝐬) = 𝟑𝟓. 𝟑𝟓 𝐕𝐨𝐥𝐭𝐬 (𝐟𝐨𝐫 𝐞𝐚𝐜𝐡 𝐡𝐚𝐥𝐟 𝐨𝐟 𝐭𝐡𝐞 𝐭𝐫𝐚𝐧𝐬𝐟𝐨𝐫𝐦𝐞𝐫)
𝐕𝐦 = √𝟐𝐕𝐬 => 𝟓𝟎𝐕
Vm
Im = => 47.61mA
Rf + Rs + RL
2Im
IDC = => 30.32mA
π
VDC = IDC ∗ R L => 30.32V
Im
Irms = => 33.66mA
√2
Vrms = Irms (R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 919.3mW
2
Pac = Irms ∗ (R L + R f + R s ) => 1.189W
PDC
η= => 0.773 or 77.3%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.482
P17. A diode with forward resistance of 25 Ohms in a center tapped transformer full
wave rectifier circuit is energized by a 50sin314t supply. Find the DC current and
voltage, rms current and voltage across a load of 1 K ohms, also find efficiency and
ripple factor. Assume the internal resistance of the secondary of the transformer is
25 Ohms. Also find the frequency of the output signal and PIV.
Given data:
rad
HWR, vi = 50sinωt V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms, ω = 314 .
sec
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐯𝐢 = 𝐯𝐦 𝐬𝐢𝐧𝛚𝐭 => 𝟓𝟎𝐬𝐢𝐧𝛚𝐭
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 116
Basic Electronics [18EC14/24]
𝐕𝐦 = 𝟓𝟎𝐕
Vm
Im = => 47.61mA
Rf + Rs + RL
2Im
IDC = => 30.32mA
π
VDC = IDC ∗ R L => 30.32V
Im
Irms = => 33.66mA
√2
Vrms = Irms (R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 919.3mW
2
Pac = Irms ∗ (R L + R f + R s ) => 1.189W
PDC
η= => 0.773 or 77.3%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.482
ω
fin = => 50Hz.
2π
fout = 2fin => 100Hz.
PIV = 2Vm => 100 V
P19. Design an FWR circuit by using a transformer of turns ratio 10:1 to supply 5V
DC voltage to 1K Ohms load resistor, the diode has 25 ohms internal forward
resistance and 25 Ohms of transformer resistance.
Given data:
N1 : N2 = 10: 1, VDC = 5V, R f = R s = 25Ω, R L = 1KΩ
To find:
Vac = VP
Solution:
VDC = IDC ∗ R L
2Im
IDC =
π
2Im
VDC = ∗ RL
π
2Vm
Im =
Rf + RS + RL
RL
VDC = 2Vm ∗
R f + Rs + R L
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 117
Basic Electronics [18EC14/24]
√2Vs
Vm =
2
VP N1 VP
Vs = (Since, = )
10 N2 VS
2√2 VP RL
VDC = ( )
2 10 R f + R s + R L
VP 1000
5 = √2 ( )
10 25 + 25 + 1000
VP = 148.48V(rms)
Given data:
R L = 1KΩ, C = 100μF, f = 50Hz, Vp = 15V
To find:
Vr(p−p) , γ
Solution:
V
Vr(p−p) = => 1.5V
2fR L C
1
Ripple factor(γ) = => 0.0288
4√3fR L C
P21. A bridge type full wave rectifier circuit energized by a 50V peak sinusoidal
signal. Find the DC current and voltage, rms current and voltage across a load of 1
K ohms, also find efficiency and ripple factor.
Given data:
BT − FWR, Vm = 50 V, R L = 1KΩ
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 50mA
RL
2Im
IDC = => 31.84mA
π
2Vm
VDC = => 31.84V
π
Im
Irms = => 35.35mA
√2
Vm
Vrms =
√2
Vrms = 35.35V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 1.0137W
2
Pac = Irms ∗ R L => 1.249W
PDC
η= => 0.811 or 81.1%
Pac
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 118
Basic Electronics [18EC14/24]
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4823
P22. A diode with forward resistance of 25 Ohms in a bridge type full wave rectifier
circuit energized by a 50V peak sinusoidal signal. Find the DC current and voltage,
rms current and voltage across a load of 1 K ohms, also find efficiency and ripple
factor.
Given data:
FWR, Vm = 50 V, R L = 1KΩ, R f = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 47.61mA
2R f + R L
2Im
IDC = => 30.32mA
π
VDC = IDC ∗ R L => 30.32V
Im
Irms = => 33.66mA
√2
Vrms = Irms (2R f + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 919.3mW
2
Pac = Irms ∗ (R L + 2R f ) => 1.189W
PDC
η= => 0.773 or 77.3%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.482
P23. A diode with forward resistance of 25 Ohms in a bridge type full wave rectifier
circuit energized by a 50V peak sinusoidal signal. Find the DC current and voltage,
rms current and voltage across a load of 1 K ohms, also find efficiency and ripple
factor. Assume the internal resistance of the secondary of the transformer is 25
Ohms.
Given data:
FWR, Vm = 50 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
Vm
Im = => 46.51mA
2R f + R s + R L
2Im
IDC = => 29.62mA
π
VDC = IDC ∗ R L => 29.62V
Im
Irms = => 32.88mA
√2
Vrms = Irms (2R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
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Basic Electronics [18EC14/24]
2
PDC = IDC ∗ R L => 877.34mW
2
Pac = Irms ∗ (R L + 2R f + R s ) => 1.162W
PDC
η= => 0.755 or 75.5%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4819
P24. A diode with forward resistance of 25 Ohms in a bridge type full wave rectifier
circuit energized by a secondary voltage of 35.35V rms sinusoidal signal. Find the
DC current and voltage, rms current and voltage across a load of 1 K ohms, also find
efficiency and ripple factor. Assume the internal resistance of the secondary of the
transformer is 25 Ohms.
Given data:
FWR, Vs(rms) = 35.35 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐕𝐦 = √𝟐𝐕𝐬 => 𝟓𝟎𝐕
Vm
Im = => 46.51mA
2R f + R s + R L
2Im
IDC = => 29.62mA
π
VDC = IDC ∗ R L => 29.62V
Im
Irms = => 32.88mA
√2
Vrms = Irms (2R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 877.34mW
2
Pac = Irms ∗ (R L + 2R f + R s ) => 1.162W
PDC
η= => 0.755 or 75.5%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4819
P25. A diode with forward resistance of 25 Ohms in a bridge type full wave rectifier
circuit is energized by a secondary voltage of 70.7V peak to peak rms sinusoidal
signal. Find the DC current and voltage, rms current and voltage across a load of 1
K ohms, also find efficiency and ripple factor. Assume the internal resistance of the
secondary of the transformer is 25 Ohms.
Given data:
HWR, Vs(rms)P−P = 70.7 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
√𝟐𝐕𝐬
𝐕𝐦 = => 𝟓𝟎𝐕
𝟐
Vm
Im = => 46.51mA
2R f + R s + R L
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 120
Basic Electronics [18EC14/24]
2Im
IDC = => 29.62mA
π
VDC = IDC ∗ R L => 29.62V
Im
Irms = => 32.88mA
√2
Vrms = Irms (2R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 877.34mW
2
Pac = Irms ∗ (R L + 2R f + R s ) => 1.162W
PDC
η= => 0.755 or 75.5%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4819
P26. A diode with forward resistance of 25 Ohms in a bridge type full wave rectifier
circuit is energized by a transformer of turns ration 5:1 and primary voltage of
176.75V sinusoidal signal. Find the DC current and voltage, rms current and voltage
across a load of 1 K ohms, also find efficiency and ripple factor. Assume the internal
resistance of the secondary of the transformer is 25 Ohms.
Given data:
HWR, VP (rms) = 176.75 V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐕𝐏 𝐍𝟏 𝐕𝐏
𝐕𝐬(𝐫𝐦𝐬) = (𝐒𝐢𝐧𝐜𝐞 = )
𝟓 𝐍𝟐 𝐕𝐬
𝐕𝐬(𝐫𝐦𝐬) = 𝟑𝟓. 𝟑𝟓 𝐕𝐨𝐥𝐭𝐬
𝐕𝐦 = √𝟐𝐕𝐬 => 𝟓𝟎𝐕
Vm
Im = => 46.51mA
2R f + R s + R L
2Im
IDC = => 29.62mA
π
VDC = IDC ∗ R L => 29.62V
Im
Irms = => 32.88mA
√2
Vrms = Irms (2R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 877.34mW
2
Pac = Irms ∗ (R L + 2R f + R s ) => 1.162W
PDC
η= => 0.755 or 75.5%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4819
P27. A diode with forward resistance of 25 Ohms in a bridge type full wave rectifier
circuit is energized by a 50sin314t supply. Find the DC current and voltage, rms
current and voltage across a load of 1 K ohms, also find efficiency and ripple factor.
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 121
Basic Electronics [18EC14/24]
Assume the internal resistance of the secondary of the transformer is 25 Ohms. Also
find the frequency of the output signal and PIV.
Given data:
rad
HWR, vi = 50sinωt V, R L = 1KΩ, R f = 25 Ohms, R s = 25 Ohms, ω = 314 .
sec
To find:
IDC , VDC , Irms , Vrms , η and γ
Solution:
𝐯𝐢 = 𝐯𝐦 𝐬𝐢𝐧𝛚𝐭 => 𝟓𝟎𝐬𝐢𝐧𝛚𝐭
𝐕𝐦 = 𝟓𝟎𝐕
Vm
Im = => 46.51mA
2R f + R s + R L
2Im
IDC = => 29.62mA
π
VDC = IDC ∗ R L => 29.62V
Im
Irms = => 32.88mA
√2
Vrms = Irms (2R f + R s + R L ) = 35.34V
PDC
Efficiency(η) =
Pac
2
PDC = IDC ∗ R L => 877.34mW
2
Pac = Irms ∗ (R L + 2R f + R s ) => 1.162W
PDC
η= => 0.755 or 75.5%
Pac
Irms 2
Ripple factor(γ) = √( ) −1
IDC
γ = 0.4819
ω
fin = => 50Hz.
2π
fout = 2fin => 100Hz.
PIV = Vm => 50 V
P28. The four diodes used in a bridge rectifier circuit have forward resistances
which may be considered constant at 1Ω and infinite reverse resistance. The
alternating supply voltage is 240 V r.m.s. and load resistance is 480 Ω. Calculate (i)
mean load current and (ii) power dissipated in each diode.
Given data:
To find:
Solution:
𝑉𝑚 = √2 𝑉𝑠 => 339.41𝑉
𝑉𝑚
𝐼𝑚 = => 0.704𝐴
2𝑅𝑓 + 𝑅𝐿
2𝐼𝑚
𝐼𝐷𝐶 = => 0.448𝐴
𝜋
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 122
Basic Electronics [18EC14/24]
2
𝑃𝑑𝑖𝑠𝑠 (𝑎𝑐𝑟𝑜𝑠𝑠 𝑒𝑎𝑐ℎ 𝑑𝑖𝑜𝑑𝑒) = 𝐼𝑟𝑚𝑠 (𝑜𝑓 𝑠𝑖𝑛𝑔𝑙𝑒 𝑑𝑖𝑜𝑑𝑒) ∗ 𝑅𝑓
2 (𝑠𝑖𝑛𝑔𝑙𝑒
𝐼𝑚
𝐼𝑟𝑚𝑠 𝑑𝑖𝑜𝑑𝑒) = (𝑠𝑖𝑛𝑐𝑒, 𝑒𝑎𝑐ℎ 𝑑𝑖𝑜𝑑𝑒 𝑐𝑜𝑛𝑑𝑢𝑐𝑡𝑠 𝑜𝑛𝑙𝑦 ℎ𝑎𝑙𝑓 𝑐𝑦𝑐𝑙𝑒)
2
𝐼𝑟𝑚𝑠 = 0.352𝐴
******
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 123
Basic Electronics [18EC14/24]
1. Design of R:
Current through the Zener diode depends on input voltage. When the input voltage is maximum,
Zener current is maximum and should not increase IZ(max) rating of the Zener diode. In order to
limit this, minimum value of R should be selected.
Similarly, when the input voltage is minimum, Zener current is also minimum and it should not
fall below IZ(min) in order to do so maximum value of R should be selected.
Hence, in voltage regulator circuit, R acts as a current limiting resistor.
W.K.T.,
Vin − VZ
𝑅= − − − (1)
I
Assume IL is constant
If Vin = Vin (max)
Iz = IZ (max)
I = IZ (max) + IL
Vin (max) − VZ
R min = − − − (2)
IZ (max) + IL
If Vin = Vin (min)
IZ = IZ (min)
I = Iz (min) + IL
Vin (min) − VZ
R max = − − − (3)
IZ (min) + IL
2. IF the voltage across the Zener diode is greater than the Zener diode voltage,
then inly Zener diode is working under break down region.
3.
𝑅𝐿
𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛 ∗ − − − (4)
𝑅𝐿 + 𝑅
And 𝑉𝑜𝑢𝑡 ≥ 𝑉𝑍 − − − (5)
Solved Problems
1. Find the currents I, Iz and IL for the Zener diode voltage regulator circuit
shown in figure, justify, how the circuit maintains constant voltage across the
load if the input supply increases from 40V to 80 V
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 124
Basic Electronics [18EC14/24]
Given data:
𝑽𝒊𝒏(𝒎𝒊𝒏𝒊𝒎𝒖𝒎) = 𝟒𝟎𝑽, 𝑽𝒊𝒏(𝒎𝒂𝒙𝒊𝒎𝒖𝒎) = 𝟖𝟎𝑽, 𝑷𝒁 (𝒎𝒂𝒙𝒊𝒎𝒖𝒎) = 𝟎. 𝟕𝟓𝑾, 𝑽𝒁 = 𝟏𝟓𝑽, 𝑹 = 𝟐𝑹𝑳
= 𝟐𝑲𝜴
To find:
𝑰, 𝑰𝒁 , 𝑰𝑳 𝒂𝒏𝒅 𝒋𝒖𝒔𝒕𝒊𝒇𝒊𝒄𝒂𝒕𝒊𝒐𝒏 𝒇𝒐𝒓 𝒍𝒊𝒏𝒆 𝒓𝒆𝒈𝒖𝒍𝒂𝒕𝒊𝒐𝒏
Solution:
Verify the Zener diode is in the breakdown region or not, by finding the potential at the cathode
terminal of the Zener diode.
RL
Vout = Vin ∗
RL + R
If Vin = 40V, Vout = 20 V (> VZ , hence Zener diode is in break down region)
If Vin = 80V, Vout = 40 V (> VZ , hence Zener diode is in break down region)
PZ = VZ ∗ IZ => 0.75W
𝐈𝐙 = 𝟓𝟎𝐦𝐀
𝐕𝐙 𝟏𝟓
𝐈𝐋 = => => 𝟕. 𝟓𝐦𝐀
𝐑𝐋 𝟐𝐊
Vin − VZ
I=
R
𝐈𝐦𝐢𝐧 = 𝟏𝟐. 𝟓𝐦𝐀 𝐚𝐧𝐝 𝐈𝐦𝐚𝐱 = 𝟑𝟐. 𝟓𝐦𝐀 𝐟𝐨𝐫 𝐕𝐢𝐧 𝟒𝟎 𝐕 𝐚𝐧𝐝 𝟖𝟎𝐕 𝐫𝐞𝐬𝐩𝐞𝐜𝐭𝐢𝐯𝐞𝐥𝐲
Justification: If Vin varying from 40V to 80V, the reverse voltage applied across the Zener diode
is greater than the Zener voltage, hence Zener diode is under break down region and it acts as a
voltage source of VZ volts. RL is connected across the VZ and hence output voltage is a constant
15V.
2. Zener diode voltage regulator circuit is designed to provide 20V constant voltage across
the load of 2K Ohms, if the input is 50V find the value of series resistance required. Also
find diode current. Given PZ=0.5W and VZ =20V.
Given data:
𝑃𝑍 = 0.5𝑊, 𝑉𝑜𝑢𝑡 = 𝑉𝑍 = 20𝑉, 𝑅𝐿 = 2𝐾𝑂ℎ𝑚𝑠, 𝑉𝑖𝑛 50𝑉.
To find:
𝑅, 𝐼𝑍
Solution:
𝑉𝑖𝑛 − 𝑉𝑍
𝑅=
𝐼
𝐼 = 𝐼𝑍 + 𝐼𝐿
𝑃𝑍
𝐼𝑍 = => 25𝑚𝐴
𝑉𝑍
𝑉𝑍
𝐼𝐿 = => 10𝑚𝐴
𝑅𝐿
𝐼 = 35𝑚𝐴
𝑅 = 24.48𝐾𝑂ℎ𝑚𝑠
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 125
Basic Electronics [18EC14/24]
3. In a Zener diode voltage regulator circuit, the output requirements are 5V and 20mA
across the load, if Zener current are 5mA and 20mA, find the value of R required. Given
input DC is 10V±20%.
Given data:
𝐼𝑍 (𝑚𝑖𝑛) = 5𝑚𝐴, 𝐼𝑍 (𝑚𝑎𝑥) = 60𝑚𝐴, 𝑉𝑜𝑢𝑡 = 5𝑉, 𝐼𝐿 = 20𝑚𝐴, 𝑉𝑖𝑛 = 10𝑉 ± 20%
To Find:
𝑅_ min 𝑎𝑛𝑑 𝑅_𝑚𝑎𝑥
Solution:
𝑉𝑖𝑛(𝑚𝑖𝑛) = 10 − 20% ∗ 10 = 8𝑉
𝑉𝑖𝑛(𝑚𝑎𝑥) = 10 + 20% ∗ 10 = 12 𝑉
𝑉𝑖𝑛 (𝑚𝑎𝑥) − 𝑉𝑍
𝑅𝑚𝑖𝑛 = => 87.5 𝑂ℎ𝑚𝑠
𝐼𝐿 + 𝐼𝑍 (𝑚𝑎𝑥)
𝑉𝑖𝑛 (𝑚𝑖𝑛) − 𝑉𝑍
𝑅𝑚𝑎𝑥 = => 120 𝑂ℎ𝑚𝑠
𝐼𝐿 + 𝐼𝑍 (𝑚𝑖𝑛)
Average of Rmin and Rmax can be connected to the circuit. Hence R≈100Ohms
******
Prepared by Mohankumar V., Assistant Professor, Dept. of ECE, Dr.AIT Page 126