Chapter 01 Introduction To Computer Organization and Architecture
Chapter 01 Introduction To Computer Organization and Architecture
COMPUTER ORGANIZATION
AND ARCHITECTURE
• To understand why an
algorithm is infeasible, or
to understand why the
implementation of a
feasible algorithm is
running too slowly, a
programmer must be able
to see the program from
the computer's point of
view.
• Which is faster?
X = A + B + C + D;
OR
Temp1 = A + B;
Temp2 = C + D;
X = Temp1 + Temp2;
Computer Organization and Architecture
OVERVIEW
4. To work with
embedded systems,
there is a need to know
that these systems are
usually resource-
constrained.
And a programmer's
understanding of time,
space, and price
tradeoffs, as well as I/O
architectures, will be An embedded system is a controller with a
essential. dedicated function within a larger
mechanical or electrical system, often with
real-time computing constraints.
• Computer Architecture
and Organization is the
study of the internal
working, structuring,
and implementation of a
computer system.
• Computer Architecture is
the design of computers,
including their instruction
sets, hardware
components, and system
organization. It is often
called Instruction Set
Architecture (ISA).
It refers to the
understanding of the
components that make
up the computer and the
way they are
interconnected.
More specifically,
computer architecture
refers to the attributes of
the system that are
visible to the
programmer – those
attributes that have a
direct impact on the
execution of a program.
– Instruction Sets
– Data Representation
– Addressing Modes
– I/O Mechanisms
– Control Signals
– Technologies
– Device Implementations
Organization
Architecture
Traditional
Computer
actuator
infrared
sensor
Embedded
Computer
Interconnecting Bus
• Since there is only a single bus used, only two components may
actively communicate with each other at any one time.
• For example, if the CPU is fetching data from the main memory, no
other component may transmit data to another component.
Main or
Secondary I/O
CPU Primary
Memory Devices
Memory
collision
Interconnecting Bus
It accesses instructions in
sequence, interprets them and
then directs their
implementation.
• This fetch-decode-execute
cycle is repeated for each
succeeding instruction.
• This fetch-decode-execute
cycle is repeated for each
succeeding instruction.
each memory
cell usually
contains 8-bits
(1 byte) of data
4,294,967,294
4,294,967,295
• It should be noted
that the
performance of a
computer system is
not only measured
in terms of the
speed of its CPU.
• Most computers
follow the Von
Neumann
Architecture.
• It is also known as
the Stored Program
Architecture or the
Fetch-Decode-
Execute
Architecture.