MODULE 3-18EE53 Notes
MODULE 3-18EE53 Notes
MODULE 3
THYRISTOR
3.1 Introduction:
• Thyristors are a family of power semiconductor devices. Thyristors are used extensively in
power electronic circuits . They are operated as bistable switches, operating from
nonconducting state to conducting state. Thyristors can be assumed as ideal switches for
many applications, but the practical thyristors exhibit certain characteristics and limitations.
• Conventional thyristors are designed without gate-controlled turn-off capability, in which
case the thyristor can recover from its conducting state to a nonconducting state only when
the current is brought to zero by other means. Gate turn-off thyristors (GTOs) are designed
to have both controlled turn-on and turn-off capability.
• Compared to transistors, thyristors have lower on-state conduction losses and higher power
handling capability. On the other hand, transistors generally have superior switching
performances in terms of faster switching speed and lower switching losses. Advances are
continuously made to achieve devices with the best of both (i.e., low on state and switching
losses while increasing their power handling capability).
• Thyristors, which are being replaced by power transistors in low-and medium power
applications, are mostly used in high-power applications
• The thyristor is then said to be in the forward blocking, or off-state, condition and the
leakage current is known as off-state current IT. If the anode-to-cathode voltage VAK is
increased to a sufficiently large value, the reverse-biased junction J2 breaks.
• This breakdown is known as avalanche breakdown and the corresponding voltage is
called forward breakdown voltage 𝑽𝑩𝑶 . Because the other junctions 𝐽1 and 𝐽3 are
already forward biased, there is free movement of carriers across all three junctions,
resulting in a large forward anode current.
• The device is then in a conducting state, or on-state. The voltage drop would be due to
the ohmic drop in the four layers and it is small, typically, 1 V. In the on-state, the anode
current is limited by an external impedance or a resistance, 𝑅𝐿 , as shown in Figure a.
The anode current must be more than a value known as latching current 𝐼𝐿 to maintain
the required amount of carrier flow across the junction; otherwise, the device reverts to
the blocking condition as the anode-to-cathode voltage is reduced.
• Latching current 𝑰𝑳 is the minimum anode current required to maintain the thyristor
in the on-state immediately after a thyristor has been turned on and the gate signal has
been removed.
• Once a thyristor conducts, it behaves like a conducting diode and there is no control
over the device. The device continues to conduct because there is no depletion layer
on the junction 𝐽2 due to free movements of carriers.
• However, if the forward anode current is reduced below a level known as the holding
current 𝐼𝐻 , a depletion region develops around junction 𝐽2 due to the reduced number
of carriers and the thyristor is in the blocking state.
• The holding current is on the order of milliamperes and is less than the latching current
𝐼𝐻 That is, 𝐼𝐿 > 𝐼𝐻 .
• Holding current 𝑰𝑯 is the minimum anode current to maintain the thyristor in the on-
state. The holding current is less than the latching current.
• When the cathode voltage is positive with respect to the anode, the junction 𝐽2 is
forward biased but junctions 𝐽1 and 𝐽3 are reverse biased.
• This is like two series-connected diodes with reverse voltage across them. The thyristor
is in the reverse blocking state and a reverse leakage current, known as reverse current
IR, flows through the device.
• A thyristor can be turned on by increasing the forward voltage 𝑉𝐴𝐾 beyond 𝑉𝐵𝑂 , but such
a turn-on could be destructive.
• In practice, the forward voltage is maintained below 𝑉𝐵𝑂 and the thyristor is turned on
by applying a positive voltage between its gate and cathode. This is shown in Figure
3.2(b) by dashed lines.
• Once a thyristor is turned on by a gating signal and its anode current is greater than the
holding current, the device continues to conduct due to positive feedback, even if the
gating signal is removed. A thyristor is a latching device.\
open, various currents flow as shown in Fig. 3.3(c). As shown in this figure, the anode to
cathode current is ID. The collector current, emitter current and leakage currents of T1 are
related as
𝐼𝐶1 = 𝛼1 𝐼𝐸1 + 𝐼𝐶𝑂1 ----------------------------1
Here 𝐼𝐸1 = 𝐼𝐷 and 𝐼𝐶𝑂1 is leakage current 𝑇1 . Similarly for 𝑇2 ,
𝐼𝐶2 = 𝛼2 𝐼𝐸2 + 𝐼𝐶𝑂2 ----------------------------2
Here 𝐼𝐸2 = 𝐼𝐷 and 𝐼𝐶𝑂2 is leakage current of T2.
Therefore equation 1 and 2 can be written as,
𝐼𝐶1 = 𝛼1 𝐼𝐷 + 𝐼𝐶𝑂1
𝐼𝐶2 = 𝛼2 𝐼𝐷 + 𝐼𝐶𝑂2 --------------------------3
In Figure 3.3(c), observe that the current 𝐼𝐷 flows through the collectors of 𝑇1 and
𝑇2 , Hence we can write,
𝐼𝐷 = 𝐼𝐶1 + 𝐼𝐶2 ------------------------------4
Putting the values from equation 3 in above equation 4
𝐼𝐷 = 𝛼1 𝐼𝐷 + 𝐼𝐶𝑂1 + 𝛼2 𝐼𝐷 + 𝐼𝐶𝑂2
𝐼𝐷 = (𝛼1 + 𝛼2 )𝐼𝐷 + 𝐼𝐶𝑂1 + 𝐼𝐶𝑂2
𝐼𝐶𝑂1 +𝐼𝐶𝑂2
∴ 𝐼𝐷 = 1−(𝛼 -------------------------5
1 +𝛼 )
2
𝐼𝐶𝑂1 + 𝐼𝐶𝑂2 can be considered as total reserve leakage current of junction 𝐽2 . This current can
be denoted by 𝐼𝐶𝑂 . Then above equation can be written as,
𝐼𝐶𝑂
𝐼𝐷 = ------------------------6
1−(𝛼1 +𝛼2 )
Here ICO is the reverse leakage current of the reverse biased junction J2. And 𝛼1 is the common
base current gain of T1 and 𝛼2 is common base current gain of T2. Initially when forward
voltage is small, (𝛼1 + 𝛼2 ) is very small and less than 1. Hence forward blocking current as
given by equation 6 is also small. As forward voltage applied across the SCR increases, the
values of 𝛼1 and 𝛼2 also increase. When (𝛼1 + 𝛼2 ) tends unity, then ID approaches infinity
as given by equation 6. At this instant, internal regeneration starts and the SCR goes into
forward conduction (ON-state) mode. The current through the SCR is only limited by the
external load. Once the SCR goes into conduction, the two-transistor model is no more
applicable. Here note that the internal regeneration takes place in the SCR due to avalanche
breakdown of reverse biased junction J2. It does not take place when SCR is reverse biased.
When the current through the SCR falls below holding current, the forward blocking state is
regained. Then 𝛼1 and 𝛼1 of transistors are also reduced to small values.
Thus, the forward leakage current 𝐼𝐷 is increased due to gate drive Ig. This leakage current flows
through junction J2 and its avalanche break-down occurs at lower forward voltage. Thus with the gate
drive, the SCR is turned on at voltages less than VBO. Hence gate becomes convenient way of triggering
the SCR. Once the SCR is turned-on, the gate has no control over its conduction.
𝒅𝒗
3. :
𝒅𝒕
SCR can be thought of as a capacitor in the forward biased state. When the anode-cathode voltage
changes rapidly, leakage current thought the device increases due to internal capacitor. The leads
to turn-on of the SCR.
i) Natural Commutation:
In this type of turn-off, the supply voltage becomes zero or negative, Hence SCR is reverse
biased. Therefore, it is turned-off.
ii) Force commutation:
When the supply voltage is DC, then external commutation component are used to turn-off the
SCR. The commutation components apply reverse bias across the SCR temporarily or pass
impulse of negative current. Therefore, SCR turns-off.
The name DIAC comes from the words DIode AC switch. The
DIAC is an electronics component that is widely used to assist
even triggering of a TRIAC when used in AC switches and as a
result they are often found in light dimmers such as those used
in domestic lighting. These electronic components are also
widely used in starter circuits for fluorescent lamps. Although
the term is not often seen, DIACs may also be called
symmetrical trigger diodes: a term resulting from the symmetry
of their characteristic curve
Similarly parallel connection is used to increase current ratings. For example, current in the
circuit is 80 A. But we have a thyristor of rating 50 A. Then the problem can be solved by
connecting two thyristors in parallel as shown in Fig.(b). This makes the current sharing among
two thyristors and each one carries 80 /2 = 40 A. Thus, series and parallel connections are most
widely used to cater the need of higher voltage and currents.
NOTE:
• Refer NOTES dictated in class for String Efficiency, Derating factor
and dynamic Equalisation.
• Practice the problems on Thyristor triggering and series parallel
operation of thyristor.
3.8.2 dv/dt Protection: If the rate of rising of VAK is high then the thyristor may get turn
ON (explained earlier in dv/dt triggering). If we don’t want to turn ON the thyristor then
we have to reduce dv/dt. So, accidental turn ON due to dv/dt can be check by using the
snubber circuit shown in the figure. Here, the snubber circuit provides dv/dt protection to
the thyristor.
When switch S is closed, sudden voltage is applied to the circuit. Capacitor CS acts as a
short circuit so the voltage across SCR is zero. As time passes voltage across CS builds up
at a slow rate. Before SCR is fired by gate pulse, CS charges to full voltage Vs. When SCR
is on then the capacitor discharges through SCR. This discharging current is very high
which may destroy SCR as the resistance of the local path formed by CS and SCR is low.
A current limiting resistor RS is introduced in the circuit which helps to limit this
discharging current and protect SCR. Normally RS, CS, and load circuits form an under-
damped circuit to limit dv/dt.
When the switch closed, a sudden voltage appears across the SCR which is bypassed to
the RC network. This is because the capacitor acts as a short circuit which reduces the voltage
across the SCR to zero. As the time increases, voltage across the capacitor builds up at slow
rate such that dv/dt across the capacitor is too small to turn ON the SCR. Therefore, the dv/dt
across the SCR and the capacitor is less than the maximum dv/dt rating of the SCR.
Normally, the capacitor is charged to a voltage equal the maximum supply voltage
which is the forward blocking voltage of the SCR. If the SCR is turned ON, the capacitor starts
discharging which causes a high current to flow through the SCR.
This produces a high di/dt that leads to damage the SCR. And hence, to limit the high
di/dt and peak discharge current, a small resistance is placed in series with the capacitor as
shown in above. These snubber circuits can also be connected to any switching circuit to limit
the high surge or transient voltages.
3.9.1 Firing Circuits for the SCR: Thyristor can be turned on by following:
(1) Forward break-over voltage
(2) dv/dt triggering
(3) Exceeding internal device temperature.
(4) Focusing light beam on the junction.
(5) Gate triggering.
The gate triggering is the most widely & Commonly used method of turning on the thyristor.
3.10 Features of Firing Circuits: The triggering circuits are called firing circuits. We have
already discussed the requirements of gate trigger circuits. The following features or
requirements must be fulfilled by the firing circuit in addition to those discussed earlier.
(i) The firing circuit should produce the triggering pulses for every thyristor at appropriate
instants.
(ii) The triggering pulses generated by the control circuit need to be amplified and passed
through the isolation circuit. The triggering pulses generated by the control circuit have very
small power. Hence their power is increased by pulse amplifier. Fig. (a) shows the scheme.
The firing circuit operates at low voltage levels (5 to 20 volts). And the thyristor operates at
high voltage levels (greater than 250 volts). Hence there must be electrical isolation between
firing circuit and thyristor. This isolation is provided by the pulse transformer or optocouplers.
The resistance Rb is the stabilizing resistance. The voltage across Rb should not exceed
minimum gate voltage Vg(min), otherwise thyristor will turn-on directly. Then the variable
resistance R is used to trigger the thyristor T1. When ‘Rv’ is zero, the triggering angle is
minimum. The triggering angle increases as value of ‘Rv’ is increased. In the waveform shown
in figure, The anode to cathode voltage and the gate current are in phase. Hence the triggering
angle of T1 cannot be delayed beyond 90𝑜 .
3.10.2 Full Wave RC-Firing Circuit: It is shown in Figure 3.7(a). The supply to the thyristor
is given through the uncontrolled rectifier. Hence both the half cycles are positive half cycles
to the thyristor. The capacitor starts charging in every half cycle at the beginning. Whenever
the capacitor voltage reaches to the value greater than 𝑣𝑔𝑚𝑖𝑛 , the thyristor turns-on. From the
waveforms of this circuit, it is observed that once the thyristor turns-on, the capacitor voltage
is clamped to zero, till next half cycle. The capacitor again starts charging from zero. The firing
angle can be varied from 0 to 180. The triggering is controlled in both the cycles. The following
relation holds for maximum firing angle,
0.157
𝑅𝐶 ≥ 2𝜋𝑓
• The supply voltage is rectified and given to the Zener regulator. The voltage of Zener
diode is Vz. The Zener diode clamps the rectified voltage to Vz as shown in the
waveforms of Figure 3.8. Hence voltage Vz is applied to the UJT circuit.
• The capacitor charges through resistance Rc. When the capacitor voltage becomes
equal to Vp, the peak voltage of the UJT, it turns-on. The capacitor discharges through
emitter (E), base (B1) and primary of pulse transformer. The UJT is turned-on when
the capacitor discharges. Since current flows through the primary of pulse transformer,
a pulse is generated. This pulse as shown in Fig. 3.9 is the gate triggering pulse.
• When the capacitor discharges to a voltage called valley voltage ( Vv), the UJT turns-
off and capacitor again starts charging from pedestal level. This mode of working of
UJT is called relaxation oscillator.
• The delay angle '𝛼is the angle when first triggering pulse is generated in the half cycle.
The charging of the capacitor can be varied by resistance Rc. Hence delay angle can
also be varied. The UJT trigger circuit has the firing angle range from 0 to 180𝑜 .
The zener voltage acts as a supply voltage for UJT relaxation oscillator. This voltage
becomes zero at 0, 𝜋,2𝜋, 3𝜋, 4𝜋.... etc. The capacitor voltage also becomes zero at these
instants. Thus, synchronization with zero crossings is achieved. The UJT trigger circuit can be
used to trigger SCRs in 1𝜙 converters, 1ϕ AC regulators etc.
• We can see from the equivalent circuit above, that the N-type channel basically consists
of two resistors RB2 and RB1 in series with an equivalent (ideal) diode, D representing
the p-n junction connected to their center point. This Emitter p-n junction is fixed in
position along the ohmic channel during manufacture and can therefore not be changed.
• Resistance RB1 is given between the Emitter, E and terminal B1, while resistance RB2 is
given between the Emitter, E and terminal B2. As the physical position of the p-n
junction is closer to terminal B2 than B1 the resistive value of RB2 will be less than RB1.
• The total resistance of the silicon bar (its Ohmic resistance) will be dependent upon the
semiconductors actual doping level as well as the physical dimensions of the N-type
silicon channel but can be represented by RBB.
• These two series resistances produce a voltage divider network between the two base
terminals of the unijunction transistor and since this channel stretches from B2 to B1,
when a voltage is applied across the device, the potential at any point along the channel
will be in proportion to its position between terminals B2 and B1. The level of the
voltage gradient therefore depends upon the amount of supply voltage.
• When used in a circuit, terminal B1 is connected to ground and the Emitter serves as
the input to the device. Suppose a voltage VBB is applied across the UJT
between B2 and B1 so that B2 is biased positive relative to B1. With zero Emitter input
applied, the voltage developed across RB1 (the lower resistance) of the resistive voltage
divider can be calculated as:
• For a unijunction transistor, the resistive ratio of RB1 to RBB shown above is called
the intrinsic stand-off ratio and is given the Greek symbol: η (eta). Typical standard
values of η range from 0.5 to 0.8 for most common UJT’s.
• If a small positive input voltage which is less than the voltage developed across
resistance, RB1 ( ηVBB ) is now applied to the Emitter input terminal, the diode p-n
junction is reverse biased, thus offering a very high impedance and the device does not
conduct. The UJT is switched “OFF” and zero current flows.
• However, when the Emitter input voltage is increased and becomes greater
than VRB1 (or ηVBB + 0.7V, where 0.7V equals the p-n junction diode volt drop) the p-
n junction becomes forward biased and the unijunction transistor begins to conduct.
The result is that Emitter current, ηIE now flows from the Emitter into the Base region.
• The effect of the additional Emitter current flowing into the Base reduces the resistive
portion of the channel between the Emitter junction and the B1 terminal. This reduction
in the value of RB1 resistance to a very low value means that the Emitter junction
becomes even more forward biased resulting in a larger current flow. The effect of this
results in a negative resistance at the Emitter terminal.
• Likewise, if the input voltage applied between the Emitter and B1 terminal decreases to
a value below breakdown, the resistive value of RB1 increases to a high value. Then
the Unijunction Transistor can be thought of as a voltage breakdown device.
• So we can see that the resistance presented by RB1 is variable and is dependant on the
value of Emitter current, IE. Then forward biasing the Emitter junction with respect
to B1 causes more current to flow which reduces the resistance between the
Emitter, E and B1.
• In other words, the flow of current into the UJT’s Emitter causes the resistive value
of RB1 to decrease and the voltage drop across it, VRB1 must also decrease, allowing
more current to flow producing a negative resistance condition.
the discharging time is a lot less than the charging time as the capacitor discharges
through the low resistance UJT.
• When the voltage across the capacitor decreases below the holding point of the p-n
junction ( VOFF ), the UJT turns “OFF” and no current flows into the Emitter junction
so once again the capacitor charges up through resistor R3 and this charging and
discharging process between VON and VOFF is constantly repeated while there is a
supply voltage, Vs applied.
• Then we can see that the unijunction oscillator continually switches “ON” and “OFF”
without any feedback. The frequency of operation of the oscillator is directly affected
by the value of the charging resistance R3, in series with the capacitor C1 and the value
of η.
• The output pulse shape generated from the Base1 (B1) terminal is that of a sawtooth
waveform and to regulate the time period, you only have to change the ohmic value of
resistance, R3 since it sets the RC time constant for charging the capacitor.
• The time period, T of the saw-tooth waveform will be given as the charging time plus
the discharging time of the capacitor. As the discharge time, τ1 is generally very short
in comparison to the larger RC charging time, τ2 the time period of oscillation is more
or less equivalent to T ≅ τ2. The frequency of oscillation is therefore given by ƒ = 1/T.