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Assignment Endsem EC331 Upload

This document contains an end term assignment for a Microelectronics course. It consists of 7 questions related to microelectronic device fabrication processes and calculations. The questions cover topics like ion implantation dose calculations, modeling implantation profiles, oxidation modeling, MOSFET parameter extraction, cross-sectional device sketches after processing steps, integrated circuit layout, and thin film deposition modeling. Students are required to show work and provide thorough explanations for full credit. The assignment is out of a total of 75 marks and all questions are compulsory. Reference tables for ion implantation range and straggle are provided to aid calculations.

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Pranshu Koshta
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© © All Rights Reserved
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Download as PDF, TXT or read online on Scribd
7 views

Assignment Endsem EC331 Upload

This document contains an end term assignment for a Microelectronics course. It consists of 7 questions related to microelectronic device fabrication processes and calculations. The questions cover topics like ion implantation dose calculations, modeling implantation profiles, oxidation modeling, MOSFET parameter extraction, cross-sectional device sketches after processing steps, integrated circuit layout, and thin film deposition modeling. Students are required to show work and provide thorough explanations for full credit. The assignment is out of a total of 75 marks and all questions are compulsory. Reference tables for ion implantation range and straggle are provided to aid calculations.

Uploaded by

Pranshu Koshta
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Indian Institute of Technology (IIT) – BHU

B.Tech III (V Sem), Electronics Engg., End Term Assignment, 2020-21

EC-331, Microelectronics

Duration: 1 day Max. Marks: 75

Note: 1. Answer all parts of a question at the


same place. 2. All the questions are compulsory 3.
The symbols have their usual meaning. 4. If any
question appears to be ambiguous, use your own
interpretation with suitable justification.

Q.1. Calculate the Dt product required to form a 0.2µm deep source-drain diffusion for an
NMOS transistor using a solid solubility limit arsenic deposition at 1000oC into a wafer with
background concentration of 3x1016 cm-3. [8 marks]

Q. 2. Phosphorus with an energy of 100KeV is implanted into silicon wafer.


(a) What are the range and straggle associated with this implantation?
(b) What should be the implantation dose be if peak concentration of 1x1017 cm-3 is desired?
(c) What length of time is required to implant this dose into a wafer of 200mm using a 2µA
beam current with singly ionized phosphorus? [12 marks]

Q. 3. A boron implantation is to be performed through a 50nm gate oxide so that the peak of
the distribution is at the Si/SiO2 interface. The dose of implantation in silicon is to be 1x1013
cm-2. (a) What is the energy of the implant and the peak concentration at the interface.
(b) How thick should the SiO2 layer be in the areas that are not to be implanted if the
background concentration is 1x1016 cm-3.
(c) Suppose the oxide thickness other than the gate oxide is 50nm. How much photoresist is
required on top of the field oxide to completely mask the ion implantation. [12 marks]

Q.4. An enhancement-type nMOSFET transistor has the following parameters:


[8 marks]
VT0=0.8V, kn= 20 µA/V2
(a) When the transistor is biased with VG= 2.8 V, VD= 5 V, VS = 1V,
and VB = 0V, the drain current is ID = 0.24 mA.
(b) Calculate ID for VG= 5 V, VD= 4 V, VS= 2 V, and VB= 0 V.
(c) If µn = 500 cm2/Vs and Cg = CoxWL = 1.0 x 10-15F, find the value of W and L for the device.

Q.5. Sketch accurately the cross-sections of the following structure after each of the process
steps indicated. Your sketches have to be proportional and show topography variation of oxide
thickness, steps in Si substrate etc.
a. Step (1) Etch 0.5 m oxide with buffered HF
b. Step (2) Oxidize in steam for 3 hours at 1000°C
c. Step (3) Etch 0.3 m oxide with buffered HF and selective removal of nitride.
(Hint: Use the oxide growth charts to get the oxide thickness values in different regions after
step-2) [12 marks]

Q.6. We would like to implement a simple RC low-pass filter in integrated form. The top view,
the equivalent circuit, and the cross-section along line AB are shown below. The resistor body is
lightly doped (n -) poly-Si and the top capacitor plate is heavily doped (n + ) poly-Si. Sketch the
cross-sections along AB after major processing steps. How many masks you would need?
[12 marks]
Q. 7. (a) Sketch the cross-sections of the deposited film for a completely conformal deposition
on the substrate shown below. Indicate the film topography when the deposited thickness is (i)
0.5 m, (ii) 1.0 m, (iii) 1.5 m, and (iv) 2.0 m.

(b) If you want to planarize a trench by depositing a material, what is the thickness required to
obtain a planarized surface for a substrate with various trench aspect ratios (just explain whether
the thickness you need is higher or lower as the aspect ratio increases). [11 marks]

__________________________________Assignment Ends____________________________

Date Can be used from the following graphs placed in next 3 pages
Straggle for Ion implantation
Mean Range of implantation

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