ECED3204: Microprocessor

Part IV--
IV--Timer
Timer Function

J
Jason J
J. G
Gu
Department of Electrical and Computer Engineering
Dalhousie University

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 Outline

i. Introduction to the Microcontroller Timer

System
ii. Overview of the Mega AVR Timer System
iii. Ti
Timer Cl
ClockkSSource Selection
S l ti
iv. Timer/Counter Operation Modes
v
v. Applications of Each Timer/Counter
Operation Mode

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 Introduction to the Microcontroller Timer
System

„ Cl k iinput
Clock
„ Supplied from I/O pin: counter
„ Generated from MCU clock circ
circuit:
it timer mode
„ Using a timer to create time delays
„ Counts up: nn-bit
bit timer: counts up from 0 and reaches
2n – 1; overflows and rolls back to 0
„ Counts down

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 Introduction to the Microcontroller Timer
System: Input capture
„ Input capture: involves external signal applied to
an input-capture
i pin
i (ICP)
(ICP), iinvolve
l TCNT
TCNT, ICR
ICR.
„ To measure period, width, duty cycle.

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Introduction to the Microcontroller Timer
System: Output compare
„ Module includes output compare register (OCR), one
or more control registers, one or more status
registers, and a base timer/counter (TCNT) register.
A output compare pin is also provided
„ To use output compare function,
function we need to take the
following action:
„ make a copy of the TCNT register
„ add an appropriate delay count to this copy
„ store the sum in the OCR register.
„ Output compare function is used to generate periodic
interrupts, create time delays, trigger events,
generate waveforms, etc.

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 Introduction to the Microcontroller Timer
System: Pulse
Pulse-Width
Width Modulation

„ Pulse-Width
Pulse Width Modulation (PWM): waveform
continues by itself until the duty cycle or period
must be changed
„ Implemented through special circuitry added to the
timer system so that the CPU only has to set up the
duty cycle and period once
„ PWM module consists of an output pin, a
timer/counter a period register
timer/counter, register, a duty register
register.
„ There are single slope and dual slope PWM

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Introduction to the Microcontroller Timer
System (cont
(cont’d.)
d.)

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Introduction to the Microcontroller Timer
System (cont
(cont’d.)
d.)

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 Overview of the Mega
g AVR Timer System
y
„ ATMega640/1280/2560 devices have six timers
„ Timer 0 and
Ti d 2 are 8
8-bit
bit titimers
„ Timer 1, 3, 4, and 5 are 16-bit timers
„ All timers except Timer2 derive their clock input by dividing
the internal CLKI/O by prescaler or from external pin
„ Timer2 derived its clock by dividing one of following three
source: CLKI/O
CLKI/O, external 32
32.768KHz,
768KHz external clock to
TOSC1

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Overview of the Mega
g AVR Timer System
y
„ Timer 0 and 2 are 8-bit timers
„ Timer 0 has two output
output-compare
compare units (OC0A and OC0B)
OC0B).
Each output compare unit generate PWM output. Timer 0 has
three interrupt sources TOV0, OC0A,OC0B
„ Timer 2 is identical to timer 0 except it may also select clock
source.
„ Timer 1, 3, 4, and 5 are 16-bit timers
„ Each 16 bit timer has one input capture unit. (ICn,n=1,3,4,5)
„ Three independent output-compare units
(OCnA,OCnB,OCnC, n=1,3,4,5)
„ Five interrupt sources TOVn,ICFn,OCFnA,OCFnB,OCFnC
(n=1,3,4,5)

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 Overview of the Mega
g AVR Timer System
y
„ Timers pin assignment
„ Timers share the use of signals with other peripheral signals and general
I/O pins

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 Overview of the Mega AVR Timer
System (cont
(cont’d.)
d.)
„ 8-bit timer building blocks
„ Major components: count unit, output-compare
output compare unit,
and compare match output unit

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 Overview of the Mega AVR Timer
System (cont
(cont’d.)
d.)
„ 16-bit timer building blocks
„ Major
M j components:
t countt unit,
it input-capture
i t t unit,
it
output-compare unit, and compare match output unit

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 Timer Clock Source Selection

„ Timer/counter: requires a clock input to count

„ Clock source: selected by programming the
Timer/Counter control register B (TCCRnB, n =
0 …, 5)
0,

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Timer Clock Source Selection

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Timer Clock Source Selection

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Timer Clock Source Selection

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Timer Clock Source Selection

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 Timer/Counter Operation
p Modes

„ Timer/counter (8
(8- or 16-bit)
16 bit) operation modes:
normal, CTC, fast PWM, phase-correct PWM, and phase-
and-frequency-correct PWM
„ 8-bit timer/counter operation modes
„ Timer operation mode: selected by the Timer/Counter
control register A ( TCCRnA
TCCRnA,
n = 0, …, 5) and one or two bits in the Timer/Counter
control register B (TCCRnB,
n=0 0, …, 5)

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Timer/Counter Operation
p Modes

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Timer/Counter Operation
p Modes

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Timer/Counter Operation
p Modes

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Timer/Counter Operation
p Modes

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Timer/Counter Operation
p Modes

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Timer/Counter Operation
p Modes

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Timer/Counter Operation
p Modes

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 Timer/Counter Operation Modes (cont
(cont’d.)
d.)
„ 16-bit timer/counter operation modes
„ Refer to Table 11.6
„ Selected by programming the GMn3:WGMn2 bits of
the Timer/Counter control register B (TCCRnB, n = 1,
3 4
3, 4, or 5)) together
h with
i h the
h WGM
WGMn1:WGMn0
1 WGM 0 bi bits off
the Timer/Counter control register A (TCCRnA, n = 1,
3,, 4,, 5))
„ 16 bit timer and output compare register are divided
into high byte (TCNTnH, OCRnxH) and low byte
(TCNTnL OCRnxL).
(TCNTnL, OCRn L) read access start from lo
low bbyte,
te
write access start from the high byte.

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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Timer/Counter Operation Modes (cont
(cont’d.)
d.)

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 Applications of Each Timer/Counter
Operation Mode

„ Timer/counter uses: create time delay, generate

waveforms, and measure signal parameters
„ Five operation mode
„ Normal
„ CTC
„ Fast PWM
„ Phase-correct PWM
„ Phase –and-frequency-correct PWM

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 Using
g the Timer Normal Mode

„ Timer counts up from 0 to the TOP value, rolls

over to 0, and then counts up again. TOVn is set
t 1 when
to h theth ti
timer rolls
ll over tto 0
0.
„ Using the normal mode in creating time delays
„ 8-bit
8 bit titimer nott used
d iin thi
this mode
d why?
h ? ttoo short.
h t
„ Time-delay methods: timer overflow and output-
compare match

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 Using
g the Timer Normal Mode

„ Timer overflow: let the timer count up from

certain value until it overflows. Calculate the
ti
timer countt (TC) tot create
t the
th delay
d l TD.
TD place
l
the value 2n-TC in the timer, let it count up and
wait until it overflows
overflows.
„ Output-compare match: calculate TC, add this to
current time value
value, place sum in OCRnx
OCRnx, let the
timer to count up until its value matches OCRnx.

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 Using
g the Timer Normal Mode: example
p

„ example: write a function to create a delay of

25ms using the timer/ counter 1. assuming
f lk I/O 1MHz
fclk_I/O 1MH

„ choosing clk_I/o as the input and setting

prescaler to 8, the timer count require to create a
(25 10-33*10
25ms delay is 31250 (25*10 106/8)

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Using
g the Timer Normal Mode: example
p
//timer overflow method, using TCCR1B,TCCR1A, TCNT1H,TCNT1L, TIFR1, TOV1
.include <M644Adef.inc>
.def tmp1 = r20
Delay25: ldi tmp1, 0 ; normal mode
sts TCCR1A,tmp1
ldi tmp1, 0x02 ; clk_I/O/8
sts , p
TCCR1B,tmp1
Wp25: ldi tmp1, high(344286) ; timer 1 count is 216-31250
sts TCNT1H,tmp1
ldi tmp1,low(344286)
sts TCNT1L tmp1
TCNT1L,tmp1
ldi tmp1, 1<<TOV1
sts TIFR1,tmp1 ;write 1 to TOV1 to clear it
Wt25: lds tmp1,TIFR1 ; wait until TOV1 flag is set to 1
sbrs tmp1 TOV1
tmp1,
rjmp wt25
dec r16
brne wp25 ;if r16 not zero, delay again.
rett
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Using
g the Timer Normal Mode: example
p

//output compare match in C, using TCCR1A,TCCR1B, TCNT1, OCR1A, TIFR1

void dly25msOC(unsigned char cx)

{
TCC1A = 0; // configure timer 1 in normal mode
TCC1B = 0x02; // clk/8
while(cx){
OCR1A = TCNT1+31250; //start compare function
TIFR1 = 1 << OCF1A; // clear OCF1A flag
while(!(TIFR1 & (1<<OCF1A))); // wait until OCF1A flag set
cx - -;
}
}

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 Using the Timer Normal Mode (cont’d.)

„ Using the timer normal mode in waveform

generation
„ Pin action of compare match toggle
(COMnx1:COMnx0 = 01) of normal mode: used to
generate periodic square wave with any duty cycle
„ Reliant upon frequent CPU involvement

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 Using the Timer Normal Mode (cont’d.)

„ example:
l write
it a sequence off AVR iinstructions
t ti
and C statements to be executed by ATMega644
MCU to generate a 2KHz waveform with 80%
duty cycle from the OC1B pin using timer 1,
assuming g fclk_I/O=16MHz
_
„ selecting clk_I/O/8 as source, high and low of the
2KHz wave form consist of 800 and 200 timer
clock cycles.

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 Using the Timer Normal Mode (cont’d.)
// using TCCR1A, TCCR1B, TCCR1C,OCR1A,
#include <avr\io.h>; TIMSK1, TIFR1, Using interrupt, compiled
#include <avr\interrupt.h>
#define hiCnt 800
#define loCnt 200 ISR(TIMER1_COMPA_VECT)
#define HI 1 {
#define LO 0 if(HIoLO) {
char HIoLO; OCR1A = OCR1A+hiCnt;
void
d main(void)
( d) HI LO = LO;
HIoLO LO
{ } else {
DDRB |=0x20; // OC1A output OCR1A = OCR1A+loCnt;
TCCR1B =0x02; // normal, clk/8 HIoLO = HI;
TCCR1C |=0x80; // force OC1A high }
TCCR1A =0x40; //select toggle }
OCR1A =TCNT1+hiCnt; // first compare
HIoLO =LO;
TIMSK1 |=0x02; //enable OC1A interrupt
TIFR1 =0x02 ; //clear OCF1A
sei(); //; enable interrupt globally
while(1);
}

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Using the Timer Normal Mode (cont’d.)

„ Using the normal mode to make sound

Figure 11.17 Circuit connection for a speaker

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 Using the Timer Normal Mode (cont’d.)
Use OC1A pin of timer 1 to generate two tone siren 440HZ
and 880Hz, assuming clk_I/O
clk I/O is 16MHZ ( asm and C)
step1: connect speaker to OC1A
step2: configure timer1 normal mode, compare match output
step3: Enable OC1A interrupt, start OC1A operation with 2273 (440HZ)as
delay
step4: write the service routine for OC1A interrupt, restarts OC1A
operation
ti withith 2273 as d
delay
l
step 5: wait half second
step 6: change the delay count for the OC1A operation to 1136 (880HZ),
and use it for OC1A interrupt service routine
step 7: wait for half second
step 8: change the delay to 2273 and go to step 5

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 Using the Timer Normal Mode (cont’d.)

„ U i th
Using the normall mode
d tto play
l a song
„ Created by modifying the siren program
„ Song played using a speaker
„ Table with frequencies and durations of all the notes in a
music score
„ Program uses output-compare function to generate the digital
waveform with the specified frequency and duration of each
note
„ Song played in Assembling
„ Song played in C

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 Using
g the Timer Normal Mode (cont’d.)
( )
„ Using the normal mode to measure signal
frequency
q y
„ Signal used as the clock source of the timer/counter
„ ldi tmp 7; //CSn2-CSn0: 111
„ sts
t TCCRnB,
TCCR B ttmp; //external
// t l clock
l k on pin,
i rising
i i edge,
d
„ Frequency of the unknown signal
Frequency
q y = tovCnt × 216 + final Timer
count
where tovCnt represents the number of times that
timer n overflows during the 1-sec period
„ Example in ASM. Example in C

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 Using the Timer Normal Mode (cont’d.)

„ Measuring signal period using the normal mode

„ Step 1: Configure the timer/counter properly
„ Step 2: Wait
a t for
o tthe
e first
st rising
s g edge to a
arrive
e
„ Step 3:
„ Enable timer overflow interrupt and cleared ICF and TOV
fl
flags; iinitialize
iti li titimer overflow
fl countt tto 0
0; fforce ti
timer/counter
/ t tot
count up from 0
„ Step 4: Wait for the arrival of the second rising edge

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Using the Timer Normal Mode (cont’d.)

Example
p : Write a C p program
g to measure
the pulse width of a signal connected to
the ICP1 pin of the MEGA2560 MCU MCU.

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Using the Timer Normal Mode (cont’d.)
#include <avr/io.h>
#include <avr/interrupt.h>
unsigned char tovCnt;
unsigned long int pulseWidth; ISR(TIMER1_OVF_vect)
ISR(TIMER1 OVF vect)
int main(void) {
{ tovCnt++;
tovCnt = 0; }
TCCR1A = 0; // configure timer1 to normal mode
DDRD & 0xEF;
&= 0 // configure
fi PD4/ICP1
/ C pin i for
f iinput
TIFR1 = 0x2F; // clear all timer1 flags
TCCR1B = 0x42; // capture the rising edge
while(!(TIFR1 & (1 << ICF1))); // wait for the arrival of the rising edge
TCNT1 = 0; // force timer1 to count up from 0
TIFR1 = 0x21; // clear TOV1 and ICF1 flags
TIMSK1 = 0x01; // enable TOV1 interrupt
TCCR1B = 0x02; // prepare to capture the falling edge
sei(); // enable interrupt globally
while(!(TIFR1 & (1 << ICF1))); // wait for the arrival of the falling edge
TCCR1B = 0; // stop timer 1
pulseWidth = (unsigned long)tovCnt * 65536 + (unsigned long)TCNT1;
return 0;
}

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 Using the CTC Mode

„ Clear timer on compare match (CTC) mode

„ Using the CTC mode to create time delay
„ OCRnA or ICRn register used to hold the
TOP value of the timer
„ Using the CTC mode to generate
waveform
{{

CLK I/O ÷ Timer p

TOP = (fCLK_I/O prescaler) ÷ (2 ×
fW) – 1

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 Using the CTC Mode

Write an AVR assembly

assembl program to generate a periodic
square wave with 2-kHz frequency and 50% duty cycle
using the Timer 1 CTC mode of the ATmega640/1280/2560
device.
Solution: By setting the prescaler to 1, the TOP value to be
loaded into the ICR1 register is
TOP = (16 × 106 ÷ 1) ÷ (2 × 2 × 103) = 4,000
Th assembly
The bl program ththatt generates
t thithis waveform
f is
i as
follows:

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Using the CTC Mode
.include <m2560def.inc>
.def tmp = r16
.cseg
.orgg 0x00
rjmp start
.org 0xF6
start: ldi r16,low(RAMEND)
out SPL,r16
ldi r16,high(RAMEND)
out SPH,r16
ldi r16,0x20 ; configure PB5/OC1A pin for output
sts DDRB,r16 ; “
ldi tmp,0x40 ; configure Timer1 to CTC mode (WGM13:0: 1100)
sts TCCR1A,tmp ; and make OC1A pin toggle
clr tmp ; force timer1 to count up from 0
sts TCNT1L,tmp ; "
sts TCNT1H,tmp ; "
ldi tmp,high(4000) ; place 4000 as the TOP value
sts ICR1H,tmp ; "
ldi tmp,low(4000) ; “
sts ICR1L,tmp ; "
ldi tmp,0x19 ; clk_IO as the clock input to timer 1 and start
sts TCCR1B,tmp ; to generate the 2‐kHz square wave with 50% duty cycle
again: jmp again

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 Using the Fast PWM Mode
„ Compare match pin action in fast PWM mode

Figure 11.18 Fast PWM mode waveforms

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 Using the Fast PWM Mode (cont’d.)

„ Using
g OCRnA to hold the TOP value
„ Advantage: generated PWM waveform is always
symmetric
„ Using ICRn to hold the TOP value
„ Works well when the TOP value is fixed
„ Extreme cases for the fast PWM
„ OCRnx register is set equal to the BOTTOM
„ S tti the
Setting th OCRnx
OCR equall tto TOP

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Using the Fast PWM Mode (cont’d.)
Example: Write a sequence of C statements to be run on a
g
ATmega640/1280/2560 demo board to generate
g a 200-Hz
frequency waveform with a 70% duty cycle in fast PWM mode
from the OC1A pin and use ICR1 to hold the TOP value
assuming that fclk_I/O
lk I/O = 16 MHz.

Solution:
DDRB = 0x20; // configure PB5/OC1A pin for output
TCNT1 = 0;
0 // force
f ti
timer1 1 to
t countt up ffrom 0
ICR1 = 10000; // set counter TOP value to 10,000
OCR1A = 7000; // set duty cycle to 70%
TCCR1A = 0x82;; // select non‐inverting,g, fast PWM mode
TCCR1B = 0x1A; // select clk_IO/8 as clock source and ICR1A as TOP

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 Using the Fast PWM Mode (cont’d.)

„ example:
l write
it a sequence off AVR iinstructions
t ti
and C statements to be executed by ATMega640
MCU to generate a 2KHz waveform with 80%
duty cycle from the OC1B pin using timer 1,
assuming g fclk_I/O=16MHz
_
„ selecting clk_I/O/8 as source, high and low of the
2KHz wave form consist of 800 and 200 timer
clock cycles.

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Using the Fast PWM Mode (cont’d.)
solution: We will use the fast-PWM non-inverting mode to generate this waveform.
We will set the clock source to clk_I/O ÷ 64. The TOP value is calculated to be 16 × 106 ÷ 64 ÷ (2×
103) = 125. The value to set the duty cycle is 125 × 80% = 100.
Assembly program to generate a 2-kHz2 kHz waveform with 80% duty cycle that uses fast-PWM
fast PWM non-
non
inverting mode is as follows:
.def tmp = r16
ldi tmp,0x20 ; configure OC0B/PG5 pin for output
sts DDRG,tmp ; “
ldi tmp,0x23 ; select non‐inverting fast PWM mode
out TCCR0A,tmp ; use OCR0A as TOP value
ldi tmp,125 ; set period to 0.5 ms
out OCR0A,tmp ; “
ldi tmp,100
p, ; set dutyy cycle
y to 80%
out OCR0B,tmp ; “
ldi tmp,0x0B ; select clk_I/O / 64 as timer clock input
out TCCR0B,tmp ; “
C program to generate a 2‐kHz waveform with 80% duty cycle is as follows:
DDRG |= 0x20; // configure OC0B/PG5 pin for output
TCCR0A = 0x23; // select non‐inverting PWM mode
OCR0A = 125; // set up signal period to 0.5 ms
OCR0B = 100; // set up waveform duty cycle to 80%
TCCR0B = 0x0B; // select clk_I/O / 64 as timer 0 clock input

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Using the Phase
Phase-Correct
Correct PWM Mode

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 Using the Phase
Phase-Correct
Correct PWM Mode

„ The choice of the TOP value

„ 8-bit timer: 0×FF or the OCRnA register (n= 0 or 2)
„ 16-bit timer: 0×00FF, 0×01FF, 0×03FF, the value in
th OCRnA
the OCR A register,
i t or th
the value
l iin th
the ICR
ICRn register
i t

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 Using the Phase-Correct PWM Mode (cont’d.)

„ Pin action on compare match in the phase-

correct PWM mode
„ Refer to Tables 11
11.44 and 11
11.9
9
„ Only the pin action choice 2 (non-inverting mode) and
3 ((inverting
g mode)) should be selected

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 Using the Phase-Correct PWM Mode (cont’d.)

„ Example: Use the OC0A

OC pin to generate a 40% %
duty cycle PWM waveform using the phase
correct PWM non inverting mode
mode. Assuming
clk_I/O is 16MHA and the prescaler is set to 8.

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 Using the Phase-Correct PWM Mode (cont’d.)

;TOP value is set to OXFF

.include <m2560def.inc> DDRB |=0x80;
.cseg TCCR0A =0x81;
;
.org 0x00 TCCR0B =0x02;
Rjmp start OCR0A =102
.org 0xF6 TCNT0 =0;
start: ldi r20,low(RAMEND)
out SPL,r20
Ldi r20 high(RAMEND)
r20,high(RAMEND)
out SPH,r20

.def tmp = R16

ldi tmp,0x80; configure the PB7/OC0A pin for output
out DDRB,tmp; "
ldi tmp,0x81; configure OC0A to phase‐correct PWM,
;non‐inverting mode
out TCCR0A,tmp; "
ldi tmp,0x02; select clk_I/O / 8 as the clock source
out TCCR0B,tmp; to TCNT0
ldi tmp,102; set duty cycle to 40%
out OCR0A,tmp; "
ldi tmp,0; force TCNT0 to count up from 0
out TCNT0,tmp; "

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 Using the Phase and Frequency Correct
PWM Mode

„ Based
B d on a d
dual-slope
l l operation
ti
„ Available only in a 16-bit timer
„ Counter counts repeatedly from BOTTOM to
TOP and then from TOP to BOTTOM
fPFCPWM = (fCLK_I/O ÷ timer prescaler) ÷
(2 × TOP)
„ The procedure of generating the PWM waveform
using PFCPWM is identical to the PCPWM mode

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Using the Phase and Frequency Correct
PWM Mode
Example: Write a sequence of AVR instructions to
be run on a ATmega640/1280/2560 demo board to
generate a 50-Hz PWM waveform with 5% duty
y usingg the p
cycle phase‐and‐frequency‐correct
q y PWM
from the OC1A pin and use ICR1 to hold the TOP
value assuming that fclk_I/O = 16 MHz.
Solution:
We will select clk_IO/8 as the clock source to Timer1 and the TOP
value is calculated to be
TOP = 16 × 106 /(2 × 8 × 50) = 20,000
The value to set duty cycle to 5% is 20,000 * 5% = 1000.

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Using the Phase and Frequency Correct
PWM Mode
ldi r16,0x20 ; configure PB5/OC1A pin for output
sts DDRB,r16 ; "
ldi r16,0x2F ; clear all Timer1 flags
sts TIFR1,r16 ; "
clr r16 ; force Timer1 to count up from 0
sts TCNT1H,r16 ; "
sts TCNT1L,r16 ; "
ldi r16,high(20000) ; set up TOP value
sts ICR1H,r16 ; "
ldi r16,low(20000) ; "
sts ICR1L,r16 ; "
ldi r16 high(1000)
r16,high(1000) ; set up duty cycle value to 5%
sts OCR1AH,r16 ; "
ldi r16,low(1000) ; "
sts OCR1AL,r16 ; "
ldi r16,0x80 ; select phase and frequency correct PWM mode and
sts TCCR1A,r16 ; use ICR1 to hold TOP count
ldi r16,0x12 ; select clk_IO/8 as clock input to Timer1
sts TCCR1B,r16 ; and enable Timer1

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 Driving the DC Motor
„ DC motor: analog motor

Figure 11.20 Simplified DC motor control circuit

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 Driving the DC Motor

„ DC Motor
M t Driver
Di ICs
IC
„ Available in many current and voltage ratings
„ Example: SN754410 from TI
Driving a DC Motor Using the SN754410
„ Illustrated in Figure
g 11.22
„ The output waveform of the Hall-effect transistor

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Driving the DC Motor

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Driving the DC Motor

„ N
Normal
lOOperation:
ti
„ OC1A output WPM, OC1B output 0v
„ Reverse operation
„ OC1A output 0V, OC1B output WPM
„ Brake the motor
„ OC1A 0V, OC1B 5V.

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