0% found this document useful (0 votes)
64 views

PCBDesign Studio Tutorial

This document provides a tutorial on using Cadence PCB Design Studio. It discusses topics such as schematic entry, importing designs from PSpice, placing parts, creating new parts, annotating designs, assigning footprints, generating netlists, and creating board layouts in Allegro. Footprint modeling is also covered, including using the package symbol wizard and modifying padstacks. The tutorial provides screenshots to illustrate the steps and considerations for integrating schematic capture with board layout.
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
64 views

PCBDesign Studio Tutorial

This document provides a tutorial on using Cadence PCB Design Studio. It discusses topics such as schematic entry, importing designs from PSpice, placing parts, creating new parts, annotating designs, assigning footprints, generating netlists, and creating board layouts in Allegro. Footprint modeling is also covered, including using the package symbol wizard and modifying padstacks. The tutorial provides screenshots to illustrate the steps and considerations for integrating schematic capture with board layout.
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 30

Cadence PCB Design Studio Tutorial

By: Joe Hershberger

August 7, 2003
Cadence PCB Design Studio Tutorial Oklahoma State University

Schematic entry (Capture CIS)


Menus and Toolbars are context sensitive.

New Schematic
FileàNewàProject… and select Schematic. <Fig. 1>

Figure 1: New Project Window

Import from PSpice Schematic


If you have your design in PSpice Schematic, then FileàImport DesignàPSpice. <Fig. 2>

Figure 2: Importing PSPICE design files to Capture CIS

2 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Considerations when importing:


• Voltage sources used for simulation are not part of the board design and should be replaced with
connectors to allow for external power supply connections.
• All input and output from the circuit should be considered and connectors added.
• Finely adjusted resistors should be replaced with potentiometers.
• Any features that would be useful on the PCB, such as dip switches, jumpers, test points,
buffered debug LEDs, grounded mounting holes, etc. should be added to the schematic.
<Fig. 3,4>

Figure 3: Imported Design

3 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 4: Sources, I/O, and jumpers added (HEADER 2, HEADER 3).

Place Parts
PlaceàPart… Look for the part in the selected libraries <Fig. 5> or if you don’t know what libraries, click
the Part Search button and Search all libraries. <Fig. 6>
Click OK and place the part.

Figure 5: Place Part Figure 6: Part Search for header*

4 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Create New Parts


Add a new User Library.
• Select the Project Window. <Fig. 7>
• FileàNewàLibrary.

Figure 7: Project Window

Add a new part.


• Right click the Library FileàAdd Part. <Fig. 8>
• Enter Footprint if it is standard to the part. (More on footprints later)

Figure 8: New Part (Variable Resistor).

5 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Draw the Part (Use drawing toolbar for these operations).


• Simplest is just draw a box, or you can get fancy. <Fig. 11>
• Place Pins (Use power Pin Type for hidden power pins). <Fig. 9>
• Or Pin Array. <Fig. 10>
Set Part Properties OptionsàPart Properties. <Fig. 12>

Figure 9: One pin on the variable resistor. Figure 10: Placing multiple Pins.

Figure 11: The new completed part. Figure 12: Changing the part properties.

Schematic Entry Notes


• Verify that all Power nets are consistent - Use the same ground and power symbols across
design (This is especially important when importing from PSpice). Verification must also be done
for hidden power pins inside parts (if used).
• Off Page Connectors – Allows the use of multiple pages for better organization of large designs.
Also allows net naming. Simply attach and name.

6 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Annotate Design
This assigns part reference numbers to all parts in the design.
• Select the “.dsn” file in the Project Window.
• ToolsàAnnotate. <Fig. 13>
• Select Unconditional for initial annotation and Incremental for updating annotation.
You can automatically generate reference numbers as you place parts. This is NOT recommended.
Always annotate when the design is complete. The auto reference setting is found in
OptionsàPreferences…àMiscellaneousàAuto Reference. <Fig. 14>

Figure 13: Annotate the parts in the design. Figure 14: Deselect the “automatically reference
placed parts” option.

Footprint Assignment
This is the first point at which you must start addressing integration with Allegro. The name that you
assign in the footprint field for each part in the schematic must match the desired footprint file in Allegro
(e.g. if the footprint is 3296w.psm, you enter 3296w in the footprint field for the part).
• Right click the PartàEdit Properties or double click the part.
• Edit the “PCB Footprint” field of every part. <Fig. 15>
• Naming of the footprint depends on the part in question.
o If the part uses a standard footprint, then that name should be used (e.g. some of the
transistors used in the example use the TO18 standard package).
o If the part is non-standard, then is it recommended that the mfg. part number (or part of it
that fully describes the packaging) be used (e.g. the potentiometers used in the example
are Bourns 3296W).

Figure 15: Adding the PCB footprint to the properties of each part.

7 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

You must take care when selecting the footprint. You need to know which manufacturer and model of
each part you plan to buy and, if you use predefined library footprints for standard packages, you should
verify that the manufacturer drawings in the datasheet for the parts match the library footprints.

Netlist and Create Board


Before this step, you must create all of your footprints in Allegro.
• Select the “.dsn” file in the Project Window.
• ToolsàCreate NetlistàAllegro. <Fig. 16>
• Select “Create Allegro Netlist”.
• Select “Create or Update Allegro Board”.

Figure 16: Create the Netlist output file to Allegro.

This step will create an allegro directory in your project directory inside which all layout files will be saved.
To check for errors in the process, check the netlist.log (from the Capture CIS export process) and
netrev.lst (from the Allegro import process) in the allegro directory.

Netlist and Update Board


This allows you to change your schematic design (not too drastically) and update the board layout without
having to start over. This is known as an ECO (Engineering Change Order).

8 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

• Select the “.dsn” file in the Project Window.


• ToolsàCreate NetlistàAllegro. <Fig. 17>
• Select “Create Allegro Netlist”.
• Select “Create or Update Allegro Board”.
• Specify the input board that you want to base the change on (the input and output CAN be the
same name).

Figure 17: Making changes from the design phase.

9 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Footprint Modeling (Allegro) – “*.dra/*.psm”


Package Symbol Wizard
• Create a new directory inside your project directory named “symbols”. This should be at the
same level as your capture project files.
• FileàNew. <Fig. 18>
• Select the path and name the footprint.
• Select “Package symbol (wizard)”.
• Select the package type for the footprint you will use. <Fig. 19>

Figure 18: Creating a footprint.

Figure 19: Select a “single inline package” for the potentiometer.

10 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

General Parameters. <Fig. 20,21>


• Enter the units for the dimensions you will enter into the wizard.
• You should use mils for the units to create the package symbol.
• The reference designator prefix is based on the type of part (e.g. R* for resistors, J* for jumpers
or connectors, U* for ICs, Q* for transistors).

Figure 20: Standard resistor specs.

Figure 21: Units specified on data sheet in millimeters.

11 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Sip Properties. – specific to the example (based on the package type choice earlier). <Fig. 22>
• Enter all of the dimensions from the datasheet.
Padstacks. <Fig. 23>
• In the wizard, you cannot modify the pads, so you should simply select one (You will change it
later).
• If you care to distinguish pin 1 from the rest, you can specify a different pad for it (square pad of
the same dimensions is typical). This is especially useful during assembly for otherwise
symmetric footprints such as SIP and DIP packages.

Figure 22: Potentiometer specifications as per the website Mouser.com.

Figure 23: Dummy padstack specifications (to be modified later).


“sq” is substituted for pin difference in pin 1 (optional).

12 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 24: Completed footprint.

13 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Modifying Padstacks
• ToolsàPadstackàModify design padstack. <Fig. 25>
• Select the pad you want to edit and click edit.
Parameters Tab. <Fig. 26>
• Set the size parameter for the drill hole.
Layers Tab. <Fig. 27>
• Select each layer (top and bottom) and set the Regular Pad Geometry, Width and Height.

Figure 25: Edit the PadStack. Figure 26: Edit the PadStack to the drill specifications from the
company specs.

Figure 27: Layers tab editing Padstack.

14 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Save the pad with FileàSave As in the symbols directory and name the pad with the following
convention:
“PAD<pad diameter><geometry><drill hole diameter>d” (e.g. PAD60cir32d.pad or
PAD60sq32d.pad).
When you are done creating all the pads,
• ToolsàPadstackàReplace. <Fig. 28>
• Select the old pad from the design and select the newly created pad from the library.
• Click replace.
For predefined Library footprints, you don’t replace the padstack in the footprint; you replace it in the
board. The process is the same with the exception that you do it in the .brd file.

Figure 28: Replace the old Padstack to update the library symbol

Route Keepouts
Route keepouts can be useful for some parts. Not covered in this tutorial.

Create Symbols
For each symbol you draw, after every time you edit it, you have to compile the symbol to use it in your
board.
Use FileàCreate Symbol to generate a .psm file from you .dra file and save it in the symbols directory.

15 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

PCB Layout (Allegro) – “*.brd”


Initial Setup
Your board containing your netlist was generated by Capture CIS. First you should setup how you want
the application to act and look for the rest of the process.
• Setup the Color Scheme – SetupàColor/Visibility. (Fig. 44a-g gives an example color/visibility
scheme).
• Setup the Grid spacing – SetupàGrids. <Fig. 29>
o The Non-Etch setting specifies the resolution that you can move all objects such as parts
or labels including drawing areas.
o The Etch settings are the grids used for manually editing the traces on each layer.

Figure 29: Example Grid Setup

16 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

• Design Constraints – SetupàConstraints. <Fig. 30>


o Spacing Rule set (Set values). <Fig. 31>
o Physical Rule set (Set values). <Fig. 32>
§ Via pad (for multi layer boards) – Use padstack modification process above and
assign the pad here.

Figure 30: Edit Design Constraints. Figure 31: Change the Spacing.

17 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 32: Physical Rule Set

18 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

• Drawing Size – SetupàDrawing Size. <Fig. 33>


• Specctra Auto router configuration – RouteàSpecctraàRoute Automatic. <Fig. 34>
o Set “Use Smart Router”.
o Click “Close”.

Figure 33: Drawing Parameters. Figure 34: Auto Routing Parameters.

19 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

• NC Drill Parameters – ManufactureàNCàDrill Parameters. (Use the settings in Fig. 35).


• Artwork Parameters – ManufactureàArtworkàGeneral Parameters. (Use the settings in Fig. 36).

Figure 35: Drill Parameters. Figure 36: Artwork Settings.

20 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Place Parts
• Decide the dimensions of your board and add shapes for it on the Board GeometryàBoard
Outline, Route KeepinàAll, and Package KeepinàAll layers. <Fig. 37,38>

Figure 37: Active Class Drop Down Menu.

Figure 38: Design Border, Route Keepin, and Package Keepin.

21 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

• Place the parts – PlaceàQuickplace. <Fig. 39>


• Select the Edges you want the parts placed and click Place.
• Note the Unplaced Symbol Count and if non-zero, check the log for why. It is possible to not
place all parts if there is not enough space outside your board outline on the sides you selected.
• Click OK.
• You can now arrange the parts on the board in an organized fashion based on function, clustering
parts that work together.

Figure 39: Quickplace window.

22 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 40: Design after Quickplace.

Figure 41: Placed Components

23 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Pre-Route Steps
• Place Text on EtchàTop or EtchàBottom (Mirrored) if desired.
• Place route keepouts over text (On same layer).
• Place route keepouts over predefined library footprints on layers where necessary.
• The reports available in ToolsàReports can be very helpful in understanding exactly what is
happening in your design.

Auto Route
• Before routing, it is a very good idea to save a backup copy of your “.brd” file. (e.g.
“<DesignName>_unrtd.brd”)… Be sure you right-clickàDone if in an active command and then
save.
• RouteàSpecctraàRoute Automatic.
• Verify Settings and click Route. <Fig. 42>
• When complete, click close.

Figure 42: Routing in Progress.

24 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Manual Cleanup
This is not always needed, but is typically.
• Make sure your routes are where you want them. Verify the operation of the route keepouts (I
have noticed them not work correctly on several occasions) and fix the routes manually.
• Check all the DRC Errors and make sure there are no serious issues.
• Run some of the Reports from ToolsàReports such as the “dangling lines” and “unconnected
pins” reports.

Manufacturing
• Board outline – Some manufacturing processes require a board outline on one of the output
layers so that the board can be cut out. Simply place a line following the Board
GeometryàOutline shape on the EtchàTop layer.
• Drill File Output – ManufactureàNCàDrill Tape (Set scale factor to 1.0).
• Gerber File Output – ManufactureàArtwork <Fig. 43>
o Select the layers you want to output.
o Select Check Database before Artwork.
o Click Create Artwork.
o Click OK.
• It’s a good idea to verify your manufacturing files with ViewMate after generating them.
• The generated drill file does not contain tool size information. It can be edited manually.

Figure 43: Create the Gerber files.

25 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Reference Color Scheme

Figure 44a: Color and Visibility – Geometry.

26 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 44b: Color and Visibility – Manufacturing.

27 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 44c: Color and Visibility – Stack-Up.

Figure 44d: Color and Visibility – Components.

28 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 44e: Color and Visibility – Areas.

Figure 44f: Color and Visibility – Analysis.

29 of 30
Cadence PCB Design Studio Tutorial Oklahoma State University

Figure 44g: Color and Visibility – Display.

30 of 30

You might also like