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Experiment 6 - Multiplexer and Demultiplexer Using NAND Gates

The document describes an experiment to construct a 4 to 1 multiplexer and 1 to 4 demultiplexer using NAND gates. It provides background on multiplexers and demultiplexers, including their definitions and types. The experiment objectives are to design, construct and verify the operation of a 4:1 multiplexer and 1:4 demultiplexer. The required components are listed. Logic diagrams and truth tables are provided to illustrate the design and function of the 4:1 multiplexer and 1:4 demultiplexer circuits using NAND gates.

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8K views6 pages

Experiment 6 - Multiplexer and Demultiplexer Using NAND Gates

The document describes an experiment to construct a 4 to 1 multiplexer and 1 to 4 demultiplexer using NAND gates. It provides background on multiplexers and demultiplexers, including their definitions and types. The experiment objectives are to design, construct and verify the operation of a 4:1 multiplexer and 1:4 demultiplexer. The required components are listed. Logic diagrams and truth tables are provided to illustrate the design and function of the 4:1 multiplexer and 1:4 demultiplexer circuits using NAND gates.

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Experiment No: 6

MULTIPLEXER AND DE-MULTIPLEXER USING NAND GATES


AIM:

To construct

i) 4 to 1 Multiplexer using NAND gates


ii) 1 to 4 De-Multiplexer using NAND Gates.

OBJECTIVES:

At the end of the experiment, the student should be able to

1) Identify the role of multiplexer and de-multiplexer circuits.


2) Design, construct and verify the operation of a 4:1 multiplexer using NAND gates.
3) Design, construct and verify the operation of a 1:4 de-multiplexer using NAND gates.

COMPONENTS AND EQUIPMENTS REQUIRED:

S. No. Name Type Quantity


1 2 input NAND gate IC 7400 2
2 3 input NAND gate IC 7410 2
3 4 input NAND gate IC 7420 1
4 Digital IC trainer kit 1
5 Connecting Wires

THEORY:

Multiplexer:

A multiplexer (or MUX) is a device that selects one of several analog or digital input
signals and forwards the selected input into a single line. It is a Combinational logic circuit (i.e.
its output depends upon only the present value of inputs) that has multiple inputs and a single
line output. The select lines determine which input is connected to the output. Multiplexers are
mainly used to increase the amount of data that can be sent over the network within a certain
amount of time and bandwidth. It is also called a data selector, many to one circuit, universal
logic circuit or parallel to serial circuit.

Multiplexers are classified into four types:


a) 2 to 1 multiplexer (2 input, 1 output, 1 select line)
b) 4 to 1 multiplexer (4 input, 1 output, 2 select lines)
c) 8 to 1 multiplexer (8 input, 1 output, 3 select lines)
d) 16 to 1 multiplexer (16 input, 1 output, 4 select lines)

If ‘m’ is the number of Data input and ‘n’ is the number of select (control) input, then
.

4 to 1 MUX: 4x1 Multiplexer has four data inputs I0, I1, I2 & I3, two selection lines S0 & S1 and
one output Y. One of these 4 inputs will be connected to the output (Y) based on the combination
of inputs present at the two selection lines S0 & S1.

De-Multiplexer:

De-multiplexers perform the opposite function of multiplexers. They transfer information


from a single source over a larger number of channels under the control of selection signals. The
general de-multiplexer circuit has 1 input signal, n control/select signals and 2n output signals.
De-multiplexer circuit can also be realized using a decoder circuit with enable.

De-multiplexer can be visualized as reverse multi-position switch. The select lines permit
input data from single line to be switched to any one of the many output lines. There are four
basic types of de-multiplexers: 1 to 2 de-multiplexer, 1 to 4 de-multiplexer, 1 to 8 de-multiplexer
and 1 to 16 de-multiplexer

1 to 4 DEMUX: 1x4 De-multiplexer has one data input I, two selection lines S0 & S1 and four
outputs Y0, Y1, Y2 & Y3. Based on the combination of inputs present at the two selection lines S1
& S0, the input will be connected to one of the four output terminals.

PROCEDURE:

1) Test all the components using a digital IC tester


2) Verify the pin out of IC and ensure that the ICs have been perfectly plugged into the
breadboard or sockets before feeding the inputs
3) Write the identification number of ICs and input, output pin numbers of ICs in your
logic diagram.
4) Connect VCC = 5V & GND to the respective pin numbers of each ICs.
5) Complete the connection as per the logic diagram
6) Apply inputs to the logic gates from switches block of the trainer kit.
7) Connect output of the logic gates to the LED indicators of the trainer kit.
8) Switch on VCC and apply various combinations of select inputs S1 & S0 according to
the Truth table and verify the results for 4x1 MUX.
9) After completing the 4x1 MUX circuit disconnect the components and repeat steps 1
to 8 for 1x4 DEMUX.
RESULT:

Designed, setup and verified

i) The operation of a 4 to 1 MUX using NAND gates.


ii) The operation of a 1 to 4 DE-MUX using NAND gates.
Pin out of IC7420 (Dual 4 Input NAND gate):

4 to 1 MUX:

Logic Symbol: Function Table:

S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3

Logical Expression:
̅̅̅̅̅̅ ̅̅̅ ̅̅̅

Using NAND gates,


̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(̅̅̅̅̅̅̅̅̅
̅̅̅̅̅̅ ) (̅̅̅̅̅̅̅̅̅
̅̅̅ ) (̅̅̅̅̅̅̅̅̅
̅̅̅ ) (̅̅̅̅̅̅̅̅̅)
4 to 1 MUX using NAND Gates:

Circuit:

Truth Table:
Data Input Control Input Output
I0 I1 I2 I3 S1 S0 Y
0 X X X 0 0 0
1 X X X 0 0 1
X 0 X X 0 1 0
X 1 X X 0 1 1
X X 0 X 1 0 0
X X 1 X 1 0 1
X X X 0 1 1 0
X X X 1 1 1 1

Note: ‘X’ means Don’t care. It can be 0 or 1. Its value doesn’t affect the output.
1 to 4 DEMUX:

Logic Symbol: Function Table:

S1 S0 Y0 Y1 Y2 Y3
0 0 D 0 0 0
0 1 0 D 0 0
1 0 0 0 D 0
1 1 0 0 0 D

Logical Expression:
̅̅̅̅̅̅
̅̅̅
̅̅̅

1 to 4 De-MUX using NAND Gates:

Circuit:

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