HelperBoard A133 Core Board
HelperBoard A133 Core Board
0)
SZBAIJIE Confirmed:
Prepared by Checked by Approved by
Chen Jun
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
The tablet
The handheld device
Qr code scanning equipment
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
(Please look carefully at this pin definition, the bottom line is so simple!PL
PC PG is 1.8V, PB PH PF is 3.3V, PE port default 1.8V, if no camera can be
set to 3.3V, please pay attention to level matching, if the IO input voltage
is too high, it will lead to PMU protection and do not start) :
Serial
The name of the pin Pin note
number
Dedicated CAMERA IO power
1 IOVDD_CSI
supply
Ground the key during
2 FEL power-on to enter the write
mode
3 RESET reset
4 LRADC The ADC buttons
5 AVCC ADC reference power supply
6 LINEOUTLN
LINEOUT output
7 LINEOUTLP
8 MIC_DET
9 HPOUTR
10 HPOUTL
Headset I/O
11 MICIN2N
12 MICIN2P
13 HBIAS
14 HPOUTFB Earphone reference
15 HP-DET The headset detect
16 MICIN1N
17 MICIN1P MIC1
18 MBIAS
19 PB7/SPDIF_IN/I2S0_DOUT0/I2S0_DIN1/PB_EINT7
GPIO
20 PB8/SPDIF_OUT/I2S0_DIN0/I2S0_DOUT1/PB_EINT8
21 PF6/PF_EINT6
22 PF0/SDC0_D1/JTAG_MS/JTAG_MS_GPU/PF_EINT0
23 PF1/SDC0_D0/JTAG_DI/JTAG_DI_GPU/PF_EINT1
24 PF2/SDC0_CLK/UART0_TX/PF_EINT2 SDIO interface
25 PF3/SDC0_CMD/JTAG_DO/JTAG_DO_GPU/PF_EINT3
26 PF4/SDC0_D3/UART0_RX/PF_EINT4
27 PF5/SDC0_D2/JTAG_CK/JTAG_CK_GPU/PF_EINT5
28 GND The power to
29 PH3/TWI1_SDA/CIR_OUT/RGMII0_CLKIN/RMII0_RXER/PH_EINT3
30 PH10/DMIC_DATA1/SPI2_MOSI/I2S2_LRCK/MDIO0/PH_EINT10
Multiplexing gigabit
31 PH9/DMIC_DATA0/SPI2_CLK/I2S2_BCLK/MDC0/PH_EINT9
network RGMII
32 PH11/DMIC_DATA2/SPI2_MISO/I2S2_DOUT0/I2S2_DIN1/PH_EINT11
33 PH7/UART3_CTS/SPI1_MISO/SPDIF_OUT/RGMII0_TXCTL/RMII0_TXEN/PH_EINT7
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
34 PH17/I2S3_DOUT1/I2S3_DIN0/RGMII0_TXD3/RMII0_NULL/PH_EINT17
35 PH18/CIR_OUT/I2S3_DOUT2/I2S3_DIN2/RGMII0_TXD2/RMII0_NULL/PH_EINT18
36 PH4/UART3_TX/SPI1_CS/CPU_CUR_W/RGMII0_TXD1/RMII0_TXD1/PH_EINT4
37 PH5/UART3_RX/SPI1_CLK/LEDC/RGMII0_TXD0/RMII0_TXD0/PH_EINT5
38 PH6/UART3_RTS/SPI1_MOSI/SPDIF_IN/RGMII0_TXCK/RMII0_TXCK/PH_EINT6
39 PH16/I2S3_DOUT0/I2S3_DIN1/RGMII0_RXCK/RMII0_NULL/PH_EINT16
40 PH14/I2S3_BCLK/RGMII0_RXD3/RMII0_NULL/PH_EINT14
41 PH15/I2S3_LRCK/RGMII0_RXD2/RMII0_NULL/PH_EINT15
42 GND
43 PH0/TWI0_SCK/RGMII0_RXD1/RMII0_RXD1/PH_EINT0
44 PH1/TWI0_SDA/RGMII0_RXD0/RMII0_RXD0/PH_EINT1
45 PH2/TWI1_SCK/CPU_CUR_W/RGMII0_RXCTL/RMII0_CRS_DV/PH_EINT2
46 PH12/DMIC_DATA3/TWI3_SCK/I2S2_DIN0/I2S2_DOUT1/PH_EINT12
47 PH13/TWI3_SDA/I2S3_MCLK/EPHY0_25/PH_EINT13
48 PH19/CIR_IN/I2S3_DOUT3/I2S3_DIN3/LEDC/PH_EINT19
49 PB0/UART2_TX/SPI2_CS/JTAG_MS/PB_EINT0
50 PB1/UART2_RX/SPI2_CLK/JTAG_CK/PB_EINT1
51 PB2/UART2_RTS/SPI2_MOSI/JTAG_DO/PB_EINT2
Reuse GPIO (3.3 V)
52 PB3/UART2_CTS/SPI2_MISO/JTAG_DI/PB_EINT3
53 PB4/TWI1_SCK/I2S0_MCLK/JTAG_MS_GPU/PB_EINT4
54 PB5/TWI1_SDA/I2S0_BCLK/JTAG_CK_GPU/PB_EINT5
55 PB6/I2S0_LRCK/JTAG_DO_GPU/PB_EINT6
56 PB9/UART0_TX/TWI0_SCK/JTAG_DI_GPU/PB_EINT9
57 PB10/UART0_RX/TWI0_SDA/PWM1/PB_EINT10
58 GND The power to
59 PG9/UART1_CTS/I2S1_MCLK/PG_EINT9
60 PG8/UART1_RTS/PG_EINT8 Serial port with flow
61 PG7/UART1_RX/PG_EINT7 control (1.8V)
62 PG6/UART1_TX/PG_EINT6
63 GND The power to
64 PL11/S_CPU_CUR_W/S_CIR_IN/S_PL_EINT11
65 PL10/S_PWM/S_PL_EINT10
66 PL9/S_TWI1_SDA/S_PL_EINT9 Dormant GPIO(1.8V)
67 PL8/S_TWI1_SCK/S_PL_EINT8
68 PL7/S_JTAG_DI/S_PL_EINT7
69 PD22/PWM1/TWI0_SCK/PD_EINT22 GPIO
70 CHGLED Charging indicator light
71 VCC-3V3 3.3V output, maximum 500mA
72 GND The power to
73 PD0/LCD0_D2/LVDS0_D0P/DSI_DP0/PD_EINT0 RGB, MIPI, LVDS, etc
74 PD1/LCD0_D3/LVDS0_D0N/DSI_DM0/PD_EINT1 Multiplexing LCD
75 PD2/LCD0_D4/LVDS0_D1P/DSI_DP1/PD_EINT2 interface,
76 PD3/LCD0_D5/LVDS0_D1N/DSI_DM1/PD_EINT3 When used as MIPI
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
81 PD8/LCD0_D12/LVDS0_D3P/DSI_DP3/PD_EINT8
82 PD9/LCD0_D13/LVDS0_D3N/DSI_DM3/PD_EINT9
83 PD10/LCD0_D14/LVDS1_D0P/SPI1_CS/PD_EINT10
84 PD11/LCD0_D15/LVDS1_D0N/SPI1_CLK/PD_EINT11
85 PD12/LCD0_D18/LVDS1_D1P/SPI1_MOSI/PD_EINT12
86 PD13/LCD0_D19/LVDS1_D1N/SPI1_MISO/PD_EINT13
87 PD14/LCD0_D20/LVDS1_D2P/UART3_TX/PD_EINT14
88 PD15/LCD0_D21/LVDS1_D2N/UART3_RX/PD_EINT15
89 PD16/LCD0_D22/LVDS1_CKP/PLL_TEST_CKP/UART3_RTS/PD_EINT16
90 PD17/LCD0_D23/LVDS1_CKN/PLL_TEST_CKN/UART3_CTS/PD_EINT17
91 PD18/LCD0_CLK/LVDS1_D3P/UART4_TX/PD_EINT18
92 PD19/LCD0_DE/LVDS1_D3N/UART4_RX/PD_EINT19
93 PD20/LCD0_HSYNC /PWM2/UART4_RTS/PD_EINT20
94 PD21/LCD0_VSYNC/PWM3/UART4_CTS/PD_EINT21
95 PD23/PWM0/TWI0_SDA/PD_EINT23
96 PC12/NAND_DQS/SPI0_CLK/PC_EINT12
97 PC7/NAND_RB1/SPI0_CS1/PC_EINT7
98 PC4/NAND_CE0/SPI0_MISO/PC_EINT4 Reuse GPIO (1.8 V)
99 PC3/NAND_CE1/SPI0_CS0/PC_EINT3
100 PC2/NAND_CLE/SPI0_MOSI/PC_EINT2
101 USB1-DP
High-speed USBHOST
102 USB1-DM
103 PH8/DMIC_CLK/SPI2_CS/I2S2_MCLK/I2S2_DIN2/PH_EINT8 Reuse GPIO (3.3 V)
104 USB0-DP
High-speed USBOTG
105 USB0-DM
106 VBUS USB power input (5V)
107 VBAT Battery powered input
108 VBAT (4.2V)
Battery temperature
109 TS
detection
110 PS PMU power output
111 PWRON The power button
112 GND The power to
113 ACIN2
DC5V input
114 ACIN1
115 PE9/BIST_RESULT3/I2S2_DIN0/PE_EINT9
116 PE8/BIST_RESULT2/I2S2_DOUT0/PE_EINT8
117 PE7/CSI_SM_VS/BIST_RESULT1/I2S2_LRCK/TCON_TRIG/PE_EINT7
Dual camera interface
118 PE6/BIST_RESULT0/I2S2_BCLK/PE_EINT6
119 PE4/TWI3_SDA/PE_EINT4
120 PE3/TWI3_SCK/PE_EINT3
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
121 GND
122 MCSIA_D3N
123 MCSIA_D3P
124 MCSIA_D2N
125 MCSIA_D2P
126 MCSIA_D1N
127 MCSIA_D1P
128 MCSIA_D0N
129 MCSIA_D0P
130 MCSIA_CLKN
131 MCSIA_CLKP
132 MCSIB_D1N
133 MCSIB_D1P
134 MCSIB_D0N
135 MCSIB_D0P
136 MCSIB_CLKN
137 MCSIB_CLKP
138 PE5/MIPI_MCLK1/PLL_LOCK_DBG/I2S2_MCLK/LEDC/PE_EINT5
139 PE0/MIPI_MCLK0/PE_EINT0
140 PE1/TWI2_SCK/PE_EINT1
141 PE2/TWI2_SDA/PE_EINT2
142 AFVCC-CSI
143 DVDD-CSI
144 AVDD-CSI
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
(54x38x2.7(+/-0.2mm), 144PIN, pin spacing 1.2mm, stamp hole structure, no device on the back)
Note: Batch enterprise users can customize the baseboard for free.
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HelperBoard A133 核心板规格书(硬件版本:v1.4 文档版本:20201020 V1.0)
1、 The firing procedure is through USB-OTG, this port must be retained, and also need to retain the FEL key
(grounding into the firing when powering on), it is better to add the RESET button, so that the firing is more
convenient;
2、 All differential signals should go to the differential line, as far as possible to meet the differential impedance
of 90 ohms, including: USB, LVDS, MIPI, HDMI, etc.
3、 The resistance of the MCLK line series of the camera should be close to the core plate, and the resistance of
the PCLK line series should be close to the camera seat.
4、 The wiring width of the power supply to the core board should be greater than 1.5mm, and the grounding
wire of the core board should be thick enough.
5、 Microphone cable to pack ground;
6、 In order to ensure the welding quality, the core plate position of the steel mesh, the core plate solder plate,
about 20mil larger than the core plate, you can refer to our development board PCB paste layer;
7、 Power_ON and each CKEY key are mandatory for firing, and should not be removed during design. It is better
to retain the Reset key for debugging.
8、 The PL, PG and PG ports of the core board are 1.8V and cannot be higher than 1.9V. The PB, PF and PH ports
are 3.3V and cannot be higher than 3.6V, otherwise the system may fail to start. The PE port is 1.8V by
default.
9、 If the device is battery powered, PSOUT can be used to power other circuits other than the core board. If the
device is DCIN powered, VBAT can be suspended. PSOUT had better not be used to power other circuits,
otherwise it may cause the system to start slowly or fail to start.
10、 The 3.3V output current of the core plate should not exceed 500mA. At the same time, a 100uF~220uF
capacitor should be added to the position of the 3.3V network close to the core plate on the bottom plate.
11、 It is recommended to bake the core plate at 120 degrees for 4 hours before passing through the
furnace, and finish the patch within 12 hours after baking.
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