ANJUMAN

Institute of Technology
and Management
Bhatkal, Karnataka, India

BASIC
ELECTRONICS
(BBEE103/BBEE203)

Mr. Shrishail Bhat

Assistant Professor
Department of Electronics and Communication Engineering
 MODULE – 2

Field Effect Transistors

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 2

Introduction

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 3

Field Effect Transistor
• The Field-Effect Transistor (FET) is a three-terminal device that uses
electric field to control the current flowing through the device.
• It has three terminals – Source (S), Drain (D) and Gate (G).
• FETs are unipolar devices because they operate only with one type
of charge carrier.
• The term field-effect relates to the depletion region formed in the
channel of a FET as a result of a voltage applied on one of its
terminals (gate).

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 4

Field Effect Transistor
• An FET is a voltage-controlled device, where the voltage between two of
the terminals (gate and source) controls the current through the device.
• Unlike a BJT, an FET requires virtually no input current.
• This gives it an extremely high input resistance, which is its major advantage
over BJT.
• Because of their nonlinear characteristics, they are generally not as
widely used in amplifiers as BJTs, except where very high input
impedances are required.
• However, FETs are the preferred device in low-voltage switching
applications because they are generally faster than BJTs when turned on
and off.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 5

Field Effect Transistor
• The two main categories of FETs are:
• Junction Field-Effect Transistor (JFET)
• Metal Oxide Semiconductor Field-Effect Transistor (MOSFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 6

Junction Field-Effect
Transistor (JFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 7

JFET
• The JFET (Junction Field-Effect Transistor) is a type of FET that
operates with a reverse-biased pn-junction to control current in a
channel.
• Depending on their structure, JFETs are classified into two types:
• N-channel JFET
• P-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 8

N-Channel JFET

(a) Basic structure (b) Symbol

Fig. 1 N-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 9

N-Channel JFET
• A piece of n-type semiconductor material, referred to as channel, is
sandwiched between two smaller pieces of p-type (gates).
• The ends of the channel are designated as the drain (D) and the
source (S).
• The two pieces of p-type material are connected together and their
terminal is named the gate (G).

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 10

N-Channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 11

N-Channel JFET

Note:
In an n-channel JFET, 𝑉𝑉𝐺𝐺𝐺𝐺 is negative
and 𝑉𝑉𝐷𝐷𝐷𝐷 is positive.

Fig. 2 A biased N-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 12

N-Channel JFET
• With the gate left unconnected and a drain-source voltage 𝑉𝑉𝐷𝐷 applied (positive
at the drain, negative at the source), a drain current 𝐼𝐼𝐷𝐷 flows as shown.
• When a gate-source voltage 𝑉𝑉𝐺𝐺𝐺𝐺 is applied with the gate negative with respect
to the source, the gate-channel pn-junctions are reverse biased.
• The channel is more lightly doped than the gate material, so the depletion
regions penetrate deep into the channel.
• Since depletion regions do not have charge carriers, they behave as insulators.
• As a result, the channel becomes narrow, its resistance increases, and 𝐼𝐼𝐷𝐷
reduces.
• When the negative gate-source bias voltage is further increased, the depletion
regions meet at the centre of the channel and 𝐼𝐼𝐷𝐷 is cut off.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 13

N-Channel JFET
• An ac signal applied to the gate causes the reverse gate-source
voltage to increase as the instantaneous level of the signal goes
negative, and to decrease when the signal goes positive.
• When the signal goes negative, the depletion regions widen, the
channel resistance is increased and the drain current decreases.
• When the signal goes positive, the depletion regions recede, the
channel resistance is reduced and the drain current increases.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 14

P-Channel JFET

(a) Basic structure (b) Symbol

Fig. 3 P-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 15

P-Channel JFET
• In a p-channel JFET, the channel is a p-type semiconductor, and the
gates are n-type.
• The drain-source voltage 𝑉𝑉𝐷𝐷 is applied negative to the drain and
positive to the source.
• The drain current 𝐼𝐼𝐷𝐷 flows from source to drain.
• The bias voltage is applied positive on the gate and negative on the
source.
• So the gate-channel junctions are reverse biased.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 16

P-Channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 17

P-Channel JFET

Note:
In an p-channel JFET, 𝑉𝑉𝐺𝐺𝐺𝐺 is positive
and 𝑉𝑉𝐷𝐷𝐷𝐷 is negative.

Fig. 4 A biased P-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 18

P-Channel JFET
• In a p-channel JFET, the channel is a p-type semiconductor, and the
gates are n-type.
• The drain-source voltage 𝑉𝑉𝐷𝐷 is applied negative to the drain and
positive to the source.
• The drain current 𝐼𝐼𝐷𝐷 flows from source to drain.
• The bias voltage is applied positive on the gate and negative on the
source.
• So the gate-channel junctions are reverse biased.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 19

JFET Fabrication and Packaging
• JFETs are normally manufactured by the
diffusion process.
• For an n-channel JFET, starting with a p-
type substrate, an n-channel is diffused;
then p-type impurities are diffused into the
channel.
• Finally, metal terminal connections are
deposited through holes in the silicon
dioxide surface.
• The n-type region is the FET channel, and
the two p-type regions constitute the gates.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 20

JFET Fabrication and Packaging

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 21

JFET Characteristics

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 22

Characteristics of N-Channel JFET
• Drain Characteristics
• It is the plot of 𝑉𝑉𝐷𝐷𝐷𝐷 vs 𝐼𝐼𝐷𝐷 for constant values of 𝑉𝑉𝐺𝐺𝐺𝐺 .
• Transfer Characteristics
• It is the plot of 𝑉𝑉𝐺𝐺𝐺𝐺 vs 𝐼𝐼𝐷𝐷 for constant values of 𝑉𝑉𝐷𝐷𝐷𝐷 .

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 23

Drain Characteristics of N-Channel JFET

𝑉𝑉𝐵𝐵

Fig. 5 Drain characteristic of N-channel JFET for 𝑉𝑉𝐺𝐺𝐺𝐺 = 0

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 24

Drain Characteristics of N-Channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 25

Drain Characteristics of N-Channel JFET
• Consider the case when the gate-to-source voltage is zero
(𝑉𝑉𝐺𝐺𝐺𝐺 = 0 𝑉𝑉) as shown in Fig. 5 (a).
• As 𝑉𝑉𝐷𝐷𝐷𝐷 (and thus 𝑉𝑉𝐷𝐷𝐷𝐷 ) is increased from 0 V, 𝐼𝐼𝐷𝐷 will increase
proportionally, as shown in the graph of Fig. 5 (b) between points A
and B.
• In this area, the channel resistance is essentially constant because
the depletion region is not large enough to have significant effect.
• This is called the ohmic region because 𝑉𝑉𝐷𝐷𝐷𝐷 and 𝐼𝐼𝐷𝐷 are related by
Ohm’s law.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 26

Drain Characteristics of N-Channel JFET
• At point B in Fig. 5 (b), the curve levels off and enters the active
region where 𝐼𝐼𝐷𝐷 becomes constant.
• As 𝑉𝑉𝐷𝐷𝐷𝐷 increases from point B to point C, the reverse-bias voltage
from gate to drain (𝑉𝑉𝐺𝐺𝐺𝐺 ) produces a depletion region large enough
to offset the increase in 𝑉𝑉𝐷𝐷𝐷𝐷 , thus keeping 𝐼𝐼𝐷𝐷 relatively constant.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 27

Drain Characteristics of N-Channel JFET
• Pinch-off Voltage (𝑽𝑽𝑷𝑷 ):
• It is the value of 𝑉𝑉𝐷𝐷𝐷𝐷 at which 𝐼𝐼𝐷𝐷 becomes constant for 𝑉𝑉𝐺𝐺𝐺𝐺 = 0 𝑉𝑉
(point B on the curve in Fig. 5 (b)).
• For a given JFET, 𝑉𝑉𝑃𝑃 has a fixed value.
• A continued increase in 𝑉𝑉𝐷𝐷𝐷𝐷 above the pinch-off voltage produces
an almost constant drain current.
• This value of drain current is 𝑰𝑰𝑫𝑫𝑫𝑫𝑫𝑫 (Drain-Source Saturation Current).
• 𝑰𝑰𝑫𝑫𝑫𝑫𝑫𝑫 is the maximum drain current that a specific JFET can produce
when the gate is shorted, i.e., 𝑉𝑉𝐺𝐺𝐺𝐺 = 0 𝑉𝑉.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 28

Drain Characteristics of N-Channel JFET
• Breakdown:
• When 𝑉𝑉𝐷𝐷𝐷𝐷 exceeds the breakdown voltage 𝑉𝑉𝐵𝐵 (point C in Fig. 5 (b)),
breakdown occurs and 𝐼𝐼𝐷𝐷 begins to increase very rapidly with any
further increase in 𝑉𝑉𝐷𝐷𝐷𝐷 .
• Breakdown can result in irreversible damage to the device, so JFETs are
always operated below breakdown and within the active region
(constant current) (between points B and C on the graph).

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 29

Drain Characteristics of N-Channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 30

Drain Characteristics of N-Channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 31

Drain Characteristics of N-Channel JFET
• Fig. 6 shows drain characteristics of N-channel for different values
of 𝑉𝑉𝐺𝐺𝐺𝐺 .

Fig. 6 Drain characteristic of N-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 32

Drain Characteristics of N-Channel JFET
• The different regions on the JFET drain characteristics are
summarized as below:
i. Ohmic Region: In this region, the channel of JFET obeys Ohm’s law.
ii. Pinch-off Region/Saturation Region: In this region, 𝐼𝐼𝐷𝐷 is maximum
and remains constant for a given 𝑉𝑉𝐺𝐺𝐺𝐺 .
iii. Breakdown Region: In this region, the pn-junction breaks down and
𝐼𝐼𝐷𝐷 increases abruptly. The JFET loses its ability to control 𝐼𝐼𝐷𝐷 .
iv. Cut-off Region: In this region, JFET if OFF, i.e., 𝐼𝐼𝐷𝐷 = 0.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 33

Transfer Characteristics of N-Channel JFET
• Fig. 7 shows the transfer characteristic curve for an N-channel JFET.
• This curve is also known as a transconductance curve.

Note:
In an N-channel JFET,
𝑉𝑉𝐺𝐺𝐺𝐺 is negative and
𝑉𝑉𝐷𝐷𝐷𝐷 is positive.
𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) is negative.

Fig. 7 Transfer characteristic of N-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 34

Transfer Characteristics of N-Channel JFET
• As observed, a range of 𝑉𝑉𝐺𝐺𝐺𝐺 values from 0 to 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) controls the
amount of drain current.
• 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) is called the cut-off voltage.
• Cut-off Voltage (𝑽𝑽𝑮𝑮𝑮𝑮(𝒐𝒐𝒐𝒐𝒐𝒐) ):
• It is the value of 𝑉𝑉𝐺𝐺𝐺𝐺 that makes 𝐼𝐼𝐷𝐷 approximately zero.
• The cut-off voltage 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) and pinch-off voltage 𝑉𝑉𝑃𝑃 are always equal
in magnitude but opposite in sign, i.e., 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) = − 𝑉𝑉𝑃𝑃 .
• 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) is negative for an N-channel JFET and positive for a P-channel
JFET.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 35

Transfer Characteristics of N-Channel JFET
• Fig. 8 is a general (universal) transfer characteristic curve that illustrates
graphically the relationship between 𝑉𝑉𝐺𝐺𝐺𝐺 and 𝐼𝐼𝐷𝐷 .

Fig. 8 N-channel JFET universal transfer characteristic curve

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 36

Characteristics of P-Channel JFET
• Drain Characteristics
• It is the plot of 𝑉𝑉𝐷𝐷𝐷𝐷 vs 𝐼𝐼𝐷𝐷 for constant values of 𝑉𝑉𝐺𝐺𝐺𝐺 .
• Transfer Characteristics
• It is the plot of 𝑉𝑉𝐺𝐺𝐺𝐺 vs 𝐼𝐼𝐷𝐷 for constant values of 𝑉𝑉𝐷𝐷𝐷𝐷 .

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 37

Characteristics of P-Channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 38

Drain Characteristics of P-Channel JFET
• Fig. 9 shows the drain characteristics of a P-channel JFET.

Fig. 9 Drain characteristics of P-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 39
Transfer Characteristics of P-Channel JFET
• Fig. 10 shows the transfer characteristics of a P-channel JFET.

Note:
In a P-channel JFET,
𝑉𝑉𝐺𝐺𝐺𝐺 is positive and
𝑉𝑉𝐷𝐷𝐷𝐷 is negative.
𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) is positive.

Fig. 10 Transfer characteristics of P-channel JFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 40
Metal Oxide
Semiconductor Field-Effect
Transistor (MOSFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 41

MOSFET
• The MOSFET (Metal Oxide Semiconductor Field-Effect Transistor) is
a type of FET which has no pn-junction structure; instead, the gate
of the MOSFET is insulated from the channel by a silicon dioxide
(SiO2) layer.
• The two basic types of MOSFETs are Enhancement type (E-MOSFET)
and Depletion type (D-MOSFET).
• Of the two types, the Enhancement MOSFET is more widely used.
• Because polycrystalline silicon is now used for the gate material
instead of metal, MOSFETs are sometimes called IGFETs (Insulated-
Gate FETs).
Shrishail Bhat, Dept. of ECE, AITM Bhatkal 42
MOSFET (continued)
• The MOSFET has two modes of operation – enhancement mode
and depletion mode.
• An E-MOSFET can be operated only in enhancement mode and has no
depletion mode.
• A D-MOSFET can be operated in either depletion mode or
enhancement mode and hence it is also called depletion-enhancement
MOSFET.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 43

Enhancement MOSFET (E-MOSFET)
• An E-MOSFET can be operated only in enhancement mode and has
no depletion mode.
• An E-MOSFET has no structural channel.
• It is also called EMOS Transistor.
• The basic structure of an N-channel E-MOSFET is shown in Fig. 11 (a).

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 44

Enhancement MOSFET (E-MOSFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 45

Enhancement MOSFET (E-MOSFET)

Fig. 11 Construction and operation of N-channel E-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 46

Enhancement MOSFET (E-MOSFET)
• A p-type substrate is the basic structure upon which n-type regions
are created by diffusion.
• An oxide (SiO2) layer which acts as an insulator covers the entire p-
type substrate and n-type regions.
• By etching proper openings through the oxide layer, metal contacts
for source and drain connections are made to the n-regions.
• The gate contact is formed on the surface of the oxide layer.
• The gate is electrically insulated from both n-type regions and the
p-type substrate.
Shrishail Bhat, Dept. of ECE, AITM Bhatkal 47
Enhancement MOSFET (E-MOSFET)
• Regardless of the polarity of applied voltage, no electrons can flow
from source to drain because the n-type source, p-type substrate
and n-type drain behave as two pn-junctions connected back-to-
back and one of the pn-junctions is always reverse biased.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 48

Enhancement MOSFET (E-MOSFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 49

Enhancement MOSFET (E-MOSFET)
• Consider a positive voltage is applied between gate and source as shown
in Fig. 11 (b).
• As the oxide layer is an insulator sandwiched between two conductive
regions, a capacitive effect is formed.
• The metal surface which is gate and the conducting substrate act as the
capacitor plates.
• When a positive charge is applied to one plate of the capacitor, a
corresponding negative charge is induced on the opposite plate due to
the electric field between the plates.
• In this case, the positive potential at the gate induces negative charges in
the p-type substrate.
Shrishail Bhat, Dept. of ECE, AITM Bhatkal 50
Enhancement MOSFET (E-MOSFET)
• This charge results from minority carriers (electrons) attracted
towards the area of the gate.
• As the number of electrons reaching the region increases, the N-
channel is formed gradually and resistance between source and
drain decreases.
• The greater the gate potential, the lower the channel resistance
and higher the drain current 𝐼𝐼𝐷𝐷 .
• This process is called enhancement and the resulting device is
called enhancement type MOSFET (E-MOSFET).

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 51

Enhancement MOSFET (E-MOSFET)
• Fig. 12 shows the symbols of N-channel and P-channel E-MOSFET.

(a) N-channel E-MOSFET (b) P-channel E-MOSFET

Fig. 12 Symbols of E-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 52

Enhancement MOSFET (E-MOSFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 53

Enhancement MOSFET (E-MOSFET)
• In a P-channel E-MOSFET, the substrate is of n-type and the diffused
regions are of p-type.
• When a negative voltage is applied between the gate and source, a
P-channel is induced in the n-type substrate.
• The operation of P-channel E-MOSFET can be explained on the
same grounds as of N-channel, except the voltage polarities are
opposite to those of the N-channel.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 54

Depletion-Enhancement MOSFET
(D-MOSFET)
• A D-MOSFET can be operated in either depletion mode or
enhancement mode and hence it is also called
depletion/enhancement MOSFET.
• It is also called DMOS Transistor.
• Fig. 13 shows the basic structure of N-channel and P-channel
D-MOSFETs.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 55

Depletion-Enhancement MOSFET
(D-MOSFET)

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 56

Depletion-Enhancement MOSFET
(D-MOSFET)

Fig. 13 Basic structure of D-MOSFETs

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 57

Depletion-Enhancement MOSFET
(D-MOSFET)
• The drain and source are diffused into the substrate material and
then connected by a narrow channel adjacent to the insulated gate.
• In an N-channel D-MOSFET, the substrate is of p-type and the
diffused regions are of n-type and the channel is formed by doping
n-type material adjacent to the gate.
• In a P-channel D-MOSFET, the substrate is of n-type and the
diffused regions are of p-type and the channel is formed by doping
p-type material adjacent to the gate.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 58

Depletion-Enhancement MOSFET
(D-MOSFET)
• Consider a N-channel D-MOSFET.
• Since the gate is insulated from the channel, either a positive or a
negative gate voltage can be applied.
• The N-channel D-MOSFET operates in the depletion mode when a
negative gate-to-source voltage is applied and in the enhancement
mode when a positive gate-to-source voltage is applied.
• D-MOSFETs are generally operated in the depletion mode.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 59

Depletion-Enhancement MOSFET
(D-MOSFET)
Depletion Mode
• When a negative voltage is applied between the gate and source, the negative charges
on the gate induce an equal amount of positive charges (holes) on the other side of
the oxide layer.
• This results in the recombination of holes with electrons in the channel and reduces
the number of free electrons available.
• This makes the channel depleted of charge carriers which increases the effective
resistance of the channel.
• As the 𝑉𝑉𝐺𝐺𝐺𝐺 is made more and more negative, the channel resistance becomes more
and more, resulting in lesser drain current.
• At a sufficiently negative gate-to-source voltage, 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜 ) , the channel is totally
depleted and the drain current is zero.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 60

Depletion-Enhancement MOSFET
(D-MOSFET)
Enhancement Mode
• When a positive voltage is applied between the gate and source, free electrons
are induced in the N-channel, which enhances the channel conductivity and
thus 𝐼𝐼𝐷𝐷 increases.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 61

Depletion-Enhancement MOSFET
(D-MOSFET)
• Fig. 14 shows the symbols of N-channel and P-channel D-MOSFET.

(a) N-channel D-MOSFET (b) P-channel D-MOSFET

Fig. 14 Symbols of D-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 62

Depletion-Enhancement MOSFET
(D-MOSFET)
• The operation of P-channel D-MOSFET can be explained on the
same grounds as of N-channel, except the voltage polarities are
opposite to those of the N-channel.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 63

MOSFET Characteristics
and Parameters

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 64

MOSFET Characteristics
• Drain Characteristics
• It is the plot of 𝑉𝑉𝐷𝐷𝐷𝐷 vs 𝐼𝐼𝐷𝐷 for constant values of 𝑉𝑉𝐺𝐺𝐺𝐺 .
• Transfer Characteristics
• It is the plot of 𝑉𝑉𝐺𝐺𝑆𝑆 vs 𝐼𝐼𝐷𝐷 for constant values of 𝑉𝑉𝐷𝐷𝑆𝑆 .

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 65

E-MOSFET Drain Characteristics
• Fig. 15 shows the drain characteristics of an N-channel E-MOSFET.

Fig. 15 Drain characteristics of N-channel E-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 66

E-MOSFET Drain Characteristics
• The drain characteristics of P-channel E-MOSFET is similar to that
N-channel, but in P-channel, 𝑉𝑉𝐷𝐷𝐷𝐷 and 𝑉𝑉𝐺𝐺𝐺𝐺 are negative.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 67

 D-MOSFET Drain Characteristics
• Fig. 16 shows the drain characteristics of an N-channel D-MOSFET.
• The N-channel D-MOSFET is in depletion mode when 𝑉𝑉𝐺𝐺𝐺𝐺 is negative and in enhancement
mode when 𝑉𝑉𝐺𝐺𝐺𝐺 is positive.
•

Fig. 16 Drain characteristics of N-channel D-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 68

D-MOSFET Drain Characteristics
• The P-channel D-MOSFET is in depletion mode when 𝑉𝑉𝐺𝐺𝐺𝐺 is positive
and in enhancement mode when 𝑉𝑉𝐺𝐺𝐺𝐺 is negative.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 69

E-MOSFET Transfer Characteristics
• Fig. 17 shows the transfer characteristics of N-channel and P-channel
E-MOSFETs.

Fig. 17 General transfer characteristics of E-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 70

E-MOSFET Transfer Characteristics
• The E-MOSFET uses only channel enhancement.
• Therefore, an N-channel device requires a positive 𝑉𝑉𝐺𝐺𝐺𝐺 , and a P-channel device
requires a negative 𝑉𝑉𝐺𝐺𝐺𝐺 .
• From the characteristic, there is no drain current when 𝑉𝑉𝐺𝐺𝐺𝐺 = 0.
• Therefore, the E-MOSFET does not have a significant 𝐼𝐼𝐷𝐷𝐷𝐷𝐷𝐷 parameter.
• Also, there is ideally no drain current until 𝑉𝑉𝐺𝐺𝐺𝐺 reaches a certain
nonzero value called the threshold voltage, 𝑉𝑉𝐺𝐺𝐺𝐺(𝑡𝑡𝑡) .
• Threshold voltage 𝑽𝑽𝑮𝑮𝑮𝑮(𝒕𝒕𝒕𝒕) :
• It is the value of 𝑉𝑉𝐺𝐺𝐺𝐺 until which the drain current 𝐼𝐼𝐷𝐷 remains zero.

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 71

D-MOSFET Transfer Characteristics
• Fig. 18 shows the transfer characteristics of a N-channel and P-channel
D-MOSFETs.

Fig. 18 General transfer characteristics of D-MOSFET

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 72

D-MOSFET Transfer Characteristics
• The D-MOSFET can operate with either positive or negative gate
voltages.
• The point on the curves where 𝑉𝑉𝐺𝐺𝐺𝐺 =0 corresponds to 𝐼𝐼𝐷𝐷𝐷𝐷𝐷𝐷 .
• The point where 𝐼𝐼𝐷𝐷 = 0 corresponds to cut-off voltage 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) .
• The cut-off voltage 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) and pinch-off voltage 𝑉𝑉𝑃𝑃 are equal in
magnitude but opposite in sign, i.e., 𝑉𝑉𝐺𝐺𝐺𝐺(𝑜𝑜𝑜𝑜𝑜𝑜) = − 𝑉𝑉𝑃𝑃 .

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 73

References
• David A. Bell, “Electronic Devices and Circuits”, Oxford University
Press, 5th Edition, 2016
• Thomas L. Floyd, "Electronic Devices", Pearson Education, 9th
Edition, 2012

Shrishail Bhat, Dept. of ECE, AITM Bhatkal 74