Latest Manual
Latest Manual
1
Aim- Familiarization with basic laboratory instrument
1- Digital storage oscilloscope
2- Wave form generator
3- DC power supply
4- Digital multimeter
Digital storage oscilloscope(DSO)
Theory
DC Power supply
theory
DC power supplies use AC mains electricity as an energy source. Such power
supplies will employ a transformer to convert the input voltage to a higher or
lower AC voltage. A rectifier is used to convert the transformer output voltage to
a varying DC voltage, which in turn is passed through an electronic filter to
convert it to an unregulated DC voltage.
The filter removes most, but not all of the AC voltage variations; the remaining AC
voltage is known as ripple. The electric load's tolerance of ripple dictates the
minimum amount of filtering that must be provided by a power supply. In some
applications, high ripple is tolerated and therefore no filtering is required. For
example, in some battery charging applications it is possible to implement a
mains-powered DC power supply with nothing more than a transformer and a
single rectifier diode, with a resistor in series with the output to limit charging
current.
Pictorial view of DC power supply
Multimeter
Theory
Digital multimeter is a test equipment which offers several electronic
measurement task in one tool. It is also known as the voltmeter or Ohm meter or
Volt Ohm meter. The standard and basic measurements performed by multimeter
are the measurements of amps, volts, and ohms. Apart from that, these digital
multimeters perform many additional measurements by using digital and logic
technology. These may include temperature, frequency, continuity, capacitance
etc. The new improved integrated circuits of digital multimeter are more efficient,
faster and work with a large accuracy as compared to an analogue multimeter.
Pictorial view of analog and Digital multimeter
APPARATUS REQUIRED:-
D1
R1 ID
1k
VD 0 -2 0 m A
0 -1 2 V d c
0 -2 V o lt
Figure- A
2.Reverse Biasing:-
The circuit diagram for the reverse has been shown in fig.B. the reverse bias region of operation
is entered when the diode voltage v is made negative. If v is negative then the exponential term
becomes negligibly small compared to unity and current becomes as
I D ≈−I R
R1 D1 ID
1k
VD 0 -2 0 0 m ic ro A m m e t e r
0 -1 2 V d c
0 -2 0 V o lt
Figure- B
The forward and reverse bias characteristic for p-n junction diode has been given in fig.C.
Forward and Reverse Characteristics of P-N Junction Diode:
Figure- C
PROCEDURE:-
Using suitable patch cords make connection as shown in Figure- A for forward
characteristics and Figure- B for reverse characteristics.
The typical forward and reverse characteristics are shown in Figure- C.
Forward Characteristics:
Using suitable patch cords make connection as shown in figure- A for forward
characteristics.
Vary the Diode voltage (VD) in step of 1V starting from zero and observe the
corresponding value of Diode Current (ID) in micro- ampere (µA). and finally Plot
the graph.
OBSERVATION:
CALCULATION:
1. Static Resistance:
For the calculation of static resistance, first fix the supply voltage at some
constant values, than measure the value of voltage across diode V DQ and value of
current IDQ across the circuit. The ratio of the diode voltage to the current will give
the value of static resistance which is given as
RD=VDQ /IDQ
2. Dynamic Resistance:
For calculation of dynamic resistance, make the supply variable. Plot the I-V curve
of p-n junction diode, than select two points on the curve which are making
tangent on it. The ratio of voltage difference to current difference respective to
those two points will give the value of dynamic resistance which is given as
Rd=Δ VD/ Δ ID
RESULT:
1. RD = ……………….
2. Rd = ………………..
PRECAUTIONS:
1. Keep variable power supply in anti-clock wise before the starting the
experiment.
2. Do not exceed Diode current beyond the limit i.e. 10 mA.
EXPERIMENT NO - 4
OBJECTIVE: To plot forward and reverse bias characteristics of Zener diode and
calculate the Zener voltage.
APPARATUS REQUIRED:-
CIRCUIT DIAGRAM:-
1. Forward Bias:
R1 Iz
1k
VD 0 -2 0 m A
0 -1 2 V d c
0 -2 V o lt
Figure- A
2. Reverse Biase
R1 D5 Iz
1k
VD 0 -2 0 m A
0 -1 2 V d c
0 -2 0 V o lt
Figure- B
Figure- C
PROCEDURE:-
Forward characteristics for Zener Diode: Using suitable patch cords make
connection as shown in figure- A for forward Characteristics of zener diode.
Reverse characteristics for Zener Diode: Using suitable patch cords make
connection as shown in fig. b for reverse Characteristics.
In order to plot the reverse bias characteristics, perform the following steps:
Vary the Diode voltage (VZ) in steps of 1V starting from zero and observe the
corresponding value of Zener Diode Current (I Z) in mili ampere (mA) and observe
the point where small change of zener voltage shows the great change in Zener
Diode current (IZ) that is breakdown zener voltage. And finally plot the graph.
OBSERVATION:
RESULT:
observe the point where small change of zener voltage shows the great change in
Zener Diode current (IZ) that is breakdown zener voltage.
PRECAUTIONS:
1. Keep variable power supply in anti-clock wise before the starting the
experiment.
2. Do not exceed Diode current beyond the limit i.e. 10 mA.
EXPERIMENT N0 - 5
OBJECTIVE: To study of Half Wave Rectifier circuit and find ripple factor using
capacitor filter circuit.
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. P-N Junction Diode 01 No.
3. Resistance- 1KΩ 01 No.
4. Transformer (9-0-9) 01 No.
5. CRO with CRO Probes 01No.
6. Electrolytic Capacitor 01No.
7. Connecting Wires
CIRCUIT DIAGRAM:
D1
0 -9V
1 3
AC 230V
P rim a ry RL
F R E Q = 50H z 2 4 1k
Filter Circuit
THEORY:
In Half Wave Rectification, When AC supply is applied at the input, only Positive
Half Cycle appears across the load whereas, the negative Half Cycle is suppressed.
How this can be explained as follows:
During positive half-cycle of the input voltage, the diode D1 is in forward bias and
conducts through the load resistor R L. Hence the current produces an output
voltage across the load resistor R L, which has the same shape as the +ve half cycle
of the input voltage.
During the negative half-cycle of the input voltage, the diode is reverse biased
and there is no current through the circuit. i.e., the voltage across R L is zero. The
net result is that only the +ve half cycle of the input voltage appears across the
load. The average value of the half wave rectified o/p voltage is the value
measured on dc voltmeter.
For practical circuits, transformer coupling is usually provided for two reasons.
1.The voltage can be stepped-up or stepped-down, as needed.
With Filter:
Ripple Factor r =1/(2 √ 3 fCR)
PROCEDURE:
1. Make connections for half wave rectifier as shown in figure.
2. Observe the input wave from on oscilloscope
(Transformer Secondary Voltage i.e 9-0-9 Volt)
3. Observe the output wave form on oscilloscope.
4. Measure the DC voltage VDC across the load.
5. Draw output waveform.
6. Measure r.m.s. value of output voltage.
7. Ripple factor r =√ ¿ ) – 1
OBSERVATION:
V pp V pp Vm Vm r =√ ¿ ) – 1
V m= V rms = V dc =
2 √2 Π
T P T P T P T P
Without
Filter
RESULT: The ripple factors for half wave Rectifier with Filter and without filter
have been calculated.
EXPERIMENT N0 - 6
OBJECTIVE: To study of Center- Tapped Full Wave Rectifier circuit and find ripple
factor using capacitor filter circuit.
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. P-N Junction Diode 02 Nos.
3. Resistance- 1KΩ 01 No.
4. C.T. Transformer (9-0-9) 01 No.
5. CRO with CRO Probes 01No.
6. Electrolytic Capacitor 01No.
7. Connecting Wires
CIRCUIT DIAGRAM:
THEORY:
The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During
positive half cycle of secondary voltage (input voltage), the diode D1 is forward
biased and D2is reverse biased. So the diode D1 conducts and current flows
through load resistor RL.
During negative half cycle, diode D2 becomes forward biased and D1 reverse
biased. Now, D2 conducts and current flows through the load resistor R L in the
same direction. There is a continuous current flow through the load resistor R L,
during both the half cycles and will get unidirectional current as show in the
model graph. The difference between full wave and half wave rectification is that
a full wave rectifier allows unidirectional (one way) current to the load during the
entire 360 degrees of the input signal and half-wave rectifier allows this only
during one half cycle (180 degree).
THEORITICAL CALCULATIONS:
Without Filter:
V pp
V m=
2
Vm
V rms =
√2
2V m
V dc =
Π
Ripple Factor r =√ ¿ ) – 1= 0.482
With Filter:
Ripple Factor r =1/¿
PROCEDURE:
1. Make connections for full wave rectifier as shown in figure.
2. Observe the input wave from on oscilloscope
(Transformer Secondary Voltage i.e 9-0-9 Volt)
3. Observe the output wave form on oscilloscope.
4. Measure the DC voltage VDC across the load.
5. Draw output waveform.
6. Measure r.m.s. value of output voltage.
7. Ripple factor r =√ ¿ ) – 1
OBSERVATION:
V pp V pp Vm 2V m r =√ ¿ ) – 1
V m= V rms = V dc =
2 √2 Π
T P T P T P T P
Without
Filter
RESULT: The ripple factors for Full wave Rectifier with Filter and without filter
have been calculated.
EXPERIMENT N0 - 7
OBJECTIVE: To study of Full Wave Bridge Rectifier circuit and find ripple factor
using capacitor filter circuit.
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. P-N Junction Diode 04 Nos.
3. Resistance- 1KΩ 01 No.
4. Transformer (9-0-9) 01 No.
5. CRO with CRO Probes 01No.
6. Electrolytic Capacitor 01No.
7. Connecting Wires
CIRCUIT DIAGRAM:
Filter Circuit
THEORY:
Another type of circuit that produces the same output waveform as the full wave
rectifier circuit above is that of the Full Wave Bridge Rectifier. This type of single
phase rectifier uses four individual rectifying diodes connected in a closed loop
“bridge” configuration to produce the desired output. The main advantage of this
bridge circuit is that it does not require a special center tapped transformer,
thereby reducing its size and cost. The single secondary winding is connected to
one side of the diode bridge network and the load to the other side as shown
below.
The four diodes labeled D1 to D4 are arranged in “series pairs” with only two
diodes conducting current during each half cycle. During the positive half cycle of
the supply, diodes D1 and D2conduct in series while diodes D3 and D4 are reverse
biased and the current flows through the load as shown below.
As the current flowing through the load is unidirectional, so the voltage
developed across the load is also unidirectional the same as for the previous two
diode full-wave rectifier, therefore the average DC voltage across the load
is 0.637Vmax.
THEORITICAL CALCULATIONS:
Without Filter:
V pp
V m=
2
Vm
V rms =
√2
2V m
V dc =
Π
Ripple Factor r =√ ¿ ) – 1= 0.482
With Filter:
Ripple Factor r =1/(4 √ 3 fCR)
PROCEDURE:
1. Make connections for full wave rectifier as shown in figure.
2. Observe the input wave from on oscilloscope
(Transformer Secondary Voltage i.e 9-0-9 Volt)
3. Observe the output wave form on oscilloscope.
4. Measure the DC voltage VDC across the load.
5. Draw output waveform.
6. Measure r.m.s. value of output voltage.
7. Ripple factor r =√ ¿ ) – 1
OBSERVATION:
V pp V pp Vm 2V m r =√ ¿ ) – 1
V m= V rms = V dc =
2 √2 Π
T P T P T P T P
Without
Filter
RESULT: The ripple factors for Full wave Bridge Rectifier with Filter and without
filter have been calculated.
EXPERIMENT NO - 8
OBJECTIVE: To study of clipping and clamping circuits.
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. P-N Junction Diode 02 Nos.
3. Resistance- 10KΩ 01 No.
4. Function Generator 01 No.
5. CRO with CRO Probes 01No.
6. Ceramic Capacitor (0.01µfd) 01No.
7. Power Supply 01 No.
8. Connecting Wires
CIRCUIT DIAGRAM:
S ig na l G e ne ra to r D IOD E L o a d R e s is t a n c e
Out Put
FR E Q = 1 K H z 10k
5 V o lt
D1
S ig na l G e ne ra to r D IO D E L o a d R e s is t a n c e
FR EQ = 1K H z 10k
O utput
5 V o lt
S ig na l G e ne ra to r D IO D E
FR E Q = 1 K H z L o a d R e s is t a n c e
O utput
5 V o lt 10k
If Vin ≤ Vref. Vo = o
If Vin > Vref. Vo = Vin – Vref.
V re f . D1
S ig na l G e ne ra to r D IO D E
FR E Q = 1 K H z L o a d R e s is t a n c e
O utput
5 V o lt 10k
If Vin ≥ 0 Vo = Vin
For negative value of Vin Vo = 0
R e s is t a n c e
S ig na l G e ne ra to r 10k D1
D IO D E
FR E Q = 1 K H z O utput
5 V o lt
R e s is t a n c e
S ig na l G e ne ra to r 10k D1
D IO D E
FR E Q = 1 K H z O utput
5 V o lt
A Parallel Clipper Circuit
R e s is t a n c e
S ig na l G e ne ra to r 10k
D1
D IO D E
FR E Q = 1 K H z O utput
5 V o lt V re f .
R e s is t a n c e
S ig na l G e ne ra to r 10k
D1 D2
D IO D E
FR E Q = 1 K H z D IOD E
O utput
5 V o lt V re f .
V re f .
5. Clamper Circuit
C1
S ig na l G e ne ra to r .01m f d D1
10k
D IOD E R e s is t a n c e
FR E Q = 1 K H z O utput
5 V o lt
C1
S ig na l G e ne ra to r .01m f d D1
10k
D IOD E R e s is t a n c e
FR E Q = 1 K H z O utput
5 V o lt
C1
S ig na l G e ne ra to r .01m f d D1
10k
D IOD E R e s is t a n c e
FR E Q = 1 K H z O utput
5 V o lt V re f .
THEORY:
1. Clippers:
Clipping circuits (also known as limiters, amplitude selectors, or slicers), are used
to remove the part of a signal that is above or below some defined reference
level. We’ve already seen an example of a clipper in the half-wave rectifier – that
circuit basically cut off everything at the reference level of zero and let only the
positive-going (or negative-going) portion of the input waveform through.
To clip to a reference level other than zero, a dc source is put in series with the
diode. Depending on the direction of the diode and the polarity of the battery,
the circuit will either clip the input waveform above or below the reference level
(the battery voltage for an ideal diode; i.e., for Von=0).
Clipping circuit is of various types:
1. Series Clipper
2. Parallel Clipper
2. Clampers:
Clamping circuits, also known as dc restorers or clamped capacitors, shift an
input signal by an amount defined by an independent voltage source. While
clippers limit the part of the input signal that reaches the output according to
some reference level(s), the entire input reaches the output in a clamping circuit –
it is just shifted so that the maximum (or minimum) value of the input is
“clamped” to the independent source.
Clamping circuit is of various types:
1. Positive Clamper
2. Negative Clamper
PROCEDURE:
1. Connect the circuit using suitable patch cord as shown in circuit
diagram.
2. Apply a Sinusoidal input of 5 volt and 1 kHz. (Use signal Generator for
Sinusoidal input).
3. Observe the input signal on channel 1 on CRO and out put signal from
circuit on channel 2 on CRO.
4. Repeat the experiment for different clipping and clamping circuits.
RESULT:
1. Sketch the wave shape and label the Amplitudes.
2. Indicate the type of clipping in each case.
3. Draw transfer characteristics for different clipping and clamping circuits.
EXPERIMENT NO - 9
OBJECTIVE: To study and plot the input and output Characteristics of the given
transistor in CB (common base) configuration.
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. Transistor (BJT) 01 No.
3. Resistance- 1KΩ 02 Nos.
4. Multi-Meter 04 Nos.
5. Dual Power Supply 01 No.
6. Connecting Wires
CIRCUIT DIAGRAM:
THEORY:
A transistor is a three terminal active device. The terminals are emitter, base,
collector. In CB configuration, the base is common to both input (emitter) and
output (collector). For normal operation, the E-B junction is forward biased and C-
B junction is reverse biased. In CB configuration, IE is +ve, IC is –ve and IB is –ve. So,
VEB = F1 (VCB, IE) and
IC = F2 (VEB,IB)
With an increasing the reverse collector voltage, the space-charge width at the
output junction increases and the effective base width „W‟ decreases. This
phenomenon is known as “Early effect”. Then, there will be less chance for
recombination within the base region. With increase of charge gradient with in
the base region, the current of minority carriers injected across the emitter
junction increases.
PROCEDURE:
Input characteristics.
1. Using suitable patch cords make connections as shown in figure- 1 for NPN
transistor and figure- 2 for PNP transistor.
2. The typical input characteristics for the transistors is shown in figure- 3
1. Reverse the supply connected to the output circuit. This will forward bias
the collector junction.(Reverse the voltmeter polarity too).
2. Set the emitter current to a certain value, say 1mA.
3. Now vary the collector Base voltage (V CB), note the corresponding collector
current until IC become zero. Typical value of VCB(Sat.)=0.6Volt
OBSERVATION:
FOR INPUT CHARACTERISTICS
Output voltage Constant (VCB=0 volt) Output voltage constant (VCB=2 volt)
Input voltage Input current Input voltage Input current
VEB(Volt) IE(mA) VEB(Volt) IE(mA)
0 0
0.1 0.1
0.2 0.2
0.3 0.3
0.4 0.4
0.5 0.5
0.6 0.6
0.7 0.7
0.8 0.8
0.9 0.9
1 1
\
FOR OUTPUT CHARACTERISTICS
Input Current Constant (IE=1 mA) Input Current constant (IE=2 mA)
output voltage output current output voltage output current
VCB(Volt) IC(mA) VCB(Volt) IC(mA)
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
CALCULATION:
1. Input resistance, Rin= VEB/IE for a certain value of VCB.
2. Output resistance, Ro=VCB/IC for a certain value of IE.
3. Current gain, α= IC/IE for a certain value of VCB.
RESULT:
Rin =--------------------
RO = -------------------
α = -------------------
OBJECTIVE: To study and plot the input and output characteristics of the given
transistor in C.E. (Common Emitter) Configuration
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. Transistor (BJT) 01 No.
3. Resistance- 1KΩ 01 No.
4. Resistance- 100KΩ 01 No.
5. Multi-Meter 04 Nos.
6. Dual Power Supply 01 No.
7. Connecting Wires
CIRCUIT DIAGRAM:
THEORY:
In common emitter configuration, input voltage is applied between base and
emitter terminals and output is taken across the collector and emitter terminals.
Therefore the emitter terminal is common to both input and output.
The input characteristics resemble that of a forward biased diode curve. This is
expected since the Base-Emitter junction of the transistor is forward biased. As
compared to CB arrangement IB increases less rapidly with VBE. Therefore input
resistance of CE circuit is higher than that of CB circuit.
The output characteristics are drawn between I c and VCE at constant IB. the
collector current varies with VCE upto few volts only. After this the collector
current becomes almost constant, and independent of V CE. The value of VCE up to
which the collector current changes with V CE is known as Knee voltage. The
transistor always operated in the region above Knee voltage, I C is always constant
and is approximately equal to IB.The current amplification factor of CE
configuration is given by
β = ΔIC/ΔIB
Input Resistance, ri = ∆VBE /∆IB (μA) at Constant VCE
Output Résistance, ro = ∆VCE /∆IC at Constant IB (μA)
PROCEDURE:-
Input Characteristics
1. Using suitable patch cords make connections as shown in figure- 1 for
NPN transistor and figure- 2 for PNP transistor.
2. The typical input characteristics of PNP and NPN transistors in CE
configurations are shown in figure- 3
To plot Input characteristics, perform the following steps:
(i) Set the collector voltage VCE to a constant voltage of 1Volt.
(ii) Now vary the base voltage V BE in steps of 0.1V and observe the
corresponding base current (IB). Do not exceed the base current from
200µA. (The maximum base current varies from transistor to
transistor.)
(iii) Repeat step (ii) for different values of collector voltages, V CE: 2V, 5V,
and Open collector.
(iv) Plot the input characteristics.
Output Characteristics
1. The typical output characteristics for some transistors are shown in fig.4
To plot Input characteristics, perform the following steps:
(i) Set the base current (IB) to say 25µA with the help of 0-12V variable
supply in the input circuit.
(ii) Now vary the collector voltage (VCE) from 0 to 12 Volts in steps of
say 1 Volt and observe the corresponding values of collector current
(IC).
(iii) Repeat step (ii) for different values of base current, say 35µA, 50µA,
(iv) Plot the output characteristics.
OBSERVATION:
FOR INPUT CHARACTERISTICS
Output voltage Constant (VCE=0 volt) Output voltage constant (VCE=2 volt)
Input voltage Input current Input voltage Input current
VBE(Volt) IB(µA) VBE(Volt) IB(µA)
0 0
0.1 0.1
0.2 0.2
0.3 0.3
0.4 0.4
0.5 0.5
0.6 0.6
0.7 0.7
0.8 0.8
0.9 0.9
1 1
FOR OUTPUT CHARACTERISTICS
Input Current Constant (IB=25µA) Input Current constant (IB=35µA)
output voltage output current output voltage output current
VCE(Volt) IC(mA) VCE(Volt) IC(mA)
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
CALCULATION:
1. Input resistance, RIN = VBE / IB at certain value of VCE.
2. Output resistance Ro = VCE/IC at certain value of IB
3. DC forward current gain βF = IC/IB
RESULT:
Input resistance, RIN = -------------
Output resistance Ro = ------------------
DC forward current gain βF =-------
Important Note:-
As soon as, the collector voltage is changed, the base current also gets varied. For
the new collector voltage, set the base current to the earlier fixed value. This
must be done for every change in collector voltage to ensure that the base
current is constant.
Points to note:-
1. The cut-in voltage for a Ge transistor is about 0.2 Volt and about 0.6 volt for
a Si transistor.
2. Observe the ‘saturation’ and ‘active’ and cut-off regions in the output
characteristics.
3. The transistor gives current gain βF in the range of 100 to 300 general
purpose transistors.
4. Keep the knobs of both the 0-10 V D.C. supplies to fully anticlockwise
position before switching on the mains supply.
EXPERIMENT NO - 11
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. Transistor (FET) 01 No.
3. Resistance- 1KΩ 02 No.
4. Multi-Meter 03 Nos.
5. Dual Power Supply 01 No.
6. Connecting Wires
CIRCUIT DIAGRAM:
THEORY:
A FET is a three terminal device, in which current conduction is by majority
carriers only. The flow of current is controlled by means of an Electric field. The
three terminals of FET are Gate, Drain and Source. It is having the characteristics
of high input impedance and less noise, the Gate to Source junction of the FETs
always reverse biased. In response to small applied voltage from drain to source,
the n-type bar acts as sample resistor, and the drain current increases linearly
with VDS. With increase in ID the ohmic voltage drop between the source and the
channel region reverse biases the junction and the conducting position of the
channel begins to remain constant. The V DS at this instant is called “pinch of
voltage”. If the gate to source voltage (V GS) is applied in the direction to provide
additional reverse bias, the pinch off voltage ill is decreased.
In amplifier application, the FET is always used in the region beyond the pinch-off.
FET parameters:
AC Drain Resistance,
rd = ∆VDS / ∆ID at constant VGS
Trans conductance,
gm = ∆ID /∆VGS at constant VDS
Amplification,
µ = ∆VDS/∆VGS at constant ID
CHARACTERISTICS:
Drain Characteristics
The typical Drain characteristics are shown in figure- 2.
PROCEDURE:
1. Connect the circuit as shown in fig.
2. Set VGS = 0Volt. Keep 0-5Volt variable power supply at anti-clock wise
direction for making VGS = 0Volt.
3. Now increase the VDS in step say 1volt starting from zero and observe the
corresponding Drain Current (ID) in milli-ammeter.
4. Repeat step 2 for different VGS value say -0.5V,-1V, -1.5, -2V
5. Plot the graph between VDS vs ID
Transfer Characteristics
The typical Drain characteristics are shown in figure- 3.
RESULT:
1. AC DRAIN RESISTANCE =---------------------
2. TRANSCONDUCTANCE (gm) =---------------------
3. AMPLIFICATION FACTOR =------------------------
4. DC DRAIN RESISTANCE, R =------------------------
PRECAUTIONS:
Do not exceed the ID drain current 10mA.
Take proper care of terminates of JFET while fixing in the board.
EXPERIMENT NO - 12
APPARATUS REQUIRED:
1. Bread Board 01 No.
2. Transistor (MOSFET) 01 No.
3. Resistance- 1KΩ 02 No.
4. Multi-Meter 03 Nos.
5. Dual Power Supply 01 No.
6. Connecting Wires
CIRCUIT DIAGRAM:
THEORY:
MOSFET is an abbreviation for metal oxide semiconductor filed transistor. Like
JFET, it has a source (S), drain (D) and gate (G). However unlike JFET, the gate of
MOSFET is insulated from channel. Because of this, MOSFET is sometimes known
as IGFET (insulated gate FET).
Basically MOSFET are of two types
1) Depletion type MOSFET and
2) Enhancement type MOSFET.
Enhancement MOSFET has no depletion mode and only operates in enhancement
mode. It differs in construction from depletion type MOSFET in the sense that it
has no physical channel. The min gate-source voltage (VGS), which produces
inversion layer, called as threshold voltage.
Drain characteristics for enhancement MOSFET: -
When VGS< (VGS) the no drain current flows. However in actual practice and
extremely small value of drain current does flow through MOSFET. This current
flow is generally due to presence of thermally generated electron in P type
substrate when value of VGS is kept above (VGS) significant drain current flow.
Transfer characteristics of MOSFET: - When VGS=0 there is no drain current,
however if VGS is increased rapidly as shown in fig. The relation gives the drain
current at any instant along the curve.
ID=k [(VGS-VGS)]
CHARACTERISTICS:
Drain Characteristics
The typical Drain characteristics are shown in figure- 3.
Transfer Characteristics
The typical Transfer characteristics are shown in figure- 4.
PROCEDURE:
In order to draw the Drain Characteristics perform following steps:
1. Connect the circuit as shown in figure.
2. Set VGS = 0Volt. Keep 0-5Volt variable power supply at anti-clock wise
direction for making VGS = 0Volt.
3. Now increase the VDS in step say 1volt starting from zero and observe
the corresponding Drain Current (ID) in milli ammeter.
4. Repeat step 2 for different VGS value say -0.5V,-1V, -1.5, -2V
5. Plot the graph between VDS vs ID
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OBSERVATION:
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CALCULATION:
The various parameters of a MOSFET are:
RESULT:
PRECAUTION:
1. Do not exceed the ID drain current 10mA.
2. Take proper care of terminates of MOSFET while fixing in the board.