CMC e Sobretensões - Leggate (1998)

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Reflected Waves and Their Associated Current

D. Leggate J. Pankau D. Schlegel R. Kerkman G. Skibinski


Rockwell Automation
Standard Drives Division
6400 W. Enterprise Drive Mequon, WI 53092
(414) 512 - 8263 (414) 512 - 8300 fax
rjkerkman@ra.iockwell.com

Abstract: Reflected wave transient voltages that result from Recently, a system model, which incorporates the above
fast IGBT voltage source inverters have received considerable mentioned more accurate models, was implemented
investigation. The modeling and simulation of these transients employing the simulator package SIMULINK [8]. The
requires sophisticated motor and cable models. Most voltage transport delay feature of the program is used to simulate the
source PWM adjustable speed drive suppliers now provide
traveling wave propagation time and line oscillation frequency
combinations of passive and active control techniques to mitigate
the adverse effects of over voltage stress, however, the cost of the
(f,). Cable skin and proximity effects of cable resistance that
passive fixes often exceed the cost of the drive. Another aspect of are a function o f h may also then be determined accurately.
low rise time devices, heretofore not examined to the extent of the High frequency motor modeling is a technical area receiving
over voltage problem, is the resulting current from traveling considerable attention [9]. The motor model disclosed in [8]
waves. In this paper a historical perspective of the over voltage combined the motor surge impedance, resistance, capacitance
problem is presented. Models of system components are reviewed and winding inductance in a parallel tank circuit. It was shown
and simulation results are compared with experimental results. this model accurately predicted the motor terminal voltage for
These models are then employed to predict the peak currents cable lengths in excess of 1000 ft. Higher order motor models,
from voltage source inverters as the cable, load, and IGBT rise
a multiple series - parallel model proposed in [lo], requires
time are altered. The paper will then examine the consequences
of reflected wave currents on current sensing, drive control, and the determination of twelve circuit parameters. Although a
device performance. From these results, a minimum rise time is simplification of the motor model through a system transfer
established. function representation is possible, the design of system and
application simulation software becomes cumbersome.
I. INTRODUCTION Furthermore, the testing of motors in the MHz range is
typically performed at excitation levels below nominal.
Adjustable Speed Drives (ASD) with third generation Consequently, the effect of the nominal state of the machine
Insulated Gate Bipolar Transistors (IGBT) dominate the low on the high frequency characterization is not adequately
voltage, adjustable speed industrial market. The fast rise times understood.
of third generation IGBTs have provided reduced package One consequence of the fast rise time of modem ASDs not
size and in combination with high speed Digital Signal previously examined in detail is the resulting high frequency
Processors (DSP) provide performance characteristics inverter currents. Existing technical literature focuses on the
comparable to dc drives. However, the fast rise times create effects of common and differential mode currents relative to
significant problems, for example motor over voltages, the Electromagnetic Interference (EMI) of ASD’s [ 1 11. The
communications interference, and bearing currents [ 1-71. interplay of high frequency currents with feedback sensors,
As a result, the technical literature reflects an enormous digital and analog ground, control, and power device behavior
effort investigating these undesirable characteristics of IGBTs has not been investigated. This paper first presents
on ac drive systems. System modeling, PWM modulators, and experimental and field test data showing high frequency
high frequency component modeling are all employed to currents, their conduction path, and their impact on the
understand and modify drive design to mitigate these effects. optimal sampling time for PWM converters. Next, the
For example, the modeling of cables and the prediction of effectiveness of dead time compensation is examined when
over voltages at the terminals of the motor has progressed confronted by high frequency currents and low fidelity
from the simple prediction of 2 pu (lpu = bus voltage) of an feedback signals. Simulations are provided verifying the
uncharged line to the complex interaction of cables and observed phenomena. Next, current sensor fidelity is
modulators to predict the > 2 pu terminal voltage of modem examined; current sensor design and construction and
drive controllers [6]. To accomplish this accuracy, cable influence of board layout on current feedback and their impact
models have progressed from the simple lossless line to more on drive performance is discussed. Finally, the paper
accurate cable modeling techniques encompassing cable addresses the presence of high frequency currents and their
construction types, which use transmission line models with a effects on IGBT performance and establishes a preferred rise
transport delay function [8]. time.

0-7803-4943-1/98/$10.00 0 1998 IEEE 789


11. HIGHFREQUENCY
CURRENTS oscillation in the current at point B. At point C, a peak current
of 14 amps occurs as the uqhase inverter pole switches from
A. Traveling Waves and High Frequency Currents off-to-on. These oscillations and peak currents present a
significant problem for center pulse sampling by the
Fig. 1 shows the uvwqhase inverter poles to positive bus, microcontroller: Correct dead time compensation requires the
and the uqhase motor current at 40 Hz, 460 Vrms, 10 hp polarity of the current. Current sampling of the fundamental
motor, no load current of 6.25 Apk, and a 8 kHz carrier. The component exploits the ideal condition of zero ripple at the
cable length is 100 ft of #12 AWG cable. peak and valley of the triangle [ 121.
There are three types of disturbances apparent in the
uqhase motor current. A high frequency common mode B. Drive Control and High Frequency
current at points A, C, and D is the result of inverter pole
switching of wqhase at A, vqhase at C and D. Note the time The high frequency currents present with modem IGBT
to dampen the oscillation at point C is 20 ps. Also important, ASD's present significant challenges to proper sampling and
the relatively long switching time of wqhase at point F inverter protection. If the pulse widths are sufficiently long,
induces a substantially smaller high frequency component in enough time may exist to allow for the decay of the high
uqhase current. This amplitude is governed by whether the frequency components. If current sampling occurs at the
IGBT or diode is conducting prior to the commutation. At the center of the pulse, an accurate sample of the current can be
instant the uqhase inverter pole switches from on-to-off, at obtained. This condition is demonstrated in Fig. 1. If,
point B, uqhase current contains high frequency common and however, the pulse widths become insufficiently wide, the
differential mode components. Note the coupling at point A, current will contain undamped high frequency components as
which drives the current peak 5 amps above the nominal and 6 shown in Fig. 2. Depending on the current transducer, board
amps below. The disturbance frequency is primarily governed layout, and filtering, these high frequency components may be
by the cable characteristics, cable length, and the power aliased into the passband or contaminate the digitized
device rise time. At point E, a large current transient occurs as feedback signals. The effect of degraded current fidelity on
the uqhase inverter pole switches from off-to-on. The fast dead time compensation, current regulation, drive protection,
rise time of the power device, coupled with the cable length, and other drive control functions has not been reported.
and disturbances from wqhase and vqhase inverter poles,
results in a h g h peak current condition. The currents at points C. Dead Time Compensation in the Presence of High
E and E' are 12 amps above the nominal value. Frequency Currents
Fig. 2 shows the same operating conditions as Fig. 1, except
Voltage distortion resulting from zero clamped currents is
the cable length has increased from 100 ft to 300 ft.
Comparing Fig. 2 with Fig. 1', notice the almost continuous one of the most persistent sources of drive instability and
corruption of uqhase current in Fig. 2. U- and wqhase pulse performance degradation. Recently, Kim, et al. established the
widths are now much narrower. At point A, a high frequency contribution to this distortion from the parasitic capacitance
existing in parallel with the power device [ 131. The parasitic
common mode current results from the switclmg of vqhase
inverter pole. At point B, the uqhase inverter pole switches capacitance delays the transfer of the current from an IGBT to
from on-to-off resulting in a high frequency current containing the pole's diode. At near zero current conditions this can
common and differential modes. Note the duration of the produce significant voltage and current distortion. Although

Ughase to pos bus


Ughase to pos bus 500 V/div
500 Vldiv
0
0 U j h a s e cumnt
Ughastt cment
0 5 Ampldiv
0 5W d i v

Fig. 2. Current disturbance during PWM pole switching at 300 ft of #


Fig. 1. Current disturbance during PWM pole switching 12 AWG cable (20 pldiv).
at 100 ft of # 12 AWG cable (20 pddiv).

790
correctable with short cable lengths through an adjustment of anomaly is about 0.8 ps and the voltage level is about 213 of
the dead time compensation value, long cables often present a the bus voltage value. Trace 3, the uqhase lower IGBT,
more difficult problem to solve. shows the lower inverter device switching from on-to-off, is
High frequency common and differential mode currents, due the mirror image of the voltage anomaly of trace 2. The
to fast rise time IGBTs, cable length and characteristics, and ughase motor current in trace 1 is driven from -6.25 Apk to -
load impedance will also affect the voltage transition. Fig. 3 12 Apk by the switching action of vqhase just prior to the
displays the uqhase to positive bus voltage, bus voltage, upper uqhase IGBT switching from off-to-on. The current
uqhase current, and the bus current. The drive is a 575 Vac clamps at -12 Apk, decreases in magnitude and oscillates
ASD with a 20 hp induction motor at 60 Hz, 4 lcHz camer about zero when the device turns on. The magnitude of the
frequency, and 600 ft of #8 AWG cable. current is not sufficient to fully turn-on the upper device and
At the instant the upper device is turned off, the phase results in the device attempting to turn-off. As the magnitude
current is transitioning through zero. Phase current tracks the of the current increases the upper pole is turned fully on. The
applied voltage, its amplitude governed by the characteristic current oscillation after the device is tumed on is 250 kHz.
impedance of the cable. The propagation time (tp) is The vqhase motor current, trace 4, exhibits the same
approximately 1 ps. The reflected wave reaches the inverter clamping effect, but does not oscillate around zero. This high
after 2 tp.Although the current is initially conducting through frequency zero current clamping is complex and govemed by
the lower IGBT, the associated reflected wave current the positions of the PWM pulses, cable length, rise time,
reverses the uqhase current's polarity. As the upper trace parasitics, and load impedance.
shows, this reversal in polarity attempts to reverse the uqhase
terminal voltage. This occurs despite the lower device having D. Simulations
a gate signal applied. Once the current traverses zero and
becomes positive, the lower diode conducts. Finally the lower Errors in modeling the natural frequency result in erroneous
device is turned off, the upper turned on, and the phase and peak voltages for the > 2 pu transient mode of PWM double
bus currents oscillate at their natural frequencies. The pulse and polarity reversal simulations [9,10]. This is a
resulting voltage disturbance when sustained can produce consequence of inaccurate modeling of the dwell time trapped
limit cycle conditions. To account for this voltage distortion voltage [8]. Furthermore, errors in line oscillation frequency
through modifications in the dead time compensation is, if not produce erroneous damping coefficients, resulting in self
impossible, at least impractical. perpetuating peak voltage error in the > 2 pu transient mode.
Another problem, akin to the low frequency zero clamped Cable eigen frequencies tend to increase to much higher
current [13], is displayed in Fig. 4. Here a line charging vaIues as the Iine cable is broken down into a number of
condition is shown at 50 Hz, for a 10 hp load at 4 lcHz and multiple lumped x section models. This implies that time steps
500 ft of #12 AWG cable. Trace 1 is the uqhase motor must be very small to get accurate results, an effect that was
current. Trace 2 is the uqhase upper IGBT voltage measured confirmed with distributed x model simulation. Also, as more
from uqhase to positive bus. Trace 3 is the uqhase lower sections are added, convergence problems appear as well as
IGBT voltage measured from uqhase to negative bus. Trace longer time simulations. Thus, a simulation package that is
4 is the vqhase motor current. accurate, easily interfaced, and efficient provides design
Examining trace 2, the uqhase upper IGBT, shows the engineers with the capability of investigating high frequency
upper inverter device switching from off-to-on. 1 ps after the phenomena prior to prototyping and preclude the costs
turning on of the upper uqhase IGBT, a voltage disturbance associated with testing of various cable lengths.
occurs. The upper device tries to turn off. The duration of the The transport delay model accurately predicts propagation

Ujhase current
.. " " 0 lOAmp/div
11 Ughase to pos bus
500 ddiv Ughase to pos bus
1- 0 500V/div
Vbus 200 v/div
Ughase to neg bus
500 V/div
Ughase Current
I O arnpldiv
I Vghase current
Bus current 10 Amp/div

Fig. 3. Voltage disturbance during voltage transition (2 ps/div) Fig. 4. Zero clamped current during line charging (2 pddiv)

79 I
time, oscillation frequency CO,, determines ac skin effect 2. In Fig. 6, a sampling algorithm clocked to occur at the peak
resistance as a function of wo,has no convergence problem (A) and valley (B) of the carrier yields very accurate
and is a relatively fast simulation. Thus, this is the preferred fbndamental component values; comparable points in Fig. 2
model to determine cable damping effects and transient over- present signals corrupted by high frequency components.
voltages in drive-motor-cable systems. The model is capable Therefore, an ideal current transducer with infinite
of-examining the effects of cable damping resistance, surge bandwidth would accurately track the current and ensure
impedance variation with motor hp, and inverter models [8]. perfect polarity detection. As shown above, however, lightly
These techniques were employed and simulations conducted damped high frequency components would make sensing of
for the purpose of predicting and analyzing switching the fUndamenta1 component a function of cable length.
transients, for example the voltage distortions displayed in Commercially available current transducers relying on Hall
Figs. 3 and 4. techniques, for example, have bandwidths of approximately
Fig. 5 shows simulations results for conditions identical to 200 W . AIthough the current fidelity is compromised,
those of Fig. 3. Because the phenomenon is dominated by practical considerations suggest the loss in fidelity is more
differential mode conduction, common mode components are than exceeded by the benefits of active closed loop current
neglected. Details for the component models and parameters sensing.
may be found in [6,7]. The simulation accurately predicts the
shape, magnitude, and damping of the system, Incorporating A. Current Sensor Topologies
the transport delay and high frequency damping present in the
At least four topologies exist for current measurement,
actual system provides realistic predictions of the system
resistive shunts, current transformers, Hall Effect devices, and
behavior. Notice the delay of 1 ps and current of 16 Apk at Magnetoresistive (MR) sensors [14]. Shunt resistors use a
the switching instant are very close to the measure values of 1
precision resistor and employ Ohm’s Law; the known
ps and 18 Apk. Also the shape of the response, reflecting the resistance provides a voltage output corresponding to a
charging effects of the cable, are accurately represented. passing current. They provide low cost ac and dc sensing, but
111. CURRENT SENSING IN THE PRESENSE OF HIGHFREQUENCYwithout high voltage isolation. Current transformers provide a
COMPONENTS direct voltage output via a built-in scaling resistor at a low
cost with high voltage isolation. The main drawback’s are
Low rise time IGBTs and the associated high frequency diminished low frequency performance (no dc capability) and
currents present a dilemma to the designer: Low rise time the necessity of a high quality amplifier. Hall Effect sensors
decreases switching losses, allows for increased camers, provide voltage isolation, dc to 50 kHz for open loop and dc
improves form factor, and reduces drive size. The high to 200 kHz for closed loop devices [15], but have cost, size,
frequency currents, however, can negate dead time linearity, and thermal performance tradeoffs. MR sensors
compensation and make current sampling problematical, implement a magnetoresistor that changes resistance with a
An appreciation of the effect high frequency currents have change in magnetic field. Since a magnetoresistor is much
on sampling is possible by comparing the data presented in more sensitive than a Hall device, the need for a flux
Fig. 6 with the results shown in Fig. 2. Fig. 6 corresponds to a concentrating core and secondary compensation coil is
2 kHz carrier and 300 ft of #12 AWG cable. Notice the eliminated [ 161. The MR device provides voltage isolation
triangular shaped current ripple, distinctive of the ideal and has a frequency range from dc to 50kHz [ 171.
conditions for sampling. Contrast this with the results of Fig.

-_ e - 1

Fig. 5. Simulation results of voltage anomaly


Fig 6 . Effect of high frequency sampling (50 ps/dtv).

792
added in parallel with the burden resistor to filter high
frequency components in the feedback signal. The third trace
is the flux linkages within the magnetic core of the current
sensor. Finally, the fourth signal is the push-pull amplifier
output. In this simulation the current sensor power supplies
were +I- 15 Vdc.
Models for current sensors, like the one above, when
interfaced with system models for the inverter, cable, and load
provide a valuable tool for investigating feedback signal
corruption. Among these are unsymmetrical power supplies,
noisy power supplies, magnetic nonlinearities, and cable
length. Another use is to establish the ideal bandwidth to
achieve the specified performance. Notice the response of the
Fig. 7. Closed-loop Hall Effect current sensor. current sensor to each transient of the phase current due to
current reflections from the load following the initial line
B. Closed-Loop Operation charging. The flux in the sensor's core becomes nonzero and
of a magnitude sufficient to saturate the push-pull amplifier
Fig. 7 illustrates the general operation principle of a closed-
output. Although the transient damps out, a more complex
loop current transducer. Primary current (Z,) flowing through
excitation, one such as a double pulse condition [6], presents
the conductor produces a magnetic field. The flux produced is
a condition where the sensor's flux is not nulled. Under these
concentrated in the core and is proportional to Zp. A Hall
conditions the feedback current signal may be come distorted
device in the air gap produces a voltage proportional to the and drift. Current feedback fidelity now requires a systems
flux density in the core. The Hall voltage is amplified by the design approach - one that incorporates the effects of rise
op amp and fed into a push-pull amplifier. The push-pull
time, board layout, ground integrity, and cable lengths.
amplifier drives the secondary winding on the core, which is
wound in series opposition to null the flux in the core [ 161. C. TransducerFidelity:
Operating the core near zero flux eliminates the dependence
on the linearity of the core and Hall device and also reduces ASDs require accurate high bandwidth current sensing to
hysteresis errors [171. protect the inverter structure and to ensure proper operation
The secondary current (I5)can be converted to a voltage by of the motor control algorithm. Sensor electronics may distort
placing a resistor from the output of the secondary coil to the signal level current, produce nuisance trips, or result in an
ground. By selecting the proper resistor value, the voltage can unprotected inverter.
be scaled for any application. Tests to determine the bandwidth of the current transducer
Fig. 8 shows simulation results for a Hall Effect current consisted of a comparison between the outputs of a current
sensor. The first trace corresponds to the actual phase current transformer and current transducer utilizing a high frequency
(Zp) for a switching transient consisting of a single line power amplifier. The results are shown in Fig. 9.
charging transition with a 310 ft #12 AWG cable. The bus The type and order of current transducer models depends
voltage was 650 Vdc and the findamental component was on the phenomena to be examined. For most control system
transitioning through zero. The second trace is the voltage work including the design of current regulators a simple gain
( V , ) across the parallel combination of the burden resistor in the feedback path is acceptable. However, the response to
(169 Q) and a filter capacitor (8200 pF). Often a capacitor is high frequencies and nonlinearities associated with typical

10
' "0 2 4 6 8 10
Time (microsec) 0
; : 0
zl-0.5
-
8 -10
0 2 4 6 8 10 5 -20

c?5z5z3
lime (microsec) cl
-30

-50 2 4 6 8 10 -40

Time (microsec) -50 t I I 1

001 0 10 I.00 1000

..- 2 4 6 8 10
( MHz 1

Time (microsec)
Fig. 9. Current tranducer bandwidth.
Fig. 8. Simulation of current sensing

793
r Drive
Fig. 11 shows the transducer fidelity at 35 Hz, 4 kHz
carrier, 310 fi of #12 AWG cable, and a 10 hp load. Trace 1
is the actual motor phase current as measured with a current
probe having a verified bandwidth of 15 MHz. The oscillation
frequency is 316 kHz. Trace 2 shows the output of the
inverter feedback transducer on the control board of the drive.
Note the higher 5 MHz component and an approximate 632
kHz component. Trace 4 shows an externally mounted
transducer with a shield. The shield ground was connected to
the isolated power supply ground. The magnitude of the 5
F MHz component is less than that of Trace 2 and 3 16 lcHz and
632 kHz almost eliminated. Trace 3 shows an externally
Fig. 10. Transducer comparison test setup.
mounted magnetoresistive feedback transducer. The
magnitude of the 5 MHz component is comparable to that of
transducers requires a more complex model. A more detailed Trace 2 and a cable oscillation component at 316 kHz is
model might include the linearized transfer function given by present but attenuated relative to Trace 2.
Current and voltage feedback signal fidelity can be affected
% -- S a l + a() (1) by many different sources. Signal distortion results in
I, s 2 b 2 + sb, + b o inaccurate measurements. Fast rise time and long cable
lengths create lightly damped high frequency ringing in the
The parameters for the coefficients in (1) may be found in feedback signals. Power supply and power supply ground
[l8]. This transfer function is plotted in Fig. 9 with the corruption increase the magnitude of distortion in the signal.
parameters corresponding to the actual current transducer. Potential sources of disturbance are shown in Fig. 12.
The linear model is in good agreement from 0 to 500 kHz. An example of signal distortion is shown in Fig. 13. Fig. 13
However, the high frequency amplification observed with the displays the uqhase motor current feedback, shown in high
high bandwidth power amplifier data suggests the simple gain resolution mode, before the ADC sampling of the DSP. The
and linear models are inadequate for predicting the behavior second trace is the reproduced current from the DSP and
of the current transducer when high frequency currents are measured at a test DAC. The distortion in the reproduced
present due to cables and motor parasitics. current is due to the sampling of distorted feedback current
Tests to determine the accuracy of the current feedback signals and ineffective filtering. Component and ground
transducer consisted of a comparison between the feedback layout, as well as ground bounce, are major contributors to
transducers used in the inverter and several feedback ineffective filtering. The high frequency ringing in the current
transducers mounted externally from the inverter as shown in (2 to 6 MHz), is beyond the bandwidth capabilities of the
Fig. 10. The inverter motor phase current fed the internal and current sensors and filters on the control board. An internally
external transducers and an isolated power supply was used to generated signal did not show any distortion eliminating the
drive the external devices. By removing the transducer from possibility of a DAC error. The consequence of this
the drive, inverter logic power supply, IGBT common mode corruption is compromised drive performance.
current and ground corruption are eliminated; thus, the
accuracy of the current feedback transducer may be
determined.

A 3165kHZ
0 1163MH2
1 0 u*anad
1 0 ~ d v

2 0 ChbdBCcnd
1 Vlhv

ImflecWe Filters

i fdbk I I

Fig. 12. Block diagram showing current feedback in primary loops.


Fig. 11. Current feedback transducer fidelity (1 pldiv).

794
TeK 8 t O D 25 ilkS/s

t I I
--
I
5 Acas

I - i l " ' l I 'I j


the switching transient current results in a rapid current
polarity reversal. The rapid current reversal pushes the lower
device's diode into conduction. The lower device maintains
conduction until the upper device is able to transfers
conduction to the upper IGBT
Current: The current rating is the maximum current
allowed within the Safe Operating Area (SOA) before being
limited by switching and short circuit capability. The IGBT
zero clamped current line charged condition of Fig. 4
demonstrates another abnormal condition. Here the upper
device transitions on, but a voltage disturbance tries to force
off the device again. In this case. the voltage disturbance was
'
short enough in duration to not hlly turn-on the lower IGBT,
1'1uU"''
Ch3 1OOmJ
0 8 50 59 but it was long enough to disrupt the current. This high
Fig. 13. Actual vs. reproduced current feedback signals (2 msldiv).
frequency zero current clamping is complex and governed by
the positions of the PWM pulses, cable length, rise time,
parasitics, and load impedance. Further research needs to be
IV. IGBT CHARACTERIZATION AND PERFORMANCE
completed to establish the effect these disturbances have on
The IGBT is a device that utilizes the high switching speed the SOA of IGBT.
of the MOSFET and the high power capability with lower IGBT Latch-up: The path taken by holes from collector to
conduction losses of the BJT. In actuality, the IGBT is more emitter may create a lateral voltage. This lateral voltage can
complicated [19-241. The IGBT model shown in Fig. 14 form a parasitic npn transistor, shown in Fig. 14, across the
includes the internal architecture [25]. gate injection channel and gate latch-up will occur, resulting
in thermal destruction. To avoid latch-up, stay below the
A . RefIected Waves and Power Device Characteristics. manufacturers specified IC limit or slow down the switching
speed [25]. It is unknown how any modulation across the VcE
The IGBT, although a durable power device, has some influence latch-up.
internal and external limitations. The internal limitations are Parasitic Thyristor: While the IGBT is conducting, high
due to silicon die characteristics, while the external current levels can cause a parasitic pnpn thyristor (shown in
limitations are due to handling and applications issues. Fig. 14) within the silicon to turn-on and lose gate control
Voltage: The voltage rating consists of the reverse [26]. Destruction occurs at approximately 2000 kW/cm2
blocking voltage (a function of the internal p-n architecture), power levels [27].
the forward blocking voltage, and the dielectric strength from Miller Parasitic Capacitance: IGBT's are typically
the substrate to ground. Under normal conditions, either VCE controlled with a forward (15 Vdc) and reverse (-5 Vdc) bias
is high with low leakage current or the conducting current is gate voltage. The reverse bias guards against the reverse
high with low VCE voltage. The transitions between these transfer capacitance or Miller capacitance from coupling part
normal modes trace within the outer perimeter of the SOA. of the collector voltage to the gate and allowing the VGEto
The IGBT voltage disturbance of Fig. 3 demonstrates an rise a few volts. If not controlled, the VGEcan exceed the
abnormal condition. Here the current transitions through zero. threshold and force the IGBT into conduction [28]. The
The combination of the arriving reflected wave current and coupling of reflected wave currents and their associated
modulation of VCE through the Miller capacitance to VGEis
not know at this time, but is clearly an area for investigation.
I Gate Source
Gate Inversion Channel: As IC increases and because the
channel voltage is a function of channel length, the oxide
voltage is not uniform and the inversion layer distorts and
becomes trapezoidal. The electric field increases in the region
near the MOSFET's drain to counteract the decrease in the
oxide voltage, thus maintaining current conduction but at a
RR.lUC ; limited value [25].
Gate Oxide: The intrinsic dielectric breakdown field of
I
Only on PT gate oxide depends on the thickness of the oxide layer.
('BJT devices N+
I 1 Surface defects in the oxide, Electrostatic Discharge and
p+ I other surges can degrade or puncture the oxide layer [29,30].
Thermal: Heat transfer within the chip spreads laterally and
Drain vertically. The ratio of lateral to vertical elements determines
Fig. 14. IGBT cell model. the heat transmitted in each dimension. Within the inner die

795
segments, thermal dissipation is higher than in the outer cable. The measuredf, of 2.85 MHz appears across VCE in the
segments where unimpeded lateral flow is possible, resulting upper and lower devices and in the phase current. The
in hotspots [28]. Thermal breakdown is initiated when the p-n frequency content in the voltage across each power device
junction fails at temperatures greater than 384 OC or 650 "K and in the motor current indicates the ASD is acting as a
P61. smk, with the IGBT absorbing harmonic losses. These
Switching Losses; The transition of the current and voltage fmdings indicate the inverter is no longer an ideal short circuit
components during the switching time determines the heat with a reflection coefficient (I?) presumed to be -1 [1,6,8,11],
produced within the IGBT [28] but is slightly less than the presumed value. While
Current Sharing: Geometric design of the internal gating conducting, the upper IGBT of Fig. 15 was measured and the
in an IGBT die dictate the spread of charge over the silicon modulation across VCE was determined. Fig. 16 demonstrates
surface. Therefore, uniform current is necessary during turn- that VCE oscillates with a magnitude and frequency primarily
on and turn-off transitions [31]. The maximum IGBT current determined by cable length and load characteristics. These
density - VGE of 15 Vdc - reaches over 1000 Ncm2 [20,32] results indicate the VCESAToperating point fluctuates and
with typical continuous current ratings of 100 Ncm2 [20]. causes increased conduction losses.
Further research needs to be completed to show how the Increased VCE modulation shifts the VCE,AT point into the
current density is affected by the high frequency modulation active region increasing thermal losses. VcE reversals should
across the IGBT. cause the IGBT to enter the reverse blocking mode and cease
conducting. This is not evident in the current waveforms.
B. Experimental Data With V,, present, the gate inversion channel holds the IGBT
in conduction and doesn't allow the IGBT to instantaneously
Tests were conducted on a 575 Vac, 24 Arms, 20 hp turn-off. Since the modulation is across the IGBT during
inverter with an unloaded 460 Vac, 20 hp machine. Cable conduction, the original SOA graphs appear invalid and new
lengths were varied from 25 to 600 ft. Fig. 15 shows regions of operation must be developed. These are part of the
measured results from the inverter with 25 ft of #12 AWG dynamic responses of the IGBT, which require further
investigation.

v. PREFERRED RISE TIME


Low rise time IGBT technology provides reduced
switching losses, improved waveform quality, and reduced
package size. Tests of commercially available ASDs show a
range in rise/fall times from 50 to 1000 ns. These
improvements are not without adverse consequences,
including reflected wave motor over-voltages and high
frequency current losses and signal distortion.
-im1 I I I I I Lowering the rise time reduces the cable length at which
0.5 1 1.5 2 25 3
motor over-voltages occur. As shown above, the associated
Time (US) reflected wave currents also impact device behavior. For
~
example, at rise time of 50 ns and a single pulsed condition,
Top - Measured VCEvoltage across upper and lower device. the peak motor voltage is twice the dc bus voltage at 25 ft. As

10
l l ! l
8
20
Y
6
2
L 15
4
3 2
0
L 0
0 '0
c
0 -2

= 5 -4

-6

01
I II I
I
I -a
05 1 15 2 25 3 I / I 1

Time (US) 175 2 225 25 275 3 325 35 375 4

Time (US)
Bottom - Measured motor phase current
Fig. 15. Experimental results demonstrating oscillation frequency. Fig. 16. Numerically determined VCE modulation.

796
the cable length increases the reduction in damping and From this analysis, the recommended rise time to reduce the
characteristic frequency produces an associated reflected effects of reflected wave over-voltages for IGBT inverters is
wave current that modulates Vc- of the IGBT. This 300 11s or greater.
modulation can be substantial and its effect on device Based on simulations and test results to date, establishing
behavior and life is unknown. The high frequency currents the rise and fall times in the range of 200 - 300 ns will
also presents problems for drive protection and control. accomplish the following:
To examine the effects of increasing the rise time, 1. Reduce motor over voltage without affecting the
simulations using the models described above and in rof [8] control or requiring passive fixes to distances of 600 ft
were conducted. These models allowed for the independent for a majority of single motor applications.
variation of rise and fall time, wave shaping the switching 2. Improve current feedback fidelity and minimize the
transient, cable length, and load. The simulation techniques excitation of high frequency components that can
discussed above and in [SI provides the design engineer with create ground bounce and prevent effective filtering.
the capability of examining many parameters without
prototyping each variation. Thus the most promising changes VI. CONCLUSION
may be determined before prototypes are built and tested.
An example of this is shown in test results displayed in Fig It is well known that common and differential mode
17. Simulations showed by extending the rise time form 50 ns current, cable length and characteristics, and IGBT risetime
to 400 - 500 ns, the peak motor over voltage can be contribute to performance degradation, motor failures, and
significantly reduced to cable lengths of 600 ft without disturbances within inverters. Two new conditions, voltage
concern for modifications to the control. Fig. 17 compares the distortion and high frequency polarity reversals, were
per unit over-voltage with increasing cable length for power demonstrated. Their relationship to reflected wave currents
devices with 50 ns rise time and 400 ns rise time. The test was established and their impact on control, specifically
drive consisted of a 10 hp inverter with a 10 hp motor as the center pulse sampling and dead time compensation,
load. The drive was operated at 60 Hz, 4 kHz carrier, with a examined. Simulation and experimental data supported the
650 Vdc bus, at no load. The cable from drive to motor was findings.
#12 AWG. The peak over-voltage was measured at the motor. The measurement of current is mandatory for optimum
This measurement includes the single line condition, double performance. High frequency components and bandwidth
pulsing condition, polarity reversal condition, and the PWM limitations degrade current sensing and introduce errors iilto
modulator as sources of over-voltages. the controller. The transfer h c t i o n for a Hall Effect device
The 50 ns rise time curve has 2 pu voltage at 25 ft of cable was provided and compared to experimental results. Design
and increases to 2.7 pu voltage at 600 ft of cable. The 400 ns variations and differing technologies were experimentidly
rise time curve has 1.6 pu voltage at 25 ft of cable, rises with evaluated.
increasing cable length, to approximately 2.2 pu voltage and The IGBT was examined for operating characteristics and
remains relatively flat to 600 ft of cable. Slower rise times performance. The major modes - internal device parasitics
will decrease the per unit over-voltage over increasing cable and application issues - were discussed along with device
lengths. The resulting tradeoffs between switching losses, switching characteristics, current and thermal distribution.
carrier frequency, and package size must then be considered. Experimental data was provided to support evidence of
harmonic modulation absorbed by the IGBT. Additional
work, specifically on the dynamic response and effects of
50 ns rise time vs 400 ns rise time voltage and current modulation across IGBT’s, needs to be
completed.
Finally, a recommended risetime from 200-300 ns was
established based on simulation and experimental data.

ACKNOWLEDGMENT

The authors would like to thank Mick O’Neill, Chris Thomas,


Dennis Braun, Dennis Kehl, Bruce Beihoff, and John
Willkomm of Rockwell Automation, Tom Twitchell and Ed
Filo of LEM, and Hsueh-Rong Chang of Rockwell Science
1.75 - ,.’
/
Center for their support and assistance in this research.

Fig. 17. Per unit over-voltage for 50 ns and 400 ns power device rise
times.

797
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