1 Unit 2 Assembly Language and Addressing Modes

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2.

1 Assembler and addressing modes


Assembling and running an 8051 program –Structure of Assembly Language –Assembler directives –
Different addressing modes of 8051.

1) What is a Machine Language?


• Programming language that can be directly understood and obeyed by a machine (computer)
without conversion (translation).
• It is different for each type of Microcontroller / Microprocessor and it is the binary language
(comprised of only two characters: 0 and 1) of the computer and is difficult to be read and
understood by humans.

2) What is a compiler

A compiler is a special program that processes statements written in a particular


programming language and translates them into machine language or "code" that a
Compuer’s CPU could understand.

3) What is assembly language?


An assembly language is a low-level programming language for microprocessors , microcontrollers
and other programmable devices. An assembly language implements a symbolic representation
of the machine code needed to program a given Microprocessor/Microcontroller architecture.

An assembly language program is a series of statements which are instructions such as ADD , MOV
to tell CPU what to do and Directives (pseudo instructions) which give diections to the assembler.

ORG 00H
MOV R5 , #25H
MOV R7 , #27H
MOV A , #00H
MOV A , R5
HLT: SJMP HLT
END

4) What is Assembler

Assembler is software (Computer Program) used for translating programs written in assembly
language(Source Program) into machine language (Object Program)

5) Give the structure of Assembly language.


An assembly language instruction consists of four fields.

[Label:] Mnemonics [Operand] [; Comment]

6) What are assembler directives? Give Examples.

They are used by the assembler to decode the Assembly Language Program (source program).

Assembler directives are commands or pseudo instructions which help or guide the assembler to
decode the source program and convert it into machine level program (Object Program).

Ex:

ORG – indicate Start of the program

END – indicate End of the program

EQU – Equate

DB – Define a byte

DW- Define a word

Different addressing modes of 8051:

1. Register addressing or Register Direct Addressing

2. Direct addressing.

3. Register indirect addressing.

4. Immediate addressing.

5. Bit Manipulation addressing

6. Implied Addressing

7. Relative Addressing

8. Branch or Programme Manipulation Addressing

9. Indexed addressing.

Register addressing or Register Direct Addressing:

Here the address of data required by the instruction are the registers referred in the
instruction.
Example- MOV A, B

(A) ← (B)

By executing this instruction the contents of B register is moved and placed in the A register.

Direct addressing:

Here the address of data required by the instruction are available in the instruction

Example- MOV A, 52H


(A) ← (52H)
If before execution the memory contains

Memory Contents
Address
51H 22H
52H 45H
53H 34H
54H 76H
After executing this instruction the contents of memory location 52H is placed in the
accumulator A. That is

(A) ← 45H

Register Indirect addressing:

Here the address of address of the data required by the instruction is available in the
instruction. This instruction is identified by the symbol ‘@’ in the instruction
Example- MOV A, @R0

(A) ← ((R0))
If before execution

(R0) = 45H & contents of memory location (45H) = 32H

After the execution of the above instruction

(A) = 32H

Hence, by executing this instruction the contents of memory location 45H given by register R 0 is
moved to the of the accumulator.

Immediate addressing:
The data required by the instruction is available in the instruction itself.
This instruction is identified by the symbol ‘#’ in the instruction
Example-

ADD A, #52H
(A) ← (A) + 52H

By executing this instruction the data 52H is added with the contents of A and it is placed in
the accumulator.

Bit Manipulation Addressing:

The bit addressable registers and locations of Internal RAM use this addressing
Here the individual bits can be manipulated.
Example:
The instruction “SETB 52H” will set the bit at location 52 of internal RAM to 1
The instruction “CLR 52H” will set the bit at location 52 of internal RAM to 0

Implied Addressing:
In implied addressing mode, the instruction itself specifies the data to be operated by the
instruction.
CPL C :- Complement carry flag.

Relative Addressing:
Here the address of the next instruction to be executed is calculated after the execution of the
instruction as follows. If relative address is forward , byte 2 of the instruction will be a positive
number. If backward , byte 2 of the instruction will be a two’s complemented number

(PC) ← (PC + (Byte 2 of the instruction)

If relative addressing is used the Program becomes relocatable.


Example:
Address Label Opcode Mnemonic
8000 --- ----- ---------
----- ------ ------ ----------
----- ------ ------ ----------
8009 HLT 80 FE SJMP HLT
800B ------ ------ ---------

While executing the instruction at address 8009 , the contents of PC will be 800B , and after
execution

(PC) ← (PC) + (Byte 2)

800B + FE = 8009
The contents of PC will become 8009 , every time it executes the instruction

Hence the instruction SJMP HLT will be executed again and again until reset

Branch or Programme Manipulation Addressing:

The last group of instructions in the 8051 Microcontroller Instruction Set are the Program
Branching Instructions. These instructions control the flow of program logic

Example mnemonics of the Program Branching Instructions are as follows.

• LJMP
• AJMP
• SJMP
• JZ
• JNZ

Indexed addressing:

With Indexed Addressing Mode, the effective address of the Operand is the sum of a base
register and an offset register. The Base Register can be either Data Pointer (DPTR) or Program
Counter (PC) while the Offset register is the Accumulator (A).

In Indexed Addressing Mode, only MOVC and JMP instructions can be used. Indexed Addressing
Mode is useful when retrieving data from look-up tables.

Example: MOVC A, @A+DPTR

Here, the address for the operand is the sum of contents of DPTR and Accumulator.

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