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Module2b BEE

The document discusses different types of field effect transistors (FETs). It describes junction FETs (JFETs), which are unipolar devices made of either n-type or p-type semiconductor material to form an n-channel or p-channel. The basic construction and operation of n-channel and p-channel JFETs are explained through their I-V characteristics and transfer curves. A square law expression is also provided to describe the relationship between drain current and gate-source voltage in JFETs. Finally, metal-oxide-semiconductor FETs (MOSFETs) are introduced as another type of FET.

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0% found this document useful (0 votes)
21 views15 pages

Module2b BEE

The document discusses different types of field effect transistors (FETs). It describes junction FETs (JFETs), which are unipolar devices made of either n-type or p-type semiconductor material to form an n-channel or p-channel. The basic construction and operation of n-channel and p-channel JFETs are explained through their I-V characteristics and transfer curves. A square law expression is also provided to describe the relationship between drain current and gate-source voltage in JFETs. Finally, metal-oxide-semiconductor FETs (MOSFETs) are introduced as another type of FET.

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md hasan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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MODULE-2 FET

Definition: FET is a three terminal electronic device used for variety of applications that
match with BJT. In FET, an electric field is established by the charges present, which
controls the conduction path of the output circuit without the need for direct contact between
controlling and controlled quantities. In a Field effect device current is controlled by the
action of an electron field, rather than carrier injection.

TYPES OF FETS:
1. Junction Field Effect Transistors(JFETs)
2. Metal Oxide Semiconductor Field Effect Transistors (MOSFETs).

2.1 JUNCTION FIELD EFFECT TRANSISTORS(JFETS):


JFET is a unipolar device as conduction in the device is dependent on either electrons or holes.
Accordingly there are two types of JFET; namely: n-Channel JFET and p-Channel JFET.

2.2 CONSTRUCTION AND CHARACTERISTICS OF N-CHANNEL JFET:


 The basic construction of the n-channel JFET is as shown in fig 2.1. The major part of
the structure is the n-type material which forms the channel between embedded layers
of p-type material.
 The top of the n-type channel is connected through an ohmic contact to a terminal
referred to as the drain(D), whereas the lower end of the material is connected through
an ohmic contactreferred to as source(S).
 The 2 p-type materials are connected together to the gate (G) terminal.
 In the absence of any applied potentials, JFET has 2 p-n junctions under no bias
condition. As a result, depletion region is formed at each junction

Fig 2.1 Construction of n-channel JFET

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 1


MODULE-2 FET

2.2.1 OPERATION: Fig 2.2 shows the working of n-channel JFET for different gate-source
voltage (VGS) and drain to source voltage (VDS) = 0V.

Fig 2.2: Operation of n-channel JFET

Case i: VGS = 0 and VDS = 0


Under zero bias condition depletion region around the p-n junction is thin and thus exhibits
low channel resistance.
Case ii: VGS = 0 and VDS = + small voltage.
 The gate and source are at the same potential and the instant the voltage VDS is
applied the electrons in the n-channel are drawn towards the drain terminal
establishing drain current (ID).
 Due to reverse biasing of the p-n junction for the length of the channel results in gate
current = 0.

Fig 2.3: Drain characteristics of n-channel JFET for VGS = 0V.

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 2


MODULE-2 FET

 As VDS is increased further, the drain current increases. When VDS = VP, the depletion
region widens causing reduction in the channel width.
 The reduced path of conduction causes the resistance to increase and the current
saturates.
 When VDS is further increased, the two deletion regions touch resulting in pinch-off
condition.
 The drain characteristics plot of ID vs VDS for VGS = constant is as shown in fig 2.3.

Case iii: VGS = -ve voltage and VDS = + small voltage.


 The effect of applied reverse bias on gate and source widens the depletion regions
around the p-n junctions but at the lower levels of VDS.
 The resulting saturation level for ID is reduced and will continue to decrease as VGS is
made more and more negative.
 The drain characteristics are as shown in fig 2.4 for different values of VGS. When
VGS = -VP, pinch-off condition occurs resulting in ID = 0. VP is called pinch off
voltage.

Fig 2.4: Drain characteristics of JFET for different VGS values.

 The region to the left of pinch off locus is called ohmic region and the region to the
right of pinch-off locus is saturation region.
 This region of JFET is employed for linear amplifiers. In ohmic region JFET can be
employed as a variable resistor.
 The resistance is controlled by VGS. As VGS becomes more and more negative, the
slope of the characteristics becomes more and more horizontal indicating increasing
Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 3
MODULE-2 FET
resistance level.
 The resistance is given by the equation 1.

2.2.2 TRANSFER CHARACTERISTICS OF N-CHANNEL JFET: Transfer


characteristics are a plot of ID as a function of VGS with VDS as constant. Shockley Equation
as in equation 1 is used to plot transfer characteristics.

 ID depends on VGS in a non-linear manner. As a result, FET’s are often referred to


square law devices.
 Using the drain characteristics on the right of Y-axis, a horizontal line can be drawn
from the saturation region of the curve denoted as VGS = 0V to the ID axis.
 The resulting current level for both the graphs is IDSS. When VGS =VP, the drain
current is 0mA, defining another point on transfer curve.
 Transfer curve is a direct transfer from input to output variables. Transfer
characteristics are a parabolic curve as shown in fig 2.5.

Fig 2.5: Transfer characteristics of n-channel JFET

2.3 CONSTRUCTION AND CHARACTERISTICS OF P-CHANNEL JFET:


 The basic construction of the p-channel JFET is as shown in fig 2.6.
 The major part of the structure is the p-type material which forms the channel
between embedded layers of p type material.
 The top of the p-type channel is connected through an ohmic contact to a terminal
referred to as the drain(D), whereas the lower end of the material is connected through

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 4


MODULE-2 FET
an ohmic contact referred to as source(S). The 2 n-type materials are connected
together to the gate (G) terminal.
 In the absence of any applied potentials, JFET has 2 pn junctions under no bias
condition.
 As a result, depletion region is formed at each junction.

Fig 2.6: Construction of P- channel JFET

2.3.1 OPERATION OF P-CHANNEL JFET:


Case i: VGS = 0 and VDS = 0
Under zero bias condition depletion region around the p-n junction is thin and thus exhibits
low channel resistance.
Case ii: VGS = 0 and VDS = -ve small voltage.
 The gate and source are at the same potential and the instant the voltage VDS is
applied the holes in the p-channel are drawn towards the drain terminal establishing
drain current (ID).
 Due to reverse biasing of the p-n junction for the length of the channel results in gate
current = 0.
 As VDS is increased further, the drain current increases. When VDS = -VP, the
depletion region widens causing reduction in the channel width. The reduced path of
conduction causes the resistance to increase and the current saturates. When VDS is
further increased, the two deletion regions touch resulting in pinch-off condition. The
drain characteristics (plot of ID vs VDS for VGS = constant is as shown in fig 2.7).
Case iii: VGS = +ve voltage and VDS = -ve small voltage.
 The effect of applied reverse bias on gate and source widens the depletion regions
around the p-n junctions but at the lower levels of VDS.
Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 5
MODULE-2 FET

 The resulting saturation level for ID is reduced and will continue to decrease as VGS
is made more and more positive.
 The drain characteristics are as shown in fig 8 for different values of VGS. When
VGS = -VP, pinch-off condition occurs resulting in ID = 0. VP is called pinch off
voltage.

Fig 2.7: Drain Characteristics of p-channel JFET

Fig 2.8: Transfer characteristics of n-channel JFET

Symbols of JFET: Fig 2.9(a) and 2.9 (b) shows the symbols of n-channel and p- channel
FET respectively.

Fig 2.9: JFET Symbols. (a) n-Channel JFET (b) p-channel JFET

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 6


MODULE-2 FET
2.4 SQUARE LAW EXPRESSION FOR ID
Transfer characteristics can also be obtained by applying following conditions to schokley’s
equation

Condition1: VGS = 0
Therefore ID = IDSS.
Condition 2:VGS = VP
Therefore from equation 1, ID = 0mA.
Condition 3: VGS = VP/2
Therefore from equation 1
ID = IDSS/4

2.5 INPUT RESISTANCE


 A JFET operates with its gate-source junction reverse-biased, which makes the input
resistance at the gate very high.
 The input resistance can then be determined using the following equation, where the
vertical lines indicate an absolute value (no sign):

2.6 Metal Oxide Semiconductor Field Effect Transistors (MOSFETs):


 MOSFET is a type of Field Effect Transistor in which majority charge carriers flow in
the channel. The width of the channel is controlled by an electrode called gate.
 Channel width determines how well the device conducts. MOSFETS are useful in
high-speed switching circuits and in Integrated Circuits.
 There are two types of MOSFET’s:
(i) Depletion type MOSFET
(ii) Enhancement type MOSFET

2.7 DEPLETION TYPE MOSFET: Depletion-type MOSFETs are further classified as


(i) N-channel D-type MOSFET
(ii) P-Channel D-type MOSFET

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 7


MODULE-2 FET
2.7.1 N-CHANNEL DEPLETION TYPE MOSFET:
 The basic construction of the n- channel depletion type MOSFET is as shown in fig
2.10.
 A slab of p-type material is formed from a Si base and is referred to as the substrate.
 The source and drain terminals are connected through metallic contacts to n-doped
regions linked by a n-channel.
 The gate is also connected to a metal contact surface but remains insulated from the n-
channel by a very thin SiO2 layer.
 The presence of SiO2 layer accounts for very high input impedance of the device. The
input impedance of MOSFET is higher than JFET.

Fig 2.10: Construction n-Channel Depletion type MOSFET.


 A small n layer is implanted in the region below SiO2 to create n-channel.
 The insulating layer between gate and the channel has resulted in another name for the
device: Insulated- gate FET or IGFET.

OPERATION OF N-CHANNEL DEPLETION MODE MOSFET:


Case i: VGS = 0 and VDS = +ve voltage
 Since drain is positive with respect to source, the free electrons are attracted from
source to drain to constitute drain current ID.
 The drain characteristics and transfer characteristics of depletion mode MOSFET is as
shown in fig 2.11.

Case ii: VGS = -ve Voltage and VDS = +ve small voltage
 The negative potential at the gate will cause the electrons to move towards p-type
substrate as charges repel while holes from p-type substrate are attracted toward gate.
 Depending on the magnitude of negative bias established by VGS, a level of
recombination between electrons and holes will occur that will reduce the number of

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 8


MODULE-2 FET
free electrons in the n-channel available for conduction.
 The more negative the bias, higher is the rate of recombination.
 The resulting level of ID is reduced with the increasing levels of negative bias for
VGS as in fig 2.11.

Fig 2.11: (a) Transfer Characteristics (b) Drain Characteristics.

Case iii: VGS = +ve Voltage and VDS = +ve small voltage
 For positive values of VGS, the +ve gate will draw additional electrons from p-type
substrate as minority charge carriers are attracted towards gate.
 New carriers are generated due to collisions and ID will increase at a rapid rate.
 Thus, application of +VGS has enhanced the level of free carriers in the channel
compared to VGS = 0V.
 The region of +ve gate voltage on the drain or transfer characteristics is referred as
enhancement region.
 The region between the cut-off and the saturation level of IDSS is refereed as the
depletion region.
 Transfer characteristics are a plot of ID as a function of VGS with VDS as constant.
Shockley Equation as in equation 2 is used to plot transfer characteristics.

2.7.2 P-CHANNEL DEPLETION TYPE MOSFET:


 The basic construction of the p-channel depletion type MOSFET is as shown in fig
2.12a.
 A slab of n-type material is formed from a Si base and is referred to as the substrate.
 The source and drain terminals are connected through metallic contacts to p-doped
regions linked by a p-channel.

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 9


MODULE-2 FET

Fig 2.12: (a) Construction


 The gate is also connected to a metal contact surface but remains insulated from the p-
channel by a very thin SiO2 layer.
 The presence of SiO2 layer accounts for very high input impedance of the device. The
input impedance of MOSFET is higher than JFET.

OPERATION OF P-CHANNEL DEPLETION MODE MOSFET:


Case i: VGS = 0 and VDS = -ve voltage
Since drain isnegative with respect to source, the holes are attracted from source to drain to
constitute drain current ID. The drain characteristics and transfer characteristics of depletion
mode MOSFET is as shown in fig 2.12(c) and (b) respectively.

Fig 2.12: (b) Transfer Characteristics (c) Drain characteristics

Case ii: VGS = +ve Voltage and VDS = -ve small voltage
 The positive potential at the gate will cause the holes to move towards n-type
substrate as charges repel while electrons from n-type substrate are attracted toward
gate.
 Depending on the magnitude of positive bias established by VGS, a level of

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 10


MODULE-2 FET
recombination between electrons and holes will occur that will reduce the number of
holes in the p-channel available for conduction.
 The more positive the bias, higher is the rate of recombination. The resulting level of
ID is reduced with the increasing levels or positive bias for VGS as in fig 2.12(c).

Case iii: VGS = -ve Voltage and VDS = -ve small voltage
 For positive values of VGS, the -ve gate will draw additional holes from n-type
substrate as minority charge carriers are attracted towards gate.
 New carriers are generated due to collisions and ID will increase at a rapid rate.
 Thus, application of -VGS has enhanced the level of free carriers in the channel
compared to VGS = 0V.
 Transfer characteristics are a plot of ID as a function of VGS with VDS as constant.
Shockley Equation as in equation 2 is used to plot transfer characteristics

2.7.3 SYMBOLS OF DEPLETION TYPE MOSFET:


Fig 2.13 shows the symbols of n-channel and p-channel Depletion mode MOSFET.

Fig 13 (a) n-channel depletion type MOSFET (b) p-channel depletion type MOSFET

2.8 N-CHANNEL ENHANCEMENT-MODE MOSFET (E-MOSFET):


 The construction of n-channel enhancement mode MOSFET is as shown in fig 2.14.
 The starting material is a p-type substrate into which highly doped n-regions are
diffused to form source and drain regions.
 A layer of SiO2 is grown all over the p-type substrate and is etched to create window
for n-diffusion.
Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 11
MODULE-2 FET

 The source and drain terminals are taken out through metallic contacts to n- doped
regions as shown in fig 2.14.
 Metal is deposited on SiO2 to create Gate.
 The presence of SiO2 between gate and p-substrate provides electrical isolation
between the two regions.
 No channel exists between source and drain in E-MOSFET.

Fig 2.14: Construction of n-channel E-MOSFET

OPERATION OF N-CHANNEL E-MOSFET:


Case i: VGS = 0 and VDS = +ve voltage
The application of drain to source voltage while gate and source are shorted will cause no ID
to flow as no channel exists for this condition.
Case ii: VGS = +ve Voltage and VDS = +ve small voltage
 When gate is made positive with respect to source, electrons are attracted towards
the gatebut holes are repelled back into p-type substrate.
 Since the region under the gate is p-type substrate, the positive voltage on gate
causes holes which are majority charge carriers in p-type substrate to repel and
move towards substrate. A positive VGS and positive VDS causes the two p-n junctions
to be reverse biased and depletion region is formed. Now the device is said to be in
depletion mode.
 The positive VGS also causes electrons to be attracted towards the gate. Now, device is
said to be in accumulation mode.
 Since the region below the gate was p-substrate and accumulation of electrons has
caused the type to change to n-type. Thus the device is said to be in inversion mode as
shown in fig 2.15.
Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 12
MODULE-2 FET

 A positive VGS has caused a thin layer of negative charges to be formed in the
substrate under the gate. Thus, channel is said to be created.
 The value of VGS which causes channel to be formed under the gate is called threshold
voltage (VT).
 A small ID flows.
 When VGS is increased above VT, conductivity of the channel is enhanced and thus
pulling more electrons into the channel.

Fig 2.15: Formation of Inversion layer

 When VGS<VT there is no channel. Since channel is formed by the application of


+VGS, the type of MOSFET is Enhancement type.
 As VGS is increased further, higher level of ID flowsas shown in fig 2.16.
 A positive VGS cause potential drop across the channel.
 For large VDS this voltage may not be sufficient to invert the channel near the drain
end there by causing drain current to saturate.
 The channel is said to be pinched off. ID flows due to diffusion.

Fig 2.16: Transfer Characteristics Drain Characteristics

TRANSFER CHARACTERISTICS OF N-CHANNELE-MOSFET:


The transfer characteristics of n-channel E-MOSFET is as shown in fig 2.16. For VGS >VT,
the relationship between drain current and VGS is nonlinear and is given by eqn.

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 13


MODULE-2 FET
Where K is a constant and is a function of the construction of the device as given by

Thus ID increases steadily when VGS> VT and ID is zero when VGS< VT.

2.8.2 p-CHANNEL ENHANCEMENT-MODE MOSFET (E-MOSFET):


 The construction of p-channel E-MOSFET is opposite to that of n-channel E-
MOSFET. Substrate is of n-type and source, drain are of p-type as in fig 2.17(a).
 The voltage polarities and current directions are reversed in p-channel E-MOSFET.
 The transfer and drain characteristics of p-channel E-MOSFET are as shown in Fig
2.17 (b) and (c) respectively.

Fig 2.17: (a) Construction

OPERATION OF P-CHANNEL E-MOSFET:


Case i: VGS = 0 and VDS = -ve voltage
The application of drain to source voltage while gate and source are shorted will cause noID
to flow as no channel exists for this condition.
Case ii:VGS = -ve Voltage and VDS = -ve small voltage
 When gate is made negative with respect to source, holes are attracted towards the gate but
electrons are repelled back into n-type substrate.
 Since the region under the gate is n-type substrate, the negative voltage on gate causes
electrons which are majority charge carriers in n-type substrate to repel and move
towards substrate.
 A negative VGS and negative VDS causes the two pn junctions to be reverse biased
and depletion region is formed. Now the device is said to be in depletion mode.
 The negative VGS also causes holes to be attracted towards the gate.
 Now, device is said to be in accumulation mode. Since the region below the gate was
n-substrate and accumulation of holes has caused the type to change to p-type.
 Thus the device is said to be in inversion mode.

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 14


MODULE-2 FET

 A negative VGS has caused a thin layer of positive charges to be formed in the
substrate under the gate. Thus, channel is said to be created.
 The value of VGS which causes channel to be formed under the gate is called
threshold voltage (VT). A small ID flows.
 When VGS is decreased below VT, conductivity of the channel is enhanced and thus
pulling more electrons into the channel.
 When VGS>VT, there is no channel. Since channel is formed by the application of -
VGS, the type of MOSFET isEnhancement type.
 The drain characteristics are as shown in fig 2.17 (c).

Fig 2.17: (b) Transfer Characteristics (c) Drain Characteristics

TRANSFER CHARACTERISTICS OF P-CHANNEL E-MOSFET: The VGS is negative


and ID flows in opposite direction. The transfer characteristics of p-channel E-MOSFET is as
shown in fig 2.17(b). ID increases steadily with VGS.

2.8.3 E-MOSFET SYMBOLS: Fig 2.18 (a) and 2.18(b) shows the symbols of n-channel and
p-channel E-MOSFET

Fig 2.18: E-MOSFET Symbols

Lokeshwari H S, Asst. Prof., Dept. of ECE, RIT, Hassan 15

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