STM32 Timers Tutorial

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STM32 Timers Tutorial | Hardware Timers Explained

Basic Timers Modules


The basic timers consist of a 16-bit auto-reload counter driven by a programmable Prescaler. They may
be used as generic timers for time-base generation but they are also specifically used to drive the digital-
to-analog converter (DAC). In fact, the timers are internally connected to the DAC and are able to drive it
through their trigger outputs. The timers are completely independent and do not share any resources.

Basic timer features include:

 16-bit auto-reload up-counter


 16-bit programmable Prescaler used to divide (also “on the fly”) the counter clock frequency by
any factor between 1 and 65536
 Synchronization circuit to trigger the DAC
 Interrupt/DMA generation on the update event: counter overflow

The main block of the programmable timer is a 16-bit up-counter with its related auto-reload register.
The counter clock can be divided by a Prescaler. The counter, the auto-reload register, and the Prescaler
register can be written or read by software. This is true even when the counter is running. The time-base
unit includes:

 Counter Register (TIMx_CNT)


 Prescaler Register (TIMx_PSC)
 Auto-Reload Register (TIMx_ARR)

The auto-reload register is preloaded. The preload register is accessed each time an attempt is made to
write or read the auto-reload register. The contents of the preload register are transferred into the
shadow register permanently or at each update event UEV, depending on the auto-reload preload
enable bit (ARPE).

In counter mode, the counter counts from 0 to the auto-reload value (contents of the TIMx_ARR
register), then restarts from 0 and generates a counter overflow event. An update event can be
generated at each counter overflow or by setting the UG bit in the TIMx_EGR register (by software or by
using the slave mode controller).

Low-Power Timers Modules


The LPTIM is a 16-bit timer that benefits from the ultimate developments in power consumption
reduction. Thanks to its diversity of clock sources, the LPTIM is able to keep running in all power modes
except for Standby mode. Given its capability to run even with no internal clock source, the LPTIM can
be used as a “Pulse Counter” which can be useful in some applications.

Also, the LPTIM capability to wake up the system from low-power modes makes it suitable to realize
“Timeout functions” with extremely low power consumption. The LPTIM introduces a flexible clock
scheme that provides the needed functionalities and performance while minimizing power
consumption.
The Low-Power Timers (LPTIM) Main Features:

 16-bit up-counter
 3-bit Prescaler with 8 possible dividing factors (1,2,4,8,16,32,64,128)
 Selectable clock
– Internal clock sources: LSE, LSI, HSI16 or APB clock
– External clock source over LPTIM input (working with no LP oscillator running, used by
Pulse Counter application)
 16 bit ARR auto-reload register
 16 bit compare register
 Continuous/One-shot mode
 Selectable software/hardware input trigger
 Programmable Digital Glitch filter
 Configurable output: Pulse, PWM
 Configurable I/O polarity
 Encoder mode
 Repetition counter

General-Purpose Timers Modules


The general-purpose timers consist of a 16-bit auto-reload counter driven by a programmable Prescaler.
They may be used for a variety of purposes, including measuring the pulse lengths of input signals (input
capture) or generating output waveforms (output compare and PWM). Pulse lengths and waveform
periods can be modulated from a few microseconds to several milliseconds using the timer Prescaler
and the RCC clock controller Prescalers. The timers are completely independent and do not share any
resources. They can be synchronized together as well.

General-purpose TIMx timer features include:

 16-bit up, down, up/down auto-reload counter.


 16-bit programmable Prescaler used to divide (also “on the fly”) the counter clock frequency by
any factor between 1 and 65536.
 Up to 4 independent channels for:
– Input capture
– Output compare
– PWM generation (Edge- and Center-aligned modes)
– One-pulse mode output
 Synchronization circuit to control the timer with external signals and to interconnect several
timers.
 Interrupt/DMA generation on the following events:
– Update: counter overflow/underflow, counter initialization (by software or
internal/external trigger)
– Trigger event (counter start, stop, initialization or count by internal/external trigger)
– Input capture
– Output compare
 Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning purposes
 Trigger input for an external clock or cycle-by-cycle current management

Advanced-Control Timers Modules


Advanced-Control Timers Features:

 16-bit up, down, up/down auto-reload counter.


 16-bit programmable Prescaler allowing dividing (also “on the fly”) the counter clock frequency
either by any factor between 1 and 65536.
 Up to 4 independent channels for:
– Input Capture
– Output Compare
– PWM generation (Edge and Center-aligned Mode)
– One-pulse mode output
 Complementary outputs with programmable dead-time
 Synchronization circuit to control the timer with external signals and to interconnect several
timers together.
 Repetition counter to update the timer registers only after a given number of cycles of the
counter.
 Break input to put the timer’s output signals in a reset state or in a known state.
 Interrupt/DMA generation on the following events:
– Update: counter overflow/underflow, counter initialization (by software or
internal/external trigger)
– Trigger event (counter start, stop, initialization or count by internal/external trigger)
– Input capture
– Output compare
– Break input
 Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning purposes
 Trigger input for an external clock or cycle-by-cycle current management

High-Resolution Timers Modules


The high-resolution timer can generate up to 10 digital signals with highly accurate timings. It is
primarily intended to drive power conversion systems such as switch-mode power supplies or lighting
systems but can be of general-purpose usage, whenever a very fine timing resolution is expected (up to
217pSec).

For control and monitoring purposes, the timer has also timing measure capabilities and links to built-in
ADC and DAC converters. Last, it features a light-load management mode and is able to handle various
fault schemes for safe shut-down purposes.

High-Resolution Timers (HRTIM) Features Include:

 High-resolution timing units


– 217 ps resolution, compensated against voltage and temperature variations
– High-resolution available on all outputs, possibility to adjust duty-cycle, frequency and
pulse width in the triggered one-pulse mode
– 6 16-bit timing units (each one with an independent counter and 4 compare units)
– 10 outputs that can be controlled by any timing unit, up to 32 set/reset sources per
channel
– Modular architecture to address either multiple independent converters with 1 or 2
switches or few large multi-switch topologies
 Multiple links to built-in analog peripherals
– 4 triggers to ADC converters
– 3 triggers to DAC converters
– 3 comparators for analog signal conditioning
 Multiple HRTIM instances can be synchronized with external synchronization inputs/outputs
 Versatile output stage
– High-resolution Deadtime insertion (down to 868 pSec)
– Programmable output polarity
– Chopper mode
 Burst mode controller to handle light-load operation synchronously on multiple converters
 7 interrupt vectors, each one with up to 14 sources
 6 DMA requests with up to 14 sources, with a burst mode for multiple registers update

STM32 Timers Modes OF Operation


Timer Mode
In timer mode, the timer module gets clocked from an internal clock source with a known frequency.
Hence the clocking frequency is known, the overflow time can also be calculated and controlled by the
preload register to get any arbitrarily chosen time interval. Each timer overflow, the timer signals the
CPU with an interrupt that indicates the end of the specified time interval.

This mode of operation is usually used to get a specific operation done each specific time interval. And
to achieve timing & sync between various tasks and events in the system. It can also replace delays in
various situations for better system response.

Counter Mode
In counter mode, the timer module gets clocked from an external source (timer input pin). So the timer
counts up or down on each rising or falling edge of the external input. This mode is really helpful in
numerous situations when you need to implement a digital counter without polling input pins or
periodically reading a GPIO or continuously interrupt the CPU if you’ve chosen to hook it up to an EXTI
pin.

You can actually monitor the counter value difference each time interval to tell how many pulses did
occur or what was the frequency of it. Such a mode can be advantageous in many situations like this.

PWM Mode
In PWM mode, the timer module is clocked from an internal clock source and produces a digital
waveform on the output channel pin called the PWM signal. By using output compare registers (OCR),
the incrementing timer’s register value is constantly compared against this OCR register. When a match
occurs the output pin state is flipped until the end of the period and the whole process is repeated.

The timer in PWM mode will produce a PWM signal at the specified frequency the user chose. The duty
cycle is also programmatically controlled by its register. The PWM resolution is affected by the desired
FPWM and other factors as we’ll see in the dedicated tutorials for PWM generation.

Advanced PWM Mode


The advanced PWM signal generation refers to the hardware ability to control more parameters and add
some hardware circuitry to support extra features for the PWM signal generation. Which includes:

 The ability to produce a complementary PWM signal that is typically the same as the PWM on
the main channel but logically inverted (high portion becomes low and vice versa).
 The ability to inject dead-time band in the PWM signal for motor driving applications to prevent
shoot-through currents that result from PWM signals overlapping.
 The ability to perform auto-shutdown for the PWM signal, it’s also called “auto brake” which an
important feature for safety-critical applications.
 And the ability to phase-adjust the PWM signal, and much more! All of this is referred to as
advanced-PWM control.

Output Compare Mode


In output compare mode, a timer module controls an output waveform or indicates when a period of
time has elapsed. When a match is detected between the output compare register (OCR) and the
counter, the output compare function assigns the corresponding output pin to a programmable value
defined by the output compare mode defined by the programmer.

The output compare pin can be driven high, low, toggles its sate, or stay unchanged. This is determined
by the programmer as per the application requirements. This mode of operation can be extremely
advantageous for generating timing signals and output driving in many applications as we’ll see in future
tutorials.
One-Pulse Mode
One-pulse mode (OPM) is a particular case of the previous modes. It allows the counter to be started in
response to a stimulus and to generate a pulse with a programmable length after a programmable
delay. Starting the counter can be controlled through the slave mode controller. Generating the
waveform can be done in output compare mode or PWM mode.

A pulse can be correctly generated only if the compare value is different from the counter initial value.
Before starting (when the timer is waiting for the trigger), the configuration must be CNT<CCRx ≤ ARR (in
particular, 0<CCRx). For example, you may want to generate a positive pulse on OC1 with a length of
tPULSE and after a delay of tDELAY as soon as a positive edge is detected on the TI2 input pin.

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