Memory Organization 1

Overview

➢ Memory Hierarchy

➢ Main Memory

➢ Auxiliary Memory

➢ Associative Memory

➢ Cache Memory

➢ Virtual Memory
Memory Organization 2
Lecture 40
Memory Hierarchy
Memory Hierarchy is to obtain the highest possible access speed while
minimizing the total cost of the memory system

Magnetic
tapes I/O Main
processor memory
Magnetic
disks

CPU Cache
memory

Register

Cache

Main Memory

Magnetic Disk

Magnetic Tape
 Which of the following is the fastest means of memory access for
CPU?
a) Registers
b) Cache
c) Main memory
d) Virtual Memory
 If M denotes the number of memory locations and N denotes the
word size, then an expression that denotes the storage capacity is
______________
a) M*N
b) M+N
c) 2M+N
d) 2M-N
Memory Organization 5
Lecture 40
Main Memory
RAM and ROM Chips
Typical RAM chip
Chip select 1 CS1
Chip select 2 CS2
Read RD 128 x 8 8-bit data bus
RAM
Write WR
7-bit address AD 7

CS1 CS2 RD WR Memory function State of data bus

0 0 x x Inhibit High-impedence
0 1 x x Inhibit High-impedence
1 0 0 0 Inhibit High-impedence
1 0 0 1 Write Input data to RAM
1 0 1 x Read Output data from RAM
1 1 x x Inhibit High-impedence

Typical ROM chip

Chip select 1 CS1

Chip select 2 CS2
512 x 8 8-bit data bus
ROM
9-bit address AD 9
Memory Organization 6
Lecture 40
Memory Address Map
Address space assignment to each memory chip

Example: 512 bytes RAM and 512 bytes ROM

Hexa Address bus

Component address 10 9 8 7 6 5 4 3 2 1
RAM 1 0000 - 007F 0 0 0 x x x x x x x
RAM 2 0080 - 00FF 0 0 1 x x x x x x x
RAM 3 0100 - 017F 0 1 0 x x x x x x x
RAM 4 0180 - 01FF 0 1 1 x x x x x x x
ROM 0200 - 03FF 1 x x x x x x x x x

Memory Connection to CPU

-RAM and ROM chips are connected to a CPU through the data and
address buses
-- The low-order lines in the address bus select the byte within the
chips and other lines in the address bus select a particular chip
through its chip select inputs
 Size of the ________ memory mainly depends on the size of the
address bus.
a) Main
b) Virtual
c) Secondary
d) Cache
Memory Organization 8
Lecture 40
Connection of Memory to CPU
Address bus CPU
16-11 10 9 8 7-1 RD WR Data bus

Decoder
3 2 1 0
CS1
CS2

Data
RD 128 x 8
RAM 1
WR
AD7

CS1
CS2

Data
RD 128 x 8
RAM 2
WR
AD7

CS1
CS2

Data
RD 128 x 8
RAM 3
WR
AD7

CS1
CS2

Data
RD 128 x 8
RAM 4
WR
AD7

CS1
CS2

Data
1- 7 512 x 8
8
9 } AD9 ROM
Auxiliary Memory
 Secondary memory
1) Sequential Access : Magnetic Tape
2) Direct access:
Magnetic disk: Flappy disk, hard disk
Optical disk: CD, DVD, Blue ray disk
Memory Organization 10
Lecture 41
Auxiliary Memory
 The most common auxiliary memory devices used in computer systems are
magnetic disks and tapes.
Other components used, but not as frequently, are magnetic drums, magnetic
bubble memory, and optical disks.
To understand fully the physical mechanism of auxiliary memory devices one
must have a knowledge of magnetics, electronics, and electromechanical
systems.
 The important characteristics of any device are its access mode, access time, transfer
rate, capacity, and cost.
 The average time required to reach a storage location in memory and obtain its
contents is called the access time.
 In electromechanical devices with moving parts such as disks and tapes, the access
time consists of a seek time required to position the read-write head to a location and
a transfer time required to transfer data to or from the device.
 Because the seek time is usually much longer than the transfer time, auxiliary storage
is organized in records or blocks.
 A record is a specified number of characters or words. Reading
or writing is always done on entire records.
 The transfer rate is the number of characters or words that the
device can transfer per second, after it has been positioned at the
beginning of the record.
 Magnetic drums and disks are quite similar in operation. Both
consist of high-speed rotating surfaces coated with a magnetic
recording medium.
 The rotating surface of the drum is a cylinder and that of the
disk, a round flat plate.
 The recording surface rotates at uniform speed and is not started
or stopped during access operations.
Magnetic Disks
 magnetic disk is a circular plate constructed of metal or plastic coated with
magnetized material. Often both sides of the disk are used and several disks
may be stacked on one spindle with read/write heads available on each surface.

All disks rotate together at high speed and are not stopped or started for access
purposes.
Bits are stored in the magnetized surface in spots along concentric
circles called tracks. The tracks are commonly divided into sections called
sectors.
In most systems, the minimum quantity of information which can be
transferred is a sector. The subdivision of one disk surface into tracks and
sectors is shown in Fig.
 The disk’s surface is divided into a number of invisible concentric
circles called:
a) Drives
b) Tracks
c) Slits
d) References
 In this type of unit, the track address bits are used by a
mechanical assembly to move the head into the specified
track position before reading or writing.
 In other disk systems, separate read/write heads are
provided for each track in each surface.
 The address bits can then select a particular track
electronically through a decoder circuit. This type of unit is
more expensive and is found only in very large computer
systems.
 A disk system is addressed by address bits that specify the disk number, the disk
surface, the sector number and the track within the sector.
 After the read/write heads are positioned in the specified track, the system has to wait
until the rotating disk reaches the specified sector under the read/write head.
 Information transfer is very fast once the beginning of a sector has been reached.
Disks may have multiple heads and simultaneous transfer of bits from several tracks
at the same time.
 Disks that are permanently attached to the unit assembly and cannot be removed by the occasional user
are called hard disks . A disk drive with removable disks is called a floppy disk. The disks used with a
floppy disk drive are small removable disks made of plastic coated with magnetic recording material.

 There are two sizes commonly used, with diameters of 5.25 and 3. 5 inches. The 3.5-inch disks are
smaller and can store more data than can the 5.25-inch disks.

 Floppy disks are extensively used in personal computers as a medium for distributing software to
computer users.
 Which of the following is not a part of disk address?
a) Sector size
b) Sector number
c) Track number
d) Surface number
Magnetic tape
 A magnetic tape transport consists of the electrical, mechanical, and electronic components to provide
the parts and control mechanism for a magnetic-tape unit. The tape itself is a strip of plastic coated
with a magnetic recording medium.
 Bits are recorded as magnetic spots on the tape along several tracks. Usually, seven or nine bits are
recorded simultaneously to form a character together with a parity bit.
 Read/write heads are mounted one in each track so that data can be recorded and read as a sequence of
characters.
 Magnetic tape units can be stopped, started to move forward or in reverse, or can be rewound. However, they
cannot be started or stopped fast enough between individual characters.
 For this reason, information is recorded in blocks referred to as records. Each record on tape has an identification
bit pattern at the beginning and at the end.
 By reading the bit pattern at the beginning, the tape control identifies the record number. By reading the bit
pattern at the end of the record, the control recognizes the beginning of a gap.
 A tape unit is addressed by specifying the record number and the number of characters in the record. Records
may be of fixed or variable length.
 Magnetic tape is a type of _________ access device.
a) Sequential
b) Direct access
c) Step
d) Indirect
 The number of characters/second that can be transmitted to the
memory from the tape is denoted by the term.
a) Data transfer rate
b) Transmission mode
c) Transmission rate
d) Data mode
 The last on the hierarchy scale of memory devices is ______
a) Main memory
b) Secondary memory
c) registers
d) Flash drives
Memory Organization 25
Lecture 41
Associative Memory
- Accessed by the content of the data rather than by an address
- Also called Content Addressable Memory (CAM)
Hardware Organization
Argument register(A)

Key register (K)

Match
register

Input Associative memory

array and logic
M
Read m words
Write n bits per word
Memory Organization 26
Lecture 41
Organization of CAM
A1 Aj An

K1 Kj Kn

i= word Word 1 C11 C1j C1n M1

j-= bit in word
Word i Ci1 Cij Cin Mi

Word m Cm1 Cmj Cmn Mm

Bit 1 Bit j Bit n

Internal organization of a typical cell Cij Aj Kj

Input

Write

R S Match
F ij logic To Mi
Read

Output
 Memory unit accessed by content is
 A) Main memory
 B) Secondary memory
 C) Associative memory
 D) Cache memory
Memory Organization 29
Lecture 42
Cache Memory
Locality of Reference
- The references to memory at any given time interval tend to be confined
within a localized areas
- This area contains a set of information and the membership changes
gradually as time goes by
- Temporal Locality
The information which will be used in near future is likely to be in use
already( e.g. Reuse of information in loops)
- Spatial Locality
If a word is accessed, adjacent(near) words are likely accessed soon
(e.g. Related data items (arrays) are usually stored together;
instructions are executed sequentially)
Cache
- The property of Locality of Reference makes the cache memory systems work
- Cache is a fast small capacity memory that should hold those information
which are most likely to be accessed

Main memory CPU

Cache memory
Memory Organization 31
Lecture 42
Performance of Cache
Memory Access
All the memory accesses are directed first to Cache
If the word is in Cache; Access cache to provide it to CPU
If the word is not in Cache; Bring a block (or a line) including
that word to replace a block now in Cache

- How can we know if the word that is required is there ?

- If a new block is to replace one of the old blocks, which one should we
choose ?

Performance of Cache Memory System

Hit Ratio - %
The performance of cache memory is frequently measured in terms of a
quantity called

a. Miss ratio
b. Hit ratio
c. Latency ratio
d. Read ratio
Memory and Cache Mapping – (Associative Mapping)
Mapping Function
Specification of correspondence between main memory blocks and cache
blocks Associative mapping
Direct mapping
Set-associative mapping
Associative Mapping
- Any block location in Cache can store any block in memory
-> Most flexible
- Mapping Table is implemented in an associative memory
-> Fast, very Expensive
- Mapping Table
Stores both address and the content of the memory word
address (15 bits)

Argument register

Address Data
01000 3450
02777 6710
22235 1234
 The memory blocks are mapped on to the cache with the help of
______
a) Hash functions
b) Vectors
c) Mapping functions
d) None of the mentioned
Memory Organization 35
Lecture 42
Cache Mapping – direct mapping
- Each memory block has only one place to load in Cache
- Mapping Table is made of RAM instead of CAM
- n-bit memory address consists of 2 parts; k bits of Index field and n-k bits of Tag field
- n-bit addresses are used to access main memory and k-bit Index is used to access the
Cache
n -k k
Addressing Relationships Tag(6) Index(9)

00 000 32K x 12 000

512 x 12
Main memory Cache memory
Address = 15 bits Address = 9 bits
Data = 12 bits Data = 12 bits
77 777 777
Direct Mapping Cache Organization
Memory
address Memory data
Cache memory
00000 1220
Index
address Tag Data
00777 2340 000 00 1220
01000 3450

01777 4560
02000 5670

777 02 6710
02777 6710
Memory Organization 36
Lecture 42
Cache Mapping – direct mapping
Operation

- CPU generates a memory request with (TAG;INDEX)

- Access Cache using INDEX ; (tag; data)
Compare TAG and tag
- If matches -> Hit
Provide Cache(data) to CPU
- If not match -> Miss
Search main memory and replace the block from cache memory

Direct Mapping with block size of 8 words

000 01 3450 Tag Block Word

Block 0
007 01 6578
010 INDEX
Block 1
017

Block 63 770 02
777 02 6710
The block frame address are divided into the

a. Tag field
b. Index field
c. Stack field
d. Both a and b
Memory Organization 38
Lecture 42
Cache Mapping – Set Associative Mapping
- Each memory block has a set of locations in the Cache to load

Set Associative Mapping Cache with set size of two

Index Tag Data Tag Data

000 01 3450 02 5670

777 02 6710 00 2340

 The method of mapping the consecutive memory blocks to
consecutive cache blocks is called ______
a) Set associative
b) Associative
c) Direct
d) Indirect
Memory Organization 40
Lecture 42
Cache Write
Write Through
When writing into memory
If Hit, both Cache and memory is written in parallel
If Miss, Memory is written
For a read miss, missing block may be overloaded onto a cache
block
Memory is always updated
-> Important when CPU and DMA I/O are both executing
Slow, due to the memory access time
Write-Back (Copy-Back)
When writing into memory
If Hit, only Cache is written
If Miss, missing block is brought to Cache and write into Cache
For a read miss, candidate block must be written back to the
memory
Memory is not up-to-date, i.e., the same item in
Cache and memory may have different value
Memory Organization 43
Lecture 43
Virtual Memory
Give the programmer the illusion that the system has a very large memory, even
though the computer actually has a relatively small main memory

Address Space(Logical) and Memory Space(Physical)

address space memory space

virtual address Mapping

(logical address) physical address

address generated by programs actual main memory address

Address Mapping
Memory Mapping Table for Virtual Address -> Physical Address
Virtual address

Virtual Memory Main memory

address address Main
mapping memory
register table register

Physical
Address
Memory table Main memory
buffer register buffer register
 The techniques which move the program blocks to or from the
physical memory is called as ______
a) Paging
b) Virtual memory organization
c) Overlays
d) Framing
Memory Organization 45
Lecture 43
Address Mapping
Address Space and Memory Space are each divided into fixed size group
of words called blocks or pages
Page 0
1K words group Page 1
Page 2
Address space Memory space Block 0
Page 3
N = 8K = 213 M = 4K = 212 Block 1
Page 4
Block 2
Page 5
Block 3
Page 6
Page 7
Organization of memory Mapping Table in a paged system
Page no. Line number
1 0 1 0 1 0 1 0 1 0 0 1 1 Virtual address

Table Presence
address bit
000 0 Main memory
001 11 1 Block 0
010 00 1 Block 1
011 0 01 0101010011 Block 2
100 0 Block 3
Main memory
101 01 1 address register
Memory page table 110 10 1
111 0 MBR

01 1
Memory Organization 46
Lecture 43
Associative Memory Page Table
Assume that
Number of Blocks in memory = m
Number of Pages in Virtual Address Space = n
Page Table
- Straight forward design -> n entry table in memory Inefficient storage space
utilization
<- n-m entries of the table is empty
- More efficient method is m-entry Page Table
Page Table made of an Associative Memory
m words; (Page Number: Block Number)
Virtual address
Page no.
1 0 1 Line number Argument register

1 0 1 0 0 Key register

0 0 1 1 1
0 1 0 0 0 Associative memory
1 0 1 0 1
1 1 0 1 0
Page no. Block no.
Page Fault
Page number cannot be found in the Page Table
The main aim of virtual memory organization is
a) To provide effective memory access.
b) To provide better memory transfer.
c) To improve the execution of the program.
d) All of the above.
Memory Organization 48
Lecture 43
Page Replacement
Decision on which page to displace to make room for
an incoming page when no free frame is available
Modified page fault service routine
1. Find the location of the desired page on the backing store
2. Find a free frame
- If there is a free frame, use it
- Otherwise, use a page-replacement algorithm to select a victim frame
- Write the victim page to the backing store
3. Read the desired page into the (newly) free frame
4. Restart the user process valid/
frame invalid bit swap
out
1 victim
page
2 change to
f 0 v i invalid victim
3
4 swap
f v reset page
table for desired
new page page in
backing store
page table

physical memory
Memory Organization 49
Lecture 43
Page Replacement Algorithms
FIFO Reference string
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1
7 7 7 2 2 2 4 4 4 0 0 0 7 7 7
0 0 0 3 3 3 2 2 2 1 1 1 0 0
1 1 1 0 0 0 3 3 3 2 2 2 1
Page frames

FIFO algorithm selects the page that has been in memory the longest time
Using a queue - every time a page is loaded, its
- identification is inserted in the queue
Easy to implement
May result in a frequent page fault

0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1
7 7 7 2 2 2 2 2 7
0 0 0 0 4 0 0 0
1 1 3 3 3 1 1
Page frames
 A memory page containing a heavily used variable that was
initialized very early and is in constant use is removed, then the
page replacement algorithm used is ____________
a) LRU
b) LFU
c) FIFO
d) None of the mentioned
Memory Organization 51
Lecture 43
Page Replacement Algorithms
LRU

- LRU uses the recent past as an approximation of near future.

Replace that page which has not been

used for the longest period of time

Reference string
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1
7 7 7 2 2 4 4 4 0 1 1 1
0 0 0 0 0 0 3 3 3 0 0
1 1 3 3 2 2 2 2 2 7
Page frames

- LRU may require substantial hardware assistance

- The problem is to determine an order for the frames
defined by the time of last use