rc6 Slides
rc6 Slides
Outline
u Design Philosophy
u Description of RC6
u Implementation Results
u Security
u Conclusion
Design Philosophy
u Leverage our experience with RC5: use
data-dependent rotations to achieve a
high level of security.
u Adapt RC5 to meet AES requirements
u Take advantage of a new primitive for
increased security and efficiency:
32x32 multiplication, which executes
quickly on modern processors, to
compute rotation amounts.
Description of RC6
Description of RC6
u RC6-w/r/b parameters:
– Word size in bits: w ( 32 )( lg(w) = 5 )
– Number of rounds: r ( 20 )
– Number of key bytes: b ( 16, 24, or 32 )
u Key Expansion:
– Produces array S[ 0 … 2r + 3 ] of w-bit
round keys.
u Encryption and Decryption:
– Input/Output in 32-bit registers A,B,C,D
t u
<<< f <<< f
5 5
<<< <<<
S[2i] S[2i+1]
A B C D
(6) Add Pre- and Post-Whitening
B = B + S[ 0 ]
D = D + S[ 1 ]
for i = 1 to r do
{
t = ( B x ( 2B + 1 ) ) <<< 5
u = ( D x ( 2D + 1 ) ) <<< 5
A = ( ( A ⊕ t ) <<< u ) + S[ 2i ]
C = ( ( C ⊕ u ) <<< t ) + S[ 2i + 1 ]
(A, B, C, D) = (B, C, D, A)
}
A = A + S[ 2r + 2 ]
C = C + S[ 2r + 3 ]
Custom RC6 IC
u 0.25 micron CMOS process
u One round/clock at 200 MHz
u Conventional multiplier designs
2
u 0.05 mm of silicon
u 21 milliwatts of power
u Encrypt/decrypt at 1.3 Gbits/second
u With pipelining, can go faster, at cost
of more area and power
RC6 Security Analysis
Analysis procedures
u Intensive analysis, based on most
effective known attacks (e.g. linear
and differential cryptanalysis)
u Analyze not only RC6, but also several
“simplified” forms (e.g. with no
quadratic function, no fixed rotation
by 5 bits, etc…)
Linear analysis
u Find approximations for r-2 rounds.
u Two ways to approximate A = B <<< C
– with one bit each of A, B, C (type I)
– with one bit each of A, B only (type II)
– each have bias 1/64; type I more useful
u Non-zero bias across f(B) only when
input bit = output bit. (Best for lsb.)
u Also include effects of multiple linear
approximations and linear hulls.
(The End)