Arithmetic Logic Unit (ALU)

Inside a computer, there is an Arithmetic Logic Unit (ALU), which is capable of performing
logical operations (e.g. AND, OR, Ex-OR, Invert etc.) in addition to the arithmetic operations
(e.g. Addition, Subtraction etc.). The control unit supplies the data required by the ALU from
memory, or from input devices, and directs the ALU to perform a specific operation based on
the instruction fetched from the memory. ALU is the “calculator” portion of the computer.

An arithmetic logic unit(ALU) is a major component of the central processing unit of the a
computer system. It does all processes related to arithmetic and logic operations that need to be
done on instruction words. In some microprocessor architectures, the ALU is divided into the
arithmetic unit (AU) and the logic unit (LU).
An ALU can be designed by engineers to calculate many different operations. When the
operations become more and more complex, then the ALU will also become more and more
expensive and also takes up more space in the CPU and dissipates more heat. That is why
engineers make the ALU powerful enough to ensure that the CPU is also powerful and fast, but
not so complex as to become prohibitive in terms of cost and other disadvantages.
ALU is also known as an Integer Unit (IU). The arithmetic logic unit is that part of the CPU that
handles all the calculations the CPU may need. Most of these operations are logical in nature.
Depending on how the ALU is designed, it can make the CPU more powerful, but it also consumes
more energy and creates more heat. Therefore, there must be a balance between how powerful
and complex the ALU is and how expensive the whole unit becomes. This is why faster CPUs are
more expensive, consume more power and dissipate more heat.
Different operation as carried out by ALU can be categorized as follows –
 logical operations − These include operations like AND, OR, NOT, XOR, NOR,
NAND, etc.
  Bit-Shifting Operations − This pertains to shifting the positions of the bits by a
certain number of places either towards the right or left, which is considered a
multiplication or division operations.
 Arithmetic operations − This refers to bit addition and subtraction. Although
multiplication and division are sometimes used, these operations are more
expensive to make. Multiplication and subtraction can also be done by repetitive
additions and subtractions respectively.

Arithmetic Logic Unit (ALU) Signals

A variety of input and output electrical connections are contained by the ALU, which led to
casting the digital signals between the external electronics and ALU.

ALU input gets signals from the external circuits, and in response, external electronics get
outputs signals from ALU.
Data: Three parallel buses are contained by the ALU, which include two input and output
operand. These three buses handle the number of signals, which are the same.
Opcode: When the ALU is going to perform the operation, it is described by the operation
selection code what type of operation an ALU is going to perform arithmetic or logic operation.
Output: The results of the ALU operations are provided by the status outputs in the form of
supplemental data as they are multiple signals. Usually, status signals like overflow, zero, carry
out, negative, and more are contained by general ALUs. When the ALU completes each
operation, the external registers contained the status output signals. These signals are stored in
the external registers that led to making them available for future ALU operations.

Input: When ALU once performs the operation, the status inputs allow ALU to access further
information to complete the operation successfully. Furthermore, stored carry-out from a
previous ALU operation is known as a single “carry-in” bit.
Configurations of the ALU
The description of how ALU interacts with the processor is given below. Every
arithmetic logic unit includes the following configurations:

o Instruction Set Architecture

o Accumulator

o Stack

o Register to Register

o Register Stack

o Register Memory

Accumulator
The intermediate result of every operation is contained by the accumulator,
which means Instruction Set Architecture (ISA) is not more complex because
there is only required to hold one bit.

Generally, they are much fast and less complex but to make Accumulator
more stable; the additional codes need to be written to fill it with proper
values. Unluckily, with a single processor, it is very difficult to find
Accumulators to execute parallelism. An example of an Accumulator is the
desktop calculator.

Stack

Whenever the latest operations are performed, these are stored on the stack
that holds programs in top-down order, which is a small register. When the
new programs are added to execute, they push to put the old programs.

Register-Register Architecture
It includes a place for 1 destination instruction and 2 source instructions, also
known as a 3-register operation machine. This Instruction Set Architecture
must be more in length for storing three operands, 1 destination and 2
sources. After the end of the operations, writing the results back to the
Registers would be difficult, and also the length of the word should be longer.
However, it can be caused to more issues with synchronization if write back
rule would be followed at this place.
The MIPS component is an example of the register-to-register Architecture.
For input, it uses two operands, and for output, it uses a third distinct
component. The storage space is hard to maintain as each needs a distinct
memory; therefore, it has to be premium at all times. Moreover, there might
be difficult to perform some operations.

Register - Stack Architecture

Generally, the combination of Register and Accumulator operations is known
as for Register - Stack Architecture. The operations that need to be performed
in the register-stack Architecture are pushed onto the top of the stack. And
its results are held at the top of the stack. With the help of using the Reverse
polish method, more complex mathematical operations can be broken down.
Some programmers, to represent operands, use the concept of a binary tree.
It means that the reverse polish methodology can be easy for these
programmers, whereas it can be difficult for other programmers. To carry out
Push and Pop operations, there is a need to be new hardware created.

Register and Memory

In this architecture, one operand comes from the register, and the other
comes from the external memory as it is one of the most complicated
architectures. The reason behind it is that every program might be very long
as they require to be held in full memory space. Generally, this technology is
integrated with Register-Register Register technology and practically cannot
be used separately.

Advantages of ALU
ALU has various advantages, which are as follows:

o It supports parallel architecture and applications with high performance.

o It has the ability to get the desired output simultaneously and combine integer
and floating-point variables.

o It has the capability of performing instructions on a very large set and has a
high range of accuracy.

o Two arithmetic operations in the same code like addition and multiplication or
addition and subtraction, or any two operands can be combined by the ALU.
For case, A+B*C.
 o Through the whole program, they remain uniform, and they are spaced in a
way that they cannot interrupt part in between.

o In general, it is very fast; hence, it provides results quickly.

o There are no sensitivity issues and no memory wastage with ALU.

o They are less expensive and minimize the logic gate requirements.

Disadvantages of ALU
The disadvantages of ALU are discussed below:

o With the ALU, floating variables have more delays, and the designed controller
is not easy to understand.

o The bugs would occur in our result if memory space were definite.

o It is difficult to understand amateurs as their circuit is complex; also, the

concept of pipelining is complex to understand.

o A proven disadvantage of ALU is that there are irregularities in latencies.

o Another demerit is rounding off, which impacts accuracy.