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Lab 01

This document describes an experiment to implement and verify the operations of NOT, AND, and OR logic gates using integrated circuits. The objectives are to use IC chips containing inverter, AND, and OR gates to perform the logic operations. The experiment involves setting input values using switches and observing output values using LED indicators on a training kit and module. Tables are included to record the input/output values and verify the gate operations. Review questions ask the student to describe gate functions and inputs that produce high outputs.
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100% found this document useful (1 vote)
58 views6 pages

Lab 01

This document describes an experiment to implement and verify the operations of NOT, AND, and OR logic gates using integrated circuits. The objectives are to use IC chips containing inverter, AND, and OR gates to perform the logic operations. The experiment involves setting input values using switches and observing output values using LED indicators on a training kit and module. Tables are included to record the input/output values and verify the gate operations. Review questions ask the student to describe gate functions and inputs that produce high outputs.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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IBA Institute of Emerging Technologies, Khairpur

(Khairpur Campus of Sukkur IBA University)

LAB # 01

NOT, AND & OR GATES

Name: __________________________________Class: ___________ Date: ___ ___ ________________

Instructor: ________________________________Score: __________ Signature: __________________

OBJECTIVE: Upon successful completion of this experiment, the student will be able:

 To implement and verify NOT,AND & OR gate operations using,

 74LS04 IC, 74LS08 IC, 74LS32 IC

 Module KL-33001

EQUIPMENT:

 Training kit IDL-800

 KL-31001 Digital Logic Lab

 Module KL-33001

COMPONENTS:

 74LS04 IC (Inverter)

 74LS08 IC (AND gate)

 74LS32 IC (OR gate)

 Connecting Wires, Hard Wires.

1.1 NOT gate:

The NOT gate is an electronic circuit that produces an inverted version of input logic at its output. It is also
known as inverter. If the input variable is A, the inverted output is known as NOT A. alternatively if the
input is logic low (0), the output will be logic high (1) and if the input is logic high (1), the output will be
logic low (0). NOT gate has only one input and one output, as shown in fig 1.1 (a & b):
(a) (b)

Fig 1.1: (a) Distinctive symbol of NOT gate (b) Standard NOT gate symbol

The Boolean equation for an inverter is written X=A (which is read as “X equals NOT A”). The bar over
the A is an inverter bar, used to represent the NOT operation.

74LS04 Inverted IC:

In order to implement the NOT gate operation using IC, the TTL 74LS04 IC can be used. This IC contains
six inverters. It has 14pin Dual Inline Package (DIP) configuration as shown in fig 1.2. The power supply
connections are made to pin 7 and 14. This supply the operating voltage for all six NOT gates on the IC.
Pin 1 is identified by a small indented circle next to it or by a notch cut out between pin 1 and 14.

Fig 1.2: 74LS04


Inverter IC pin configuration

1.2 AND gate:

The AND gate is an electronic circuit that gives a high output (1) if all its inputs are high (1). When any
one of its input is low (0), the output is low (0). The AND gates are composed of two or more inputs and a
single output, as indicated by logic symbols in fig 1.3 (a & b):

(b)

Fig 1.3: (a) Distinctive symbol of 2-input AND gate; (b) Standard 2-input AND gate symbol

There is no limit to the number of inputs that may be applied to an AND functions. However, for practical
reasons, commercial AND gates are not most commonly manufactured with 2, 3 or 4 inputs. The Boolean
expression for the AND operation is X=A.B (which is read as “X equals to A AND B”).
The dot (.) sign is used to show the AND expression, however this sign is usually omitted. The key thing
to remember is that the AND operation will produce a result of 1 only when all inputs (variables) are 1, just
like ordinary multiplication.

74LS08 2-input AND gate IC:

In order to implement the AND operation using IC, the TTL 74LS08 2-input AND gate IC can be used.
This IC contains four AND gates. It has 14 pin DIP configuration as shown in fig 1.4:

Fig 1.4: 74LS08 2-input AND gate IC pin configuration

1.3 OR Gate:

The OR gate produces output high when any one of inputs is high. The output is low when all of the inputs
are low. The OR gate also has two or more inputs and a single output. The symbol for a two input OR gate
is shown in fig 1.5 (a & b):

(a) (b)

Fig 1.5: (a) (a) Distinctive symbol of 2-input OR gate; (b) Standard 2-input OR gate symbol

The Boolean expression for the OR operation is written as X=A+B (which is read as “X equals A OR B”).
Notices the use of (+) symbol to represent the OR function.

74LS32 2-Input OR Gate IC:

In order to implement the OR operation using IC, the TTL 74LS32 2-input OR gate IC can be used. It has
four OR gates with in the package. This IC has 14 pin DIP configuration as shown in fig 1.6:
Fig 1.6: 74LS32 2-
input OR gate IC pin configuration

OBSERVATION TABLES:

NOT Gate Table

INPUT OUTPUT X

AND & OR Gate Tables

INPUTS OUTPUTS

A B AND Gate OR Gate

0 0

0 1

1 0

1 1

PROCEDURE:

1) Using ICs:

 In order to implement the NOT, AND & OR operations with the help of ICs, take the 74LS04,
74LS08, 74LS32 ICs.

 Pin Assignments for the ICs have been shown in fig 1.2, 1.4, 1.6 respectively.

 Take 74LS04 IC and insert it in the breadboard present on the IDL-800 training kit.

 Connect its pin 14 to +5V and pin 7 to ground.


 Use first gate (any one can be taken) from IC by connecting input pin 1 to switch and output pin 2
to LED and observe the NOT gate operation.

 Repeat the procedure for AND & OR operation.

2) Using Module KL-33001(block d):

a) NOT gate:

 U3c of Module KL-33001 block d will be used in this section.

 Connect input C1 and output F6 of U3c to SW0 and L1 (LED) respectively. Follow the input
sequence and record outputs.

STATE C1 F6

0 0

1 1

b) AND gate:

 U1a and U1b of Module KL-33001 block d will be used in this section.

 Connect inputs A1, A2 to Data switch SW0, SW1 TTL level and output F3 to logic indicator L0.
Follow the input sequence and record outputs.

STATE INPUTS OUTPUT

A2 A1 F3

0 0 0

1 0 1

2 1 0

3 1 1

c) OR gate:

 U2a and U2b of Module KL-33001 block d will be used in this section.

 Connect inputs A3, A4 to Data switch SW0, SW1 TTL level and output F4 to logic indicator L0.
Follow the input sequence and record outputs.
STATE INPUTS OUTPUT

A4 A3 F4

0 0 0

1 0 1

2 1 0

3 1 1

REVIEW QUESTIONS:

1. Describe the function of NOT, AND & OR gates?

_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________

2. What input will produce a high (1) at the output of a NOT gate?

_________________________________________________________________________________
_________________________________________________________________________________

3. What is the minimum no: of inputs that can be applied to an AND & OR gates?

_________________________________________________________________________________
_________________________________________________________________________________

HAND IN:

 Clean your equipment/ materials before you leave.

 Keep all the equipment and material to their proper storage area.

 Submit your answers to questions, together with your data, calculations and results before the next
laboratory.

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