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Hardware Design Considerations

AN0002 - Application Note

Introduction This application note is intended for system designers who require an overview of the hardware design considerations for the EFM32. Topics that are covered specifically are how to provide a robust supply power to the chip, connection to the debug interface and external clock sources. The scope is to provide an introduction to potential design challenges, and reference design for the EFM32 Gecko and Tiny Gecko series of microcontrollers are included. This application note includes: This PDF document Reference Design (zip) OrCAD design files PDF Schematics Symbol libraries

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1 Power Supply
1.1 Introduction
Even though the EFM32 supports a wide voltage range and has an exceptionally small average current consumption, proper decoupling is crucial. As for all digital circuits, current is drawn in short pulses occurring on the clock edges. Particularly when several I/O lines are switching simultaneously, current pulses on the power supply lines can be in the order of several hundred mA. If the I/O lines are not loaded the pulse width may be only a few ns. Therefore, even if the average current consumption of the EFM32 is very small, the current drawn during short pulses can be considerable. Such kind of current spikes cannot be properly delivered over long power supply lines without introducing considerable noise in the supply voltage. This noise is reduced by using decoupling capacitors which act as supplementing current sources during these short transients.

1.2 Power Supply Decoupling

All power pins must be connected to external decoupling capacitors. Different topologies have different performance in terms of component cost and supply noise suppression. In the following subsections one standard and one improved topology are presented. The first is favorable due to its low component cost, whereas the second has better supply noise suppression. The latter is relevant for example when higher ADC accuracy is required. All external decoupling capacitors should have a temperature range reflecting the environment in which the EFM32 should be used. Ceramic capacitors with X5R material with a change in capacitance of 15% over the temperature range -55C - +85C would be a good choice covering the entire operating temperature range of the EFM32 with a reasonable accuracy.

1.2.1 Standard Decoupling

In Figure 1.1 (p. 2) a standard approach for decoupling is illustrated. Figure 1.1. Power supply
VDD

Power plane

EFM32
AVDD_n
...

VDD_DREG IOVDD_n
...

AVDD_0

IOVDD_0

100n ... CAVDD_n

100n CAVDD_0

DECOUPLE

1u CDEC VSS

100n ... CIOVDD_0

100n CIOVDD_n

100n CDREG

10u CVDD

Ground plane

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...the world's most energy friendly microcontrollers The topology consists of one large common capacitor (CVDD) of around 10 F along with one 100nF capacitor for each power pin (CAVDD_i, CIOVDD_i and CDREG). This topology is attractive since it simple and utilizes few components, while the noise suppression performance is sufficient for many applications. Note The number of analog power pins (AVDD_n), I/O power pins (IOVDD_n) and ground pins (VSS) depend on the device package. Please refer to the device datasheet for package and pinout information.

1.2.2 Decoupling With Improved Supply Noise Suppression

In Figure 1.2 (p. 3) a decoupling approach providing better noise suppression and isolation between the digital and analog power pins is illustrated. This topology is a good alternative when for example higher ADC accuray is required. Figure 1.2. Power supply
VDD

Power plane
LVDD

1R RAVDD

EFM32
AVDD_n

VDD_DREG IOVDD_n

...

...

AVDD_0

IOVDD_0

10u CAVDD

10n ... CAVDD_n

10n CAVDD_0

DECOUPLE

1u CDEC VSS

100n ... CIOVDD_0

100n CIOVDD_n

100n CDREG

10u CIOVDD

Ground plane

The topology separates the analog and the digital power domain by using an inductor and a resistor in addition to the capacitors. The inductor gives a relatively high impedance path between the power plane and the analog power pins during current pulses, effectively reducing the noise in the power plane. Evidently, the series resistance of the inductor must be so small that it does not give a significant DC voltage drop (An EMI/ RFI suppressor similar to BLM21B102S could be a good choice for LVDD). The resistor is also inserted in order to improve the isolation between the power domains. The resistor value should be small in order to prevent a high DC drop, on the other hand it should offer some isolation. A value of 1 Ohm is a good trade-off. Both domains should have a large common capacitor (CIOVDD and CAVDD) of around 10 F, in addition to one capacitor per power pin. For the digital domain, the capacitors (CIOVDD_i) can be around 100 nF, whereas for the analog domain the capacitors (CAVDD_i) should be 10 nF. Some EFM32 parts have requirements regarding relative rise time of the analog (AVDD_x) and digital (IOVDD_x and VDD_DREG) power nets, please see the Power Management section in the device

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...the world's most energy friendly microcontrollers datasheet for further info. For devices where this constraint applies, the schematic in Figure 1.1 (p. 2) should normally be used. However, if filtering of the analog power is required for analog accuracy, Figure 1.3 (p. 4) should be used with these devices. In Figure 1.2 (p. 3), there is an added filter that will delay a rising slope on AVDD_x compared to IOVDD_x and VDD_DREG. Because of this, this schematic should normally not be used with devices where the power sequencing criterion applies. However, if the internal resistance of the supply voltage is above 7 Ohm, Figure 1.2 (p. 3) can also be used with these devices since the delay inferred by the filter is not significant at such rise times. Figure 1.3. Power supply
VDD

Power plane
LVDD 1R RAVDD 1R

EFM32
AVDD_n
...

RDVDD VDD_DREG IOVDD_n

...

AVDD_0

IOVDD_0

10u CAVDD

10n

...

10n CAVDD_0

DECOUPLE

CAVDD_n

100n ... CIOVDD_0 1u CDEC

100n CIOVDD_n

100n CDREG

10u CIOVDD

VSS

Ground plane

1.2.3 DECOUPLE Pin

This pin is to provide external decoupling to the internal regulated supply power. This capacitor, CDEC, (ref. Figure 1.1 (p. 2) ) should be in the order of 1 F to filter transients from this power domain.

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2 Debug Interface and External Reset Pin

2.1 Debug Interface
The debug interface basically consists of the SWCLK (clock input) and SWDIO (data in/out) lines, in addition to the optional SWO (serial wire output). The SWO line is for example used for instrumentation trace and program counter sampling, and is not needed for programming and normal debugging. However, it can be valuable in advanced debugging scenarios, and it is therefore recommended to include this line in a design. The connection to an ARM 20 pin debug connector is shown in Figure 2.1 (p. 5) . Pins with no connection should be left unconnected. Figure 2.1. Connecting the EFM32 to an ARM 20 pin debug header
VMCU VMCU

Vtarget VDD PF1 PF0 PF2 or PC15 SWDIO SWCLK SWO

1 3 5 7

2 4 6 8

9 10
RESETn Reset

11 12 13 14

VSS

15 16 17 18 19 20

EFM32

ARM 20 Pin Header

2.2 External Reset Pin (RESETn)

Forcing the RESETn pin low generates a reset of the EFM32. The RESETn pin includes an internal pullup resistor and can therefore be left unconnected if no external reset source is required. Also connected to the RESETn line is a low-pass filter which prevents noise glitches from resetting the EFM32. The characteristics of the pullup and input filter is identical to the corresponding characteristic of a GPIO pin, which is found in the device datasheet.

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3 External Clock Sources

3.1 Introduction
The EFM32 supports different external clock sources to generate the low and high frequency clocks in addition to the internal LF and HF RC oscillators. The possible external clock sources for both the LF and HF domains are external oscillators (square or sine wave) or crystals/ceramic resonators. This section describes how the external clock sources should be connected.

3.2 Low Frequency Clock Sources

The external low frequency clock can be generated from a crystal/ceramic resonator or from an external clock source.

3.2.1 Low Frequency Crystals and Ceramic Resonators

The hardware configuration of the crystal and ceramic resonator is indicated in Figure 3.1 (p. 6) . The crystal is to be connected across the LFXTAL_N and LFXTAL_P pins of the EFM32. Figure 3.1. Low Frequency Crystal

LFXTAL_N

LFXTAL_P 32KHz

EFM32G
CL1 CL2

The crystals/ceramic resonators oscillate mechanically and have an electrical equivalent circuit as shown in Figure 3.2 (p. 6). In the electrical circuit CS represents the motional capacitance, LS the motional inductance, RS the mechanical losses during oscillation and C0 the parasitic capacitance of the package and pins. CL1 and CL2 represent the load capacitance. This circuit is valid for both crystals and ceramic resonators. For more information, refer to the EFM32 Oscillator Design Considerations application note. Figure 3.2. Equivalent Circuit of a Crystal/Ceramic Resonator

CS

RS

LS

C0 CL1

CL2

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3.2.2 Low Frequency External Clocks

The EFM32 can also be clocked by a LF external clock source. To select a proper external oscillator, consider the specifications such as frequency, aging, stability, voltage sensitivity, rise and fall time, duty cycle and signal levels. The external clock signal can either be square wave or a sine signal with a frequency of 32.768 kHz. The external clock source must be connected as indicated in Figure 3.3 (p. 7) . When a square wave source is used the LFXO buffer must be in bypass mode. The clock signal must toggle between 0 and VDD and the duty cycle must be close to 50%, as specified in the device datasheet. When a sine source is used, the amplitude must be in accordance with the device datasheet. The sine signal is buffered through the LFXO buffer, whose input is AC-coupled. Figure 3.3. Low Frequency External Clock

External source

LFXTAL_N

LFXTAL_P (High Z)

EFM32G

3.3 High Frequency Clock Sources

The external high frequency clock can be generated from a crystal/ceramic resonator or from an external square or sine wave source.

3.3.1 High Frequency Crystals and Ceramic Resonators

The hardware configuration of the crystal and ceramic resonator is indicated in Figure 3.4 (p. 7) . The crystal is to be connected across the HFXTAL_N and HFXTAL_P pins. The electrical equivalent circuit of the HF crystal/ceramic resonators is equal to the one for LF crystals/ ceramic resonators in Figure 3.2 (p. 6) . Right choice of CL is important for proper operating frequency. See the EFM32 Oscillator Design Considerations application note for more information.

Figure 3.4. High Frequency Crystal Oscillator

HFXTAL_N

HFXTAL_P 4-32 MHz

CL1

CL2

EFM32G

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3.3.2 High Frequency External Clocks

The EFM32 can also be clocked by an external HF clock source. To select a proper external oscillator, consider the specifications such as frequency, aging, stability, voltage sensitivity, rise and fall time, duty cycle and signal levels. The external clock signal can either be square wave or a sine signal with a frequency in accordance with the device datasheet. The external clock source must be connected as indicated in Figure 3.5 (p. 8) . When a square wave source is used the HFXO buffer must be in bypass mode. The clock signal must toggle between 0 and VDD and the duty cycle must be close to 50%. Please refer to the device datasheet for further details. When a sine source is used, the sine amplitude must be in accordance with what is specified in the device datasheet. The sine signal is buffered through the HFXO buffer, whose input is AC-coupled. Figure 3.5. External High Frequency Clock

External source

HFXTAL_N

HFXTAL_P (High Z)

EFM32G

3.4 PCB Design Considerations

Keeping the PCB traces between the crystal, external capacitors and the EFM32 as short as possible is of high importance. Very small currents are running in the crystal oscillator and long lines make it more sensitive to EMC, ESD and crosstalk. Long lines also add parasitic capacitance and some series resistance to the oscillator which could reduce the startup margin of the oscillator. It is recommended to guard the crystal traces with ground traces and keep other clock lines and signal lines that are switching frequently as far away from the crystal connections as possible. Placing a ground plane underneath the crystal and load capacitors reduces interference from other layers. Because very small currents are running in the crystal oscillator, it is of importance to avoid dirt and soldering residue on the PCB. Such contaminations can degrade the performance of the oscillator and increase energy consumption over time. In harsh operating environments it is advised to protect the circuit in an air-tight housing to keep the circuit board clean. See AN0016 EFM32 Oscillator Design Considerations for more information on oscillator design.

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4 Reference Design
When starting a new EFM32 design, some parts of the layout are almost always required regardless of the application. Attached to this application note are example schematics for power decoupling, reset, external clocks and debug interface. Using this reference design as a template can improve development speed in the early stages of a new design. The reference design and included symbols are compatible with Cadence OrCAD 9.0 and later versions.

4.1 Contents
Each folder in the attached .zip-file contains the OrCAD reference design files, including Bill of Materials, for the part with the same name. PDF versions of the schematics are also provided.

The EFM32G.OLB library contains the Gecko-series OrCAD symbols: EFM32G200 EFM32G210 EFM32G230 EFM32G280 EFM32G290 EFM32G840 EFM32G880 EFM32G890

The EFM32TG.OLB library contains the Tiny Gecko-series OrCAD symbols: EFM32TG200 EFM32TG230 EFM32TG840 The EM_ELECTRO_MECH_REF.OLB library contains electromechanical parts found in the reference design: HEADER_2X10_2.54MM_TH (20 pin debug interface header) SWPB_B3S1000 (reset switch) The EM_PASSIVE_REF.OLB library contains the following components: BLM21B102S (EMI suppressor) CAPACITOR INDUCTOR RESISTOR XTAL_ATSSM (4MHz crystal) XTAL_ECX53BDU (32MHz crystal) XTAL_FOXSDLF (4MHz crystal) XTAL_GSWX26 (32.768kHz crystal) XTAL_MC405 (32.768kHz crystal) XTAL_NX5032GA (32MHz crystal)

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4.2 Comments on the Schematics

4.2.1 Power Supply Decoupling
The decouple pin uses a 1uF capacitor to filter transients in the power domain for the internal voltage regulator. Each power pin has a 100nF decoupling capacitor in addition to the common 10uF decoupling capacitor, as described in Section 1.2 (p. 2) . The digital power supply is separated from the analogue power supply to reduce EMI. To further improve the switching noise of the analogue power, an EMI suppressor is put in series between VMCU and the analogue power pins. The active low reset pin is connected to ground through a normally open switch, as well as to the debug interface connector.

4.2.2 Debug Interface

A standard ARM 20 debug pin connector is connected to the EFM32 debug pins.

4.2.3 High/Low Frequency Clock

Both the high and low frequency clock pins are connected to crystal oscillators using two of the recommended crystals from the AN0016 Oscillator Design Considerations application note.

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5 Revision History
5.1 Revision 1.31
November 23th, 2010. Corrected schematic values. Added information on power sequencing considderations.

5.2 Revision 1.30

November 17th, 2010. Added information on alternate schematic recommendations.

5.3 Revision 1.20

September 13th, 2010. Merged sections on PCB design considerations and external clock sources. Modified chapter on external clock sources to correspond with AN0016 EFM32 Oscillator Design Considerations. Added OrCAD and PDF reference designs.

5.4 Revision 1.10

May 6th, 2010. Added debug interface section.

5.5 Revision 1.00

October 21th, 2009. Initial revision.

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A Disclaimer and Trademarks

A.1 Disclaimer
Energy Micro AS intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Energy Micro products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Energy Micro reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Energy Micro shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Energy Micro. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Energy Micro products are generally not intended for military applications. Energy Micro products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.

A.2 Trademark Information

Energy Micro, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Energy Micro AS. ARM, CORTEX, THUMB are the registered trademarks of ARM Limited. Other terms and product names may be trademarks of others.

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B Contact Information
B.1 Energy Micro Corporate Headquarters
Postal Address Energy Micro AS P.O. Box 4633 Nydalen N-0405 Oslo NORWAY www.energymicro.com Phone: +47 23 00 98 00 Fax: + 47 23 00 98 01 Visitor Address Energy Micro AS Sandakerveien 118 N-0405 Oslo NORWAY Technical Support support.energymicro.com Phone: +47 40 10 03 01

B.2 Global Contacts

Visit www.energymicro.com for information on global distributors and representatives or contact [email protected] for additional information. Americas Europe, Middle East and Africa Asia and Pacific www.energymicro.com/asia

www.energymicro.com/americas www.energymicro.com/emea

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Table of Contents
1. Power Supply ........................................................................................................................................... 2 1.1. Introduction .................................................................................................................................... 2 1.2. Power Supply Decoupling ................................................................................................................. 2 2. Debug Interface and External Reset Pin ........................................................................................................ 5 2.1. Debug Interface .............................................................................................................................. 5 2.2. External Reset Pin (RESETn) ........................................................................................................... 5 3. External Clock Sources .............................................................................................................................. 6 3.1. Introduction .................................................................................................................................... 6 3.2. Low Frequency Clock Sources .......................................................................................................... 6 3.3. High Frequency Clock Sources ......................................................................................................... 7 3.4. PCB Design Considerations .............................................................................................................. 8 4. Reference Design ..................................................................................................................................... 9 4.1. Contents ....................................................................................................................................... 9 4.2. Comments on the Schematics ......................................................................................................... 10 5. Revision History ...................................................................................................................................... 11 5.1. Revision 1.31 ............................................................................................................................... 11 5.2. Revision 1.30 ............................................................................................................................... 11 5.3. Revision 1.20 ............................................................................................................................... 11 5.4. Revision 1.10 ............................................................................................................................... 11 5.5. Revision 1.00 ............................................................................................................................... 11 A. Disclaimer and Trademarks ....................................................................................................................... 12 A.1. Disclaimer ................................................................................................................................... 12 A.2. Trademark Information ................................................................................................................... 12 B. Contact Information ................................................................................................................................. 13 B.1. Energy Micro Corporate Headquarters .............................................................................................. 13 B.2. Global Contacts ............................................................................................................................ 13

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List of Figures
1.1. 1.2. 1.3. 2.1. 3.1. 3.2. 3.3. 3.4. 3.5. Power supply ......................................................................................................................................... Power supply ......................................................................................................................................... Power supply ......................................................................................................................................... Connecting the EFM32 to an ARM 20 pin debug header ................................................................................ Low Frequency Crystal ............................................................................................................................ Equivalent Circuit of a Crystal/Ceramic Resonator ......................................................................................... Low Frequency External Clock .................................................................................................................. High Frequency Crystal Oscillator .............................................................................................................. External High Frequency Clock ................................................................................................................ 2 3 4 5 6 6 7 7 8

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